034633-1 -F SiGe/Si Monolithically Integrated Amplifier Circuits Linda Pallab P.B. Katehi Bhattacharya February 1998 34633-1-F = RL-2471

Annual Report Title: SiGe/Si Monolithically Integrated Amplifier Circuits Sponsor: NASA Lewis Sponsor Number: NAG3-190 Budget Period: 10/1/96 - 9/30/97 Technical Officer: George Ponchak Electron Device Technology Branch Mail Stop 54-5 NASA Lewis Research Center 21000Brookpark Center Cleveland, OH 44135 (216) 433-3504 Grants Officer: Irene Cierchacki University of Michigan Number: 034633 Faculty Participated in Research: Linda P.B. Katehi Pallab Bhattacharya Students Participated in Research: Jae-Sung Rieh Liang-Hung Lu Grant Administrator: Betty Cummings Tvpe of Report: FINAL Annual Report February 2, 1998 Annual Report February 2, 1998 1

Paper List for NASA Si/SiGe Project Journal Papers: 1. J.-S. Rieh, L.-H. Lu, L.P.B. Katehi, P. Bhattacharya, E.T. Croke, G.E. Ponchak, and S.A. Alterovitz, "X- and Ku-band Amplifiers Based on Si/SiGe HBTs and Micromachined Components," submitted to Transactions on BMicrowave Theory and Techniques, 1997 2. J.-S. Rieh, D. Klotzkin, 0. Qasaimeh, L.-H. Lu, K. Yang, L.P.B. Katehi, P. Bhattacharya, E.T. Croke, "Monolithically Integrated Single- and Multiple-channel SiGe/Si PIN-HBT Front-End Transimpedance Photoreceivers," Photonics Technology Letters, to be published, 1998 3. J.-S. Rieh, 0. Qasaimeh, L.-H. Lu, K. Yang, L.P.B. Katehi, P. Bhattacharya, E.T. Croke, "Si gle- and Dual-Feedback Transimpedance Amplifiers Implemented by SiGe Technology," Micr wave and Guided Wave Letters, to be published, Feb. 1998 Conference Papers: 1. L.-H. Lu, J.-S. Rieh, P. Bhattacharya, L.P.B. Katehi, E.T. Croke, G.E. Ponchak, and S.A. Alterovitz, "K-band Si/SiGe HBT MMIC Amplifiers Using Lumped Passive Components with a Micro machined Structure," submitted to 1998 IEEE RFIC symposium 2. J.-S. Rieh, 0. Qasaimeh, D. Klotzkin, L.-H. Lu, K. Yang, L.P.B. Katehi, P. Bhattacharya, E.T. Croke, A"Monolithically Integrated SiGe-Based PIN-HBT Front-End Transimpedance Photor ceivers," Proceedings 1997 IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, pp.322-331, 1997

Report on SiGe/Si Monolithically Integrated Circuits by Liang-hung Lu and Jae-sung Rieh

Introduction With recent advance in the epitaxial growth of silicon-germanium heterojunction, Si/SiGe HBTs with high fmax and fT [l][2] have received great attention in MMIC applications [3][4]. In the past year, technologies for mesa-type Si/SiGe HBTs and other lumped passive components with high resonant frequencies have been developed and well characterized for circuit applications. By integrating the micromachined lumped passive elements into HBT fabrication, multi-stage amplifiers operating at 20 GHz have been designed and fabricated. Si/SiGe HBTs To implement MMICs, active devices are the most crucial components that determine the overall performance of microwave circuits. The HBT structure shown in Fig. 1 starts from Si substrate with a resistivity of p-10 k2cm. First, As-doped subcollector is formed by chemical vapor deposition, then the other epitaxial layers are grown by MBE. The growth temperature is fixed at 415 ~C for the collector and emitter layers, and 550 ~C for the base layer. Emitter and collector layers are Sb-doped Si, while the base layer is B-doped SiGe alloy with a uniform Ge mole fraction of 40%. The doping concentration and thickness of the base layer are 2xl019 cm-3 and 200 A, respectively. Unintentionally doped spacer layers are inserted at E-B and B-C junction to minimize the effect of boron outdiffusion. Mesa-type HBTs have been fabricated with a standard lift-off and etching techniques. Emitter contact is formed by a Cr/Au metal layer, while base and collector contacts are made with Pt/Au and Ti/Au, respectively. Rapid thermal annealing (RTA) is performed after metal deposition to reduce the contact resistance of these electrodes. Base and collector mesa are formed with SF6 and 02-based reactive ion etch (RIE). Emitter mesa formation, which exposes the base layer for metallization, is the most critical step in the fabrication process of mesa-type HBTs since this process directly affects the fmax of the devices through the parasitic base resistance RB. Over-etching of the base layer and undercutting of emitter layer should be minimized to keep the value of RB small. To achieve this, we use a two-step etch. First, an anisotropic RIE step removes most of the emitter layer without undercut. Second, a KOH-based solution selectively etches the remaining emitter layer and stops close to the E-B junction. This also introduces minimal undercut for self-aligned base metal deposition. SiO2 passivation, via hole formation, and interconnection metal deposition for probe pads complete the whole process. DC and RF characteristics of the Si/SiGe HBTs have been measured and analyzed. The devices have 30......... TI II n+ Si emitter contact 2x1019 cm3 2000 A n Si emitter 2x1018cm-3 1000 A i Sio.6Geo.4 50 A p+ Sio 6GeO 4 base 2x1019 cm-3 200 A i Sio.6Geo.4 50 A n- Si collector 5xl015 cm3 3000 A n+ Si sub-collector lxl019 cm-3 15000 A p- Si substrate lx1012 cm-3 540 gm Figure 1. Si/SiGe HBT material structure 25 + Ic=7.OmA 20 VCE=4V 2o % 15 U fax=2GHz Ih211. -5............... 1 10 100 Frequency [GHz] Figure 2. Frequency response of Si/SiGe HBT (AE=5x5 gm2)

40 501m c 35[9 * 30 25 detch IOCIm Figure 4. Photomicrograph of the micromachined Figure 5. Resonant frequencies of inductors with c 15 spiral inductor various etch depth, detch. HBT Amplifier Design After fabrication and characterization of active devices and passive components, the measured s-parameters and equivalent circuits are used for amplifier design. Using coplanar waveguides, one-stage, twostage and three-stage lumped amplifiers are designed at a center frequency of 20 GHz. Figure 6 shows the lumped amplifiers. Incrograph micrmicromachined passive components are used for input, output and interstage matchins t tii ain and remain the amplifiers in stable region. In addition, DC bias pads and RF chokes are also included in the design. Future Work The next step for the work is to complete the fabrication of the amplifiers and take measurement data. Then we propose to develop a new HBT technology for active devices with higher RF performance, and use the improved devices for circuit applications at higher frequencies. Figure 6. Photomicrograph of the fabricated amplifiers.

K-band Si/SiGe HBT MMIC Amplifiers Using Lumped Passive Components with a Micromachined Structure. Liang-Hung Lu, Jae-Sung Rieh, Pallab Bhattacharya and Linda P. B. Katehi Department of Electrical Engineering and Computer Science University of Michigan, Ann Arbor, MI 48109-2122 E. T. Croke Hughes Research Laboratory, 3011 Malibu Canyon Road, Malibu, CA 90265 George E. Ponchak and Samuel A. Alterovitz NASA Lewis Research Center, Cleveland, OH 44135 Abstract Using Si/SiGe heterojunction bipolar transistors with a maximum oscillation frequency of 52 GHz and a novel structure for passive components, a two-stage K-band lumped-element amplifier has been designed and fabricated on high-resistivity Si substrates. The chip size including biasing and RF chokes is 0.92x0.67 mm2. Introduction With recent advances in the epitaxial growth of silicon-germanium heterostructures, the concept of high-performance and high-frequency electronic devices compatible with advanced silicon technology has been realized. The Si/SiGe heterojunction bipolar transistors (HBTs) have received the greatest attention[1][2]. Recently, monolithic microwave and millimeter wave integrated circuits (MMICs) based on Si/SiGe HBTs and distributed circuit components have been presented[3][4]. In this work, we have developed the fabrication technologies for Si/SiGe HBT on high-resistivity Si substrates. For a 5x5 Ltm2 emitter size, a 28 GHz cut-off frequency and a maximum oscillation frequency of 52 GHz was demonstrated. In addition, lumped coplanar novel micromachined passive components characterized by high resonant frequencies are also modeled and fabricated. By integrating these passive components into the HBT fabricating process, the application range of Si MMICs with lumped elements can be extended even above 30 GHz. K-band lumped amplifiers using these micromachined passive components have been designed and fabricated based on the Si/ SiGe HBTs. Si/SiGe HBTs Active devices are the most crucial components that determine the overall performance of microwave circuits. Optimized structure, high quality epitaxial layers, and stable processing technology are the key to successful development of high performance devices for high-frequency circuit applications. We have designed and grown npn double heterojunction Si/SiGe HBT structures by molecular beam epitaxy (MBE). The HBT structure is shown in Fig. 1. The substrate is Si with a resistivity of p~10 kMcm, which is high enough to suppress the substrate-originated ohmic loss for passive components in microwave circuit applications[5]. First, As-doped subcollector is formed by chemical vapor deposition, then the other epitaxial layers are grown by MBE. The growth temperature is fixed at 415 ~C for the collector and emitter layers, and 550 ~C for the base layer. Emitter and coln+ Si emitter contact 2x1019 cm-3 2000 A n Si emitter 2xl18 cm-3 1000 A i Sio.6Geo.4 50 A p+ Sio.6Geo.4 base 2x0109 cm-3 200 A i Si.6Geo.4 50 A n- Si collector 5x1015 crn-3 3000 A n+ Si sub-collector 1x1019 cm-3 15000 A p- Si substrate 1x1012 cm'3 540 Rlm Figure 1. Si/SiGe HBT material structure

1 -c) cr C.) It cu (u C4 40 35 30 25 20 15 10 5 detch -20gm X - detch OI -Conventio - Convention,, a... a.. Figure 4. Photomicrograph of the micromachined spiral inductor sion line elements, lumped elements are smaller, especially at frequencies below 30 GHz. As a result, lumped element circuits can be more compact than distributed ones in MMIC applications. However, planar lumped elements suffer from parasitic capacitance. Specifically, planar lumped inductors exhibit very low resonant frequencies due to the parasitic capacitance, thus limiting operating frequencies. Work has been done by fabricating the inductors on dielectric membrane to increase the resonant frequency[6][7]. This approach is difficult to be integrated with active devices since it requires the development of a dielectric membrane between the bulk high-resistivity Si and the doped layers. To avoid this difficulty, a new micromachined spiral inductor has been developed as shown in Fig. 4. By covering the metal structure with Ni which is used as a selfaligned mask and removing the substrate material in between the turns by RIE, the effective dielectric constant of this structure can be reduced. This results in a smaller series and shunt parasitic capacitance from turn to turn and from the signal line to ground. Due to the significant reduction of the parasitics, the resonant frequency can be increased drastically. In the measurement, the resonant frequency increases from 20 GHz to 38 GHz for a 1.5 nH spiral inductor by using this micromachined structure. The complete measurement results for the micromachined spiral inductors with various inductance and etching depth are shown in Fig. 5. Other passive components are also integrated into the processes and modeled for the circuit design. A 2000 A SiO layer is used as the 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 Inductance [nH] Figure 5. Resonant frequencies of inductors with various etch depth, detch. dielectric material for MIM capacitors. The extracted dielectric constant Er is 4.7 which provides a capacitance of 0.21 fF/im2. For thin film resistors (TFRs), a NiCr layer of 700 A is used and gives a sheet resistance of 25-30 EV2/. HBT Amplifier Circuits Using coplanar waveguides, a two-stage lumped amplifier as shown in Fig. 6 is designed and fabricated. It consists two 5x5 gm2 Si/SiGe HBTs. Micromachined spiral inductors, MIM capacitors and TFRs are used for the matching network, transistor biasing and RF blocks, and the Figure 6. Photomicrograph of the fabricated twostage amplifier. The chip size is 0.92x0.67mm2

Single- and Dual-Feedback Transimpedance Amplifiers Implemented by SiGe HBT technology J.-S. Rieh, O. Qasaimeh, L. H. Lu, K. Yang, L. P. B. Katehi, P. Bhattacharya Solid-State Electronics Laboratory Department of Electrical Engineering and Computer Science University of Michigan, Ann Arbor, MI 48109-2122 and E. T. Croke Hughes Research Laboratories, Inc. 3011 Malibu Canyon Road, Malibu, CA 90265 ABSTRACT Monolithically integrated SiGe/Si heterojunction bipolar transistor transimpedance amplifiers, with single- and dual-feedback configurations, have been designed, fabricated, and characterized. The single-feedback amplifier showed transimpedance gain and bandwidth of 45.2 dBQ and 3.2 GHz, respectively. The dual-feedback version exhibits improved gain and bandwidth of 47.4 dBQ and 3.3 GHz, respectively. Their performance characteristics are excellent in terms of their application in communication systems. 1

I. Introduction Fiber optical communication systems have been dominated by III-V based devices and circuits due to their superior properties over Si, such as high speed operation, bandgaps corresponding to the long-haul fiber compatible 1.3 gm or 1.55 glm wavelength, and light emitting capability [1,2]. Recent rapid developments in SiGe/Si technology seems to be able to satisfy many requirements of fiber optical communication systems in terms of both performance and cost. Current SiGe/Si heterojunction bipolar transistors(HBTs) demonstrate operating frequencies high enough for next generation fiber optical communication systems[3,4]. The bandgap of Sil xGe. alloys can coincide with the wavelength of 1.3 glm or 1.55 [Lm by proper choice of Ge mole fraction[5]. SiGe/Si quantum dot light emitting diodes have been reported, albeit the devices are in an early stage of development[6]. This letter reports experimental results of SiGe/Si HBT-based single- and dualfeedback transimpedance amplifiers, which can be employed as a preamplifier in a frontend photoreceiver of a fiber optical communication receiver module. II. Fabrication The schematic of the SiGe/Si n-p-n HBT, grown by molecular beam epitaxy(MBE) is shown in Fig. 1. Sil xGe, alloy was employed as a thin base layer with the Ge mole fraction graded from x=O. 1 (emitter side) to x=0.4(collector side). This grading of Ge composition generates a quasi-electric field which accelerates electrons travelling through the base to collector, resulting in smaller base transit time and eventually higher cutoff frequency compared with a uniform Ge composition profile. The fabrication procedure for mesa-type SiGe HBTs is as follows: emitter metal(Cr/Au=500/2000 A) is 2

defined by evaporation on the Si contact layer and used as a mask for the subsequent KOH-based selective wet etching which exposes the base layer for contact formation. Evaporation of the self-aligned base metal(Pt/Au=200/1300 A) follows, and then base and collector layers are removed by dry etching to expose the highly doped subcollector layer for collector contact. Collector metal(Ti/Au=500/2000 A) is deposited by evaporation on the exposed subcollector layer, and another dry etching is performed for the device isolation. SiO2 layer is deposited by PECVD and via holes for contacts are formed by selective dry etching of the SiO2 layer. Evaporation of thick interconnection metal(Ti/Al/fi/Au=500/l 1000/500/3000 A) concludes the device fabrication. The process described above leads to high yield and good device characteristics. From the current-voltage characteristics of devices with 2.5 gmxlO gtm emitter size, a DC current gain f is measured 25. The S-parameters were measured with HP8510 network analyzer in the 0.5 GHz-25.5 GHz frequency range. Values of fT and f a' obtained from the extrapolation of the values of current gain h21 and unilateral power gain U at 20 GHz with the assumption of -6dB/octave roll-off, are 23 GHz and 34 GHz, respectively. Two additional processing steps are required to complete amplifier fabrication: formation of thin film resistors and airbridges. NiCr was evaporated(700 A) and used as resistors, with measured sheet resistance of 25 Q/0. Evaporated metal(Ti/Al/Ti/Au=500/14000/500/ 3000 A) was used to form airbridges. III. Results and Discussion Figure 2(a) shows the circuit diagram of the single-feedback transimpedance amplifier. It consists of a common emitter gain stage, two emitter follower buffers, a 3

resistive feedback loop, and a front-end inductor. The feedback resistor RF is the most important component in this configuration since it determines the bandwidth, gain, and noise characteristics of the whole circuit. The value of this resistor should be selected based on trade-off between these parameters. It is generally known that the increase of RF increases the gain and improves the noise characteristics, while degrading the bandwidth of the circuit. In this study, the value of RF was chosen to be 550 Q, with slightly more emphasis on the bandwidth. The inclusion of front-end inductor L1 has been shown to improve the signal-to-noise ratio and enhance the bandwidth of the amplifier[ 1]. The circuit diagram of the dual-feedback amplifier is shown in Fig. 2(b). It includes a second gain stage following the first one, and an extra feedback loop including a resistor RF2 allowing REl to behave as a voltage feedback. This second feedback, along with the reduced value of RF1(200 Q), increases the bandwidth of the amplifier. The gain would be reduced due to the additional feedback configuration, but the additional gain from the second gain stage compensates for the reduction and provides an increase of overall gain-bandwidth product of the amplifier compared with the single-feedback amplifier. The S-parameters of the fabricated amplifiers were measured with a HP8510 network analyzer in the 0. I1 GHz- 10.0 GHz frequency range. Figure 3(a) shows the transimpedance gain versus frequency characteristics of a single-feedback amplifier circuit. It shows a transimpedance gain of 45.2 dBKQ and -3 dB bandwidth of 3.2 GHz at the bias point Vcc=3 V. The gain shows uncharacteristic ripples in the high frequency range, which arise from the external bias probing in on-wafer measurement. The measured bandwidth is slightly enhanced by this ripple and the real value is conservatively estimated to be around 3 GHz. A moderate gain overshoot can be seen in the gain plot. This 4

is ascribed to the parasitic inductance arising from the narrow coplanar ground line surrounding the whole circuit. The frequency response of a dual-feedback amplifier is shown in Fig. 3(b). The transimpedance gain is 47.4 dBQ and the -3 dB bandwidth is measured to be 3.3 GHz at the bias point of VCC=7 V. This circuit shows improvement in both gain and bandwidth compared with the single-feedback version. These performance characteristics are comparable to III-V based-circuit of the same complexity[7] and indicate the possibility of applying SiGe technology to fiber optical communication systems with the advantages of low cost and simpler fabrication. Increase of Vcc affected both gain and bandwidth, leading to an increase of gain and decrease of bandwidth. A similar trend was observed for the single-feedback amplifier. This effect gives rise to another degree of freedom for achieving a trade-off between gain and bandwidth and allows a post-fabrication tuning of gain and bandwidth, which may compensate for the possible deviation of these parameters from designed values due to process variation. ACKOWLEDGEMENT This work is being supported by NASA-Cleveland under grant NAG3-1903 and the AFOSR under grant F49620-95-1-0013 5

REFERENCES [1] K. Yang, A. L. Gutierrez-Aitken, X. Zhang, G. I. Haddad, and P. Bhattacharya, "Design, modeling, and characterization of monolithically integrated InP-based (1.551im) high-speed (24 Gb/s) p-i-n/HBT front-end photoreceivers", IEEE J. Lightwave Technol., vol. 14, pp. 1831-1839, Aug. 1996. [2] E. Sano, M. Yoneyama, S. Yamahata, and Y. Matsuoka, "23 GHz bandwidth monolithic photoreceiver compatible with InP/InGaAs double-heterojunction bipolar transistor fabrication process", Electron. Lett., vol. 30, no. 24, pp. 2064-2065, 1994. [3] A. Schiippen, U. Erben, A. Gruhle, H. Kibbel, H. Schumacher, and U. Konig, "Enhanced SiGe heterojunction bipolar transistors with 160 GHz-fma", IEDM Tech. Dig., 1995, pp. 743-746. [4] E. F. Crabbe, B. S. Meyerson, J. M. C. Stork, and D. L. Harame, "Vertical profile optimization of very high frequency epitaxial Si- and SiGe-base bipolar transistors", IEDM Tech. Dig., 1993, pp. 83-86. [5] J. Lee, A. L. Gutierrez-Aitken, S. H. Li, and P. K. Bhattacharya, "Responsivity and impact ionization coefficients of SilxGex photodiodes", IEEE Trans. Electron Devices, vol. 43, pp. 977-981, June 1996. [6] Y. S. Tang, W. -X. Ni, C. M. Sotomayer Torres, and G. V. Hansson, "Fabrication and characterization of Si-Si0 7Geo 3 quantum dot light emitting diodes", Electron. Lett., vol. 31, no. 16, pp. 1385-1386, 1995. [7] L. M. Lunardi, S. Chandrasekhar, A. H. Gnauck, C. A. Burrus, R. A. Hamm, J. W. Sulhoff, and J. L. Zyskind, "A 12-Gb/s high-performance, high-sensitivity mono 6

lithic p-i-n/HBT photoreceiver module for long-wavelength transmission systems", IEEE Photon. Technol. Lett., vol. 7, pp. 182-184, Feb. 1995. 7

FIGURE CAPTIONS Figure 1. Material structure of SiGe/Si HBTs Figure 2. (a) Circuit diagram of single-feedback transimpedance amplifier (b) Circuit diagram of dual-feedback transimpedance amplifier Figure 3. (a) Frequency response of single-feedback transimpedance amplifier (b) Frequency response of dual-feedback transimpedance amplifier 8

Si Si n+ Si0*9Ge0*1 Si1 xGex x:O.1-+O.4 Si106Geo04 Si P+ i 1e19 200 nm 2e1 8 lO0 nm 1 nm 5e1 9 3Onm 1 0 nm 1e16 250 nm 1e19 1.5 gm Si Si Substrate Figure 1 9

Vcc lin Q3 v Ot L1 I ~ ---— oVout Rf RE1 RE2 (a) Vcc 05 < R2 Q2 0 749 'ina 3 RE2 010 RHR F2 RE1 R 3 R,* Ro (b) Figure 2 10

C 55 ~.......... CI D 50 |3 45. --- — 0 = 40. 35 3.2 GHz E g 30 25 eF 25............ 0.1 1 10 Frequency [GHz] (a) C' 55 50 S 45 Is 40 / I 3.3 GHz \ E' 35 E C 30 -- 25 0.1 1 10 Frequency [GHz] (b) Figure 3 11

Monolithically Integrated SiGe/Si PIN-HBT Front-End Transimpedance Photoreceivers J. -S. Rieh, O. Qasaimeh, D. Klotzkin, L.-H. Lu, K. Yang, L. P. B. Katehi, and P. Bhattacharya Department of Electrical Engineering and Computer Science University of Michigan, Ann Arbor, MI 48109-2122 E. T. Croke Hughes Research Laboratory, 3011 Malibu Canyon Road, Malibu, CA 90265 Abstract The demand for monolithically integrated photoreceivers based on Si-based technology keeps increasing as low cost and high reliability products are required for the expanding commercial market. Higher speed and wider operating frequency range are expected when SiGe/Si heterojunction is introduced to the circuit design. In this paper, a monolithic SiGe/Si PIN-HBT front-end transimpedance photoreceiver is demonstrated for the first time. For this purpose, mesa-type SiGe/Si PIN-HBT technology was developed. Fabricated HBTs exhibit fmax of 34 GHz with DC gain of 25. SiGe/Si PIN photodiodes, which share base and collector layers of HBTs, demonstrate responsivity of 0.3 A/W at X=850 nm and bandwidth of 450 MHz. Based on these devices, single- and dual-feedback transimpedance amplifiers were fabricated and they exhibited the bandwidth of 3.2 GHz and 3.3 GHz with the transimpedance gain of 45.2 dBQ and 47.4 dBQ respectively. Monolithically integrated single-feedback PIN-HBT photoreceivers were implemented and the bandwidth was measured to be -0.5 GHz, which is limited by the bandwidth of PIN photodiodes. I. Introduction The commercial market for optical communication keeps expanding as modem society requires faster communication systems with higher capacity. In a large scale, long-haul fiber optical communication is spreading quickly and is ready for penetration into homes and offices. In a small scale, local optical data link is expected to replace electrical interconnection for high-speed computation and switching application[l ]. As a result, the demand for components comprising optical communication systems is rising rapidly. To meet this huge demand, mass production is necessary and this requires a technology with low cost and high reliability. Till date, III-V based technology has primarily dominated these applications owing to its highspeed characteristics, superior optical properties, and feasibility to incorporate materials corresponding to 1.3 gtm and 1.55 g.m wavelength, which are required for long-haul fiber optical communication system based on silica optical fibers in terms of low dispersion and low loss,

Emitter Contact Si n+ le19 200 nm Emitter Si n 2e18 100 nm Spacer Si0.9Geo.l i 1 nm Base Sil.xGex x:0.1-*0.4 p+ 5e19 30 nm Spacer Si0.6Geo.4 i 10 nm Collector Si n- le16 250 nm Subcollector Si n+ le19 1.5 itm Substrate Si p- 2e12 540 gm Fig 1. Schematic of the SiGe PIN-HBT structure respectively. The high-cost nature of III-V technology, however, remains a major impediment for it to be a favorable candidate for growing commercial applications which requires mass production. In contrast, Si-based technology benefits from its low cost and high reliability which is essential for commercial applications. There has been a lot of efforts to implement optical system components with Si technology, mainly for receiver modules. Such efforts started with hybrid approaches that combines III-V based photodiode to Si-based transimpedance amplifiers to make advantage of optical and high-speed properties of III-V materials and low cost nature of Si technology[2][3]. This approach, however, still suffers from its complexity and unreliability. Monolithic photoreceivers based on silicon, which eliminate the shortcomings of the hybrid realized by incorporating both photodiode and transimpedance amplifier on one chip, have been reported recently[4-7]. If the SiGe/Si heterostructure technology is incorporated to this monolithic approach, more advantages can be expected. SiGe/Si technology offers superior high speed characteristics than Si technology does, and it may be compatible with 1.3 Im and 1.55 aim wavelength by proper choice of Ge mole fraction in SiGe alloys while keeping the cost still low because it is basically based on existing matured Si technology. To the authors' knowledge, no SiGe based monolithic photoreceiver has been yet reported. In this paper, we report the development of SiGe/Si PIN-HBT technology and demonstrate the performance characteristics of transimpedance amplifiers and monolithically integrated PIN-HBT front-end transimpedance photoreceivers based on SiGe/Si heterostructures. II. Fabrication The schematic of the SiGe/Si PIN-HBT structure is shown in Fig. 1. A thick arsenic-doped subcollector layer is grown by CVD on (100) Si wafer with high resistivity (p>2000 Qcm). Then the wafer is loaded into the MBE chamber, and antimony-doped Si collector layer,

boron-doped SilI Ge, base layer, and antimony-doped Si emitter and emitter contact layer are grown. Unintentionally doped spacer layers are inserted in both sides of base to minimize the effect of boron outdiffusion. Ge mole fraction in the Si.Gelx alloy incorporated as a base layer is graded from x=0. 1 (emitter side) to x=0.4(collector side) to generate a quasi-electric field. This field is intended to accelerate electrons travelling through the base to collector, resulting in smaller base transit time and eventually higher cut-off frequency compared to a uniform Ge composition profile. The fabrication procedure of the circuit begins with the deposition of emitter metal(Cr/Au=500/2000 A) by evaporation on the Si contact layer. This layer is used as an etch mask for subsequent emitter mesa etch. Emitter mesa is formed with two step etch: dry and wet etch. First, SF6 and 02-based anisotropic reactive ion etch (RIE) removes most portion of the emitter layer without undercut. Then, KOH-based selective wet etch is done to expose highly doped SiGe base layer with selectivity. This wet etch is accurately controlled to optimize the undercut for the minimization of the base access resistance and the successful formation of the following self-aligned base metal contact. Rapid thermal annealing(RTA) is done for the optimized ohmic contact of emitter metal in between two etch steps. Evaporation of the self-aligned base metal(Pt/Au=200/1300 A) follows, and then base mesa is formed by RIE resulting in the exposure of the highly doped subcollector layer for collector contact. The base contact is also used as a p-contact for PIN photodiodes. Collector metal(Ti/Au=500/2000 A) contact, also used as a n-contact for photodiode, is defined by evaporation on the exposed highly doped subcollector layer, and another RTA is performed for base and collector ohmic contact. A deep RIE is done to completely remove the subcollector layer between active devices for isolation, and SiO2 layer(lCLm) is deposited by PECVD for the separation of electrode metal contacts of the devices from following interconnection metal layer. This Si02 layer also behaves as a passivation layer for HBTs and an anti-reflection coating for photodiodes. Via holes for contacts are formed by selective dry etching of the SiO2 layer, followed by the evaporation of thin film resistor (NiCr=700 A). The measured sheet resistance of the resistors was around 25 2Q/. Thick interconnection metal(Ti/Al/Ti/Au=500/ 11000/500/3000 A) deposition is followed for the formation of measurement probing pads. Finally, airbridges are formed for the formation of inductor feedlines and crossovers of metal layers by the evaporation of thick metal(Ti/A1/Ti/Au=500/14000/500/3000 A). III. Results and Discussion The process described above leads to devices with high yield and excellent characteristics. From the current-voltage characteristics of HBTs with the emitter size of 2.5 umrnxlO pm, DC current gain p is measured to be 25 and the breakdown voltage to be 5 V. The collector and base ideality factors of the devices, extracted from its Gummel plot, are nc=1.12 and nb=1.84, respectively. The S-parameters were measured with a HP8510 network analyzer in the 0.5 GHz-25.5 GHz frequency range. Cut-off frequency fT and maxinLmum oscillation frequency

30...- le-02, _ < 2 l lAe-04 Pinc=22 gW 25 1imx2 5jim le-03 12 4mxl3.m 20. 4: =850 nm i le-05.............p.......... 4........0 V " 1..........................- 7.: ': e:o t.ef:34 ~ h: e a unilateral power gain U at 20 GHz with the assumption of -6 dB/octave roll-off. ey are 23 5.................. a 3 G ry,..e..... vle i s beliee t e limie 1 10 50 0 2 4 6 8 10 12 Frequency [GHz] Reverse Bias [V] Fig. 2. Frequency response of the fabricated Fig. 3. Dark- and photo-current of the fabriSiGe/Si HBT cared photodiode ma,, of the device were obtained from the extrapolation of the values of current gain h21 and unilateral power gain U at 20 GHz with the assumption of -6 dB/octave roll-off. They are 23 GHz and 34 GHz, respectively, as shown in Fig. 2. The fmx value is believed to be limited by the base resistance, especially base access resistance and base spreading resistance arising from the thin base region(300 A) and insufficiently high base doping level, which is measured to be Ix1019 cm-3 by spreading resistance analysis. With a higher base doping level and the modification of emitter area and shape, enhanced fmax value is expected. Electrical and optical properties of mesa type PIN photodiodes, employing SiGe p+ base layer and Si n- collector layer of HBTs as p-type contact layer and intrinsic absorption layer, respectively, were characterized. The device has a 12|jmx1l3rm lateral dimension and ringshaped p-type contact, so that the incident light can be absorbed through the inner square of the ring, while the electric field in the absorption region is kept symmetric for the uniform collection of the generated carriers. Figure 3 shows the dark- and photo-current of a device with the incident light of power Pinc=22 gW at X=850 nm. The dark-current level of the photodiodes were measured to be 100-200 nA at 5 V, which is rather high. The high values are believed to result from the base metal annealing during which base metal possibly penetrates through the thin base layer, leaving the B-C junction leaky. The measured responsivity has a typical value of 0.3 A/W at 5 V and increases steadily as the reverse bias is increased. This responsivity is quite reasonable for optical receiver applications. Corresponding external quantum efficiency is 43%. The bandwidth of the photodiodes was measured with the following measurement setup. Light from a GaAs semiconductor laser with the center frequency of

X=850 nm was coupled into a single-mode optical fiber and modulated by an modulator and a HP8350 sweeper. A polarization controller was inserted at the input of the modulator to minimize the coupling loss. The modulated light was focused on photodiodes with a tapered optical probe and the electrical response of devices was measured with a HP8593A spectrum analyzer. An amplifier was inserted at the input of the spectrum analyzer to enhance the power level of the electrical response of photodiodes. The bandwidth of the photodiodes measured were around 450 MHz at the reverse bias of 9 V. It was observed that the bandwidth increases as the applied reverse bias increases. This relatively low bandwidth can be ascribed to the slow diffusion effect of the generated carriers. The intrinsic absorption region of the fabricated photodiodes was proved to be too thin and only a small portion of the incident photons are absorbed in that region. A much more numbers of photons are absorbed and corresponding carriers are generated in subcollector and bulk regions, in which case the photo-generated carriers travel a long distance to reach electrodes by slow diffusion mechanism, resulting in a small bandwidth. By a simple calculation, we can obtain the ratio of photon absorption in the intrinsic region to the total photon absorption. The total photocurrent consists of drift(J.drift) and diffusion(Jdiffusion) components, which arise from the carrier generation in the depleted region and the neutral region, or intrinsic region and subcollector/bulk region in the given structure, respectively. Each component can be expressed in terms of the device parameters as[8], adrift = -q G(x)dx = q(Do(1 -e ) (1) diffusion = qOlaL Le (2) where G(x) is the hole-electron pair generation rate, (o is the incident photon flux per unit area, a is the absorption coefficient, W is the width of the intrinsic region, and Lp is the hole diffusion length in the bulk region. Therefore, the ratio of the number of the generated of carriers in the intrinsic region to the total number of the generated of carriers, which is identical to the ratio of photon absorption in the intrinsic region to the total photon absorption, can be expressed as, J drit Jdrift (l + Lp)(l-e )e Jtotal Jdrift + Jdiffusion ( 1 + aL - e ) By substituting cx=650 cm-' for Si at k=850 nm, W=250 nm, Lp=4.5 trm in the subcollector, we obtain the value of the ratio to be 0.068. This implies that less than 7% of the total carrier generation occurs in intrinsic region, while more than 93% of the total carrier generation occurs either in subcollector or bulk region in the given photodiode structure. This strongly

Vcc vcc 03 out j 3 RE 10 RI R2RlREl R3 RE R0 E3RE4 (a) (b) Fig. 4. (a) Circuit diagram of the fabricated single-feedback transimpedance amplifier (b) Circuit diagram of the fabricated dual-feedback transimpedance amplifier suggests that the bandwidth of the device is dominated by the carriers generated in the subcollector and bulk region which is very slow, and this explains the measured small bandwidth. By increasing the thickness of the intrinsic layer, more portion of the injected photons are expected to be absorbed in the intrinsic layer so that transit time through the depletion layer dominates the speed of the device, leading to the improvement of bandwidth. This is contrary to the common belief that the thinner the intrinsic layer, the larger the bandwidth. Too thick an intrinsic layer, however, will result in the increase of transit time, leading to the degradation of the speed. This implies that there exists an optimum value for the intrinsic layer thickness in terms of the bandwidth of photodiodes. Single- and dual-feedback transimpedance amplifiers based on SiGe/Si HBTs with emitter size of 51tmx5(im were designed, fabricated and characterized. Figure 4(a) shows the circuit diagram of the single-feedback transimpedance amplifier. It is composed of a common emitter gain stage, two emitter follower buffers, a resistive feedback loop, and a front-end inductor. The feedback resistor RF determines the bandwidth, gain, and noise characteristics of the amplifier and the value should be selected based on the trade-off between these parameters. By the increase of RF value the gain and noise characteristics of the amplifiers are improved, while the bandwidth is degraded. In this study, the value of RF was chosen to be 550 Q, with slightly more emphasis on the bandwidth. The circuit diagram of the dual-feedback amplifier is shown in Fig. 4(b). It includes a second gain stage following the first one, and an extra feedback loop including a resistor RF2. This second feedback, along with the reduced value of

RF1(200 Q), increases the bandwidth of the amplifier. Second gain stage amplifies the signal to a higher level, compensating for the possible reduction of gain at the first stage from the additional feedback resistance, consequently leading to an increase in overall gain-bandwidth product of the amplifier compared to the single-feedback amplifier. The S-parameters of the fabricated amplifiers were measured with a HP8510 network analyzer in the 0.1 GHz-10.0 GHz frequency range. Figure 5(a) shows the transimpedance gain versus frequency characteristics of a single-feedback amplifier circuit. It shows a transimpedance gain of 45.2 dBQ2 and - 3 dB bandwidth of 3.2 GHz at the bias point Vcc=3 V. The frequency response of a dual-feedback amplifier is shown in Fig. 5(b). The transimpedance gain is 47.4 dBKQ and the -3 dB bandwidth is measured to be 3.3 GHz at the bias point of VCC=7 V, which shows improvement in both gain and bandwidth compared with the single-feedback version as the design of the circuit intended. Some uncharacteristic ripples are shown in the frequency response of the amplifiers. These are believed to originate from an electrical oscillation generated within the measurement system consisting of the network analyzer and a DC voltage power supply. A moderate gain overshoot can also be seen in the frequency response of the circuits. This is ascribed to the parasitic inductance arising from the narrow coplanar ground line surrounding the whole circuit. C55 ' 50. - V 45 =40 ' 35 'v 30.. 25 r-. 55. g50 45 4' 35 ~30 J 25 10 ' 0.1 L ).1 1 Frequency [GHz] 1 Frequency [GHz] 10 (a) (b) Fig. 5. (a) Frequency response of the fabricated single-feedback transimpedance amplifier (b) Frequency response of the fabricated dual-feedback transimpedance amplifier

Vcc 5 ~.,...I, -w.. 10 02 4 Vcc=65 S Q 0 -5 03t VDD=9 V -'-1 RF -- -=850 nm -R2 R - -20 0.1 1 2 3 Frequency [GHz] Fig. 6. Circuit diagram of the fabricated Fig. 7. Frequency response of the fabricated photoreceiver photoreceiver Monolithically integrated photoreceivers based on SiGe/Si HBTs and PIN photodiodes were designed, fabricated and characterized. Figure 6 shows the circuit diagram of the single-feedback photoreceiver. The topology is basically same as the single-feedback transimpedance amplifier described above, except for the diodes on each stage employed in order to optimize the bias points. The feedback resistance RF has the value of 400 KQ The frequency response of the photoreceiver was measured with the identical measurement setup for the photodiodes described above. The relative response of the photoreceiver with the bias point of Vcc=6 V for the amplifier circuit and VDD=9 V for the photodiode is shown in Fig. 7. The -3 dB bandwidth is measured as 460 MHz, which is much smaller than that of the transimpedance amplifier with similar topology. It is obvious that the bandwidth of the photoreceiver is limited by the bandwidth of the incorporated photodiode, not by the transimpedance amplifier which is often the case. The cause of the small bandwidth of the photodiode is described above and it can be improved by the optimization of the intrinsic layer thickness. If the bandwidth of the photodiodes exceeds that of transimpedance amplifiers by structure optimization, the bandwidth of the photoreceivers will be determined by the bandwidth of the transimpedance amplifiers. The bandwidth of transimpedance amplifiers may be improved by design optimization even with the current technology, and this will lead to the increase of the bandwidth of the photoreceivers to several GHz, in which case the circuit may be applied to multi Gb/s applications. As the absorption layer of the PIN SiGe photodiode is composed of Si, the operating

wavelength range of the fabricated photoreceivers will be suitable for optical data link application, which does not require 1.3 gim nor 1.55 Im wavelength for low dispersion and loss. By implementing the collector layer of the SiGe/Si HBT, which is shared as the absorption layer of the photodiode, with SiGe alloys with 20%-40% Ge concentration, the detectable wavelength range of the SiGe photoreceiver will be extended up to 1.3 dm and even to 1.55 gim, and it may find applications even in long-haul optical communication systems. To implement the thick absorption layer with relatively high Ge concentration without significant dislocation, special buffer layers such as graded SiGe buffer layers, superlattice buffer layers, or low temperature Si buffer layers will be required[9]. IV. Conclusion SiGe/Si PIN-HBT technology has been developed and applied to the fabrication of transimpedance amplifiers and monolithic SiGe/Si photoreceivers for the first time. A SiGe/Si HBT exhibited the fT and fmax of 23 GHz and 34 GHz, respectively, with the DC gain of 25. Mesatype PIN photodiode showed responsivity of 0.3 A/W at X=850 nm and diffusion limited bandwidth of 450 MHz. Fabricated single- and dual-feedback transimpedance amplifiers exhibited the bandwidth of 3.2 GHz and 3.3 GHz with the transimpedance gain of 45.2 dBKQ and 47.4 dBQ& respectively. Fabricated monolithic photoreceiver showed the bandwidth of 460 MHz, which is apparently limited by the performance of photodiodes. With the optimization of the PIN-HBT material structure, the bandwidth of the photodiode is expected to be improved to exceed that of transimpedance amplifiers. Combined with the design optimization of the transimpedance amplifiers, this will result in monolithic SiGe/Si photoreceivers operating at multi Gb/s for optical communication applications. The application can be extended to long-haul fiber optical communication systems by employing SiGe alloy to the absorption layer of PIN photodiode. Acknowledgments This work is being supported by the AFOSR under grant F49620-95-1-0013 and NASACleveland under grant NAG3-1903. References [1] R. A. Soref, "Silicon-based optoelectronics," Proc. IEEE, Vol. 81, pp.1687-1706, Dec. 1993. [21 S. Fujita, T. Suzaki, A. Matsuoka, S. Miyazaki, T. Torikai, T. Nakata, and M. Shikada,

"High sensitivity 5 Gbit/s optical receiver module using Si IC and GaInAs APD," Elect. Lett., Vol. 26, No. 3, pp.175-176, 1990. [3] H. Hamano, T. Yamamoto, Y. Nishizawa, Y. Oikawa, H. Kuwatsuka, A. Tahara, K. Suzuki, and A. Nishimura, "10 Gbit/s optical front end using Si-bipolar preamplifier IC, flipchip APD, and slant-end fibre," Elect. Lett., Vol. 27, No. 18, pp.1602-1605, 1991. [4] Y. S. He, L. D. Garrett, K. -H. Lee, and J. C. Campbell, "Monolithically integrated silicon nMOS pin photoreceiver," Elect. Len., Vol. 30, No. 22, pp. 1887-1888, 1994. [5] M. Yamamoto, M. Kubo, and K. Nakao, "Si-OEIC with a built-in pin-photodiode," IEEE Trans. Elect. Devices, Vol. 42, pp.58-63, Jan. 1995. [6] M. Kyomasu, "Development of an integrated high speed silicon PIN photodiode sensor," IEEE Trans. Elect. Devices, Vol. 42, pp.1093-1099, June 1995. [7] L. D. Garrett, J. Qi, C. L. schow, and J. C. Campbell, "A silicon-based integrated NMOSp-i-n photoreceiver," IEEE Trans. Elect. Devices, Vol. 43, pp.411-416, Mar. 1996. [8] S. M. Sze, Physics of semiconductor devices, 2nd Ed. New York: John Wiley & Sons, 1981. [9] K. K. Linder, F C. Zhang, J. -S. Rieh, and P. Bhattacharya, "Reduction of dislocation density in mismatched SiGe/Si using a low-temperature Si buffer layer," Appl. Phys. Lett. Vol. 70, No. 24, pp.3224-3226, June 1997.

Monolithically Integrated SiGe/Si PIN-HBT Front-End Photoreceivers J. -S. Rieh, D. Klotzkin, 0. Qasaimeh, L.-H. Lu, K. Yang, L. P. B. Katehi, and P. Bhattacharya Department of Electrical Engineering and Computer Science University of Michigan, Ann Arbor, MI 48109-2122 E. T. Croke Hughes Research Laboratory, 3011 Malibu Canyon Road, Malibu, CA 90265 Abstract Fabrication and characterization of monolithically integrated SiGe/Si PIN-HBT transimpedance photoreceivers are reported. SiGe/Si technology has been developed leading to SiGe/Si HBTs with fT =23 GHz and fmax =34 GHz, and to PIN photodiodes with responsivity of 0.3 A/W at X=850 nm and bandwidth of 450 MHz. SiGe/Si HBT transimpedance amplifiers showed transimpedance gain of 52.2 dBQ and bandwidth of 1.6 GHz, and the photoreceivers exhibited the bandwidth of 460 MHz. I

I. Introduction The commercial market for optoelectronic integrated circuits (OEICs) is expanding at a rapid rate and the envisaged huge demand for OEICs will necessitate large-scale production of these components, which requires a technology that provides low cost and high reliability as well as high speed operation. Existing Si technology is low cost and provides high reliability. There have been several reports on the implementation of OEICs, especially monolithic photoreceivers, with Si technology[1-4]. SiGe/Si technology is developing rapidly and has been proven to overperform Si technology in terms of the speed of devices[5]. SiGe/Si technology is also expected to provide low cost and high reliability as it is compatible with the well-matured Si technology. There have been reports on photodiodes based on SiGe/Si technology[6-9]. However, no results on monolithically integrated front-end photoreceivers based on SiGe/Si technology have yet been reported. In this study, we report the first monolithically integrated SiGe/Si PIN-HBT front-end photoreceiver circuit based on SiGe/Si HBTs and SiGe/Si photodiodes. II. Fabrication of Front-End Photoreceiver Circuits The schematic of the SiGe/Si PIN-HBT structure, grown by one step molecular beam epitaxy (MBE) is shown in Fig l(a). It is basically a double heterojunction npn HBT structure. The emitter and collector layers consist of Sb-doped Si, while the base layer is a B-doped SilxGex alloy, which has a smaller bandgap than Si. The Ge mole fraction in the base layer is graded from x=O. (emitter side) to x=0.4(collector side) to generate a quasi-electric field and to accelerate electrons travelling across the base toward the collector. Spacer layers are inserted on both sides of the base to minimize the effect of dopant outdiffusion during epitaxy, processing, and circuit operation. The base and collector layers of the HBT are used to form the PIN photodiode. Note 2

that the absorption layer of the photodiode is Si. This kind of one step epitaxy approach provides advantages over regrowth such as better planarity, simpler processing, and higher yield. The epitaxial layers were grown at the rate of 2 A/sec at a background pressure of 6x10-9 Torr. The growth temperature was 415 ~C for the collector and emitter layers, and 550 'C for the base layer. Monolithically integrated SiGe/Si PIN-HBT photoreceivers based on the SiGe/Si HBTs with an emitter size AE=5x5 gim2 and the photodiodes with a mesa size of AM=12xl3 4m2 have been designed for fabrication and characterization. Figure 1(b) shows the circuit diagram of the photoreceiver with a transimpedance amplifier. It consists of a photodiode, common emitter gain stage, two emitter follower buffers, and a resistive feedback loop. Q1, Q4, and Q5 are inserted as level shifting diodes. Two voltage sources, VDD and VCc, are used for diode and circuit biasing, respectively, to optimize the operating points independently. The value of the feedback resistor RF determines the bandwidth, gain, and noise characteristics of the photoreceiver and should be chosen based on a trade-off between these parameters. In this circuit, the value of the feedback resistor RF was chosen to be 640 Q. The fabrication procedure for the photoreceiver circuits is as follows. The emitter contact(Cr/Au=500/2000 A) is defined by evaporation, followed by emitter mesa formation with a combination of SF6 and 02 -based dry etching and KOH-based wet etching. This two step etch provides minimal emitter undercut and base overetch, resulting in the reduction of base access resistance. Evaporation of the self-aligned base metal(Pt/Au=200/1300 A), which is also used as the p-contact for PIN photodiodes, follows and then the base mesa is formed by dry etching. Collector contact(Ti/Au=500/2000 A) is defined by evaporation on the exposed highly doped subcollector layer, which is also shared as an n-contact for photodiodes. Device isolation by dry etching is followed by SiO2) layer deposition with plasma-enhanced chem 3

ical vapor deposition (PECVD) and via hole formation. Thin film resistor(NiCr=700 A) and interconnection metal(Ti/Alr/Ti/Au=500/11000/500/3000 A) layers are subsequently evaporated. Finally, airbridges are built up by the evaporation of thick metal(Ti/AlITi/Au=500/16000/500/ 3000 A). The schematic cross section profile of the fabricated circuit is shown in Fig. 2. HI. Results and Discussion Device characteristics of npn SiGe/Si HBTs, fabricated with the processing procedure above, have been obtained with DC and RF measurements. The DC current gain P was measured to be 25, while collector and base ideality factors were extracted to be nc= 1.12 and nb=l.84, for the device with an emitter size of AE=2.5x1O |Jm2. The current-voltage characteristics of the device are shown in Fig 3(a). The frequency response was obtained from the S-parameters measured with a HP8510 network analyzer in the 0.5-25.5 GHz frequency range. Values for cut-off frequency fT and maximum oscillation frequency fmax of the device are 23 GHz and 34 GHz, respectively. The device with an emitter size of AE=SXS (Jm2, which has been incorporated into the circuits, exhibits fT and fmax of 25 GHz and 21 GHz, respectively. Electrical and optical properties of mesa type PIN photodiodes, fabricated from the HBT samples, were also measured. The device area is 12x13 jim2 and a ring-shaped metal contact is formed on the top p' SiGe layer. To enhance the optical coupling efficiency, a PECVD SiO9 layer of 1.1 jim thickness was deposited as an antireflection coating. The dark current and photocurrent of the photodiode with 22 jiW incident optical power at X=850 nm are shown in the inset to Fig. 3(b). The measured responsivity was 0.3 A/W at a reverse bias of 5 V and steadily increased as the reverse bias was increased. The corresponding external quantum efficiency is 43%. The band 4

width of the photodiode measured with X=850 nm light was an increasing function of the reverse bias and was around 450 MHz at a reverse bias of 9 V, as shown in Fig. 3(b). This rather small bandwidth can be ascribed to the slow diffusion and the recombination of carriers generated outside the absorption layer. The n- absorption layer of the photodiode is relatively thin(2000 A) and very small fraction of the incident photons are absorbed in this region, compared to those absorbed outside it. Our calculations indicate that the diffusion current constitutes more than 90% of the total photocurrent for the given photodiode structure. This performance can be compared to those of waveguide PIN photodiodes, where incident photons are absorbed mostly in the waveguide absorption region owing to the difference in the refractive index of Si and SiGe alloy, exhibiting GHz-ranged bandwidths[6-9]. The electrical characteristics of the transimpedance amplifier were measured with a HP85 10 network analyzer. The transimpedance gain of the amplifier is 52.2 dBLQ and the bandwidth is 1.6 GHz. The frequency response of the photoreceiver circuit was measured with the system used for the photodiodes. Figure 3(c) shows the relative frequency response of the fabricated photoreceiver excited with X=850 nm light at the biases VDD=9 V and Vcc=6 V. The -3 dB bandwidth was measured to be 460 MHz, which is close to the bandwidth of the photodiode and far smaller than that of the transimpedance amplifier. This strongly implies that the bandwidth of the photoreceiver is limited by that of the photodiode, not by the bandwidth of the transimpedance amplifier. The bandwidth of the photoreceiver is expected to increase by optimizing the photodiode structure. Since direct sensitivity measurements could not be made, the noise characteristics of the photoreceiver were calculated with a noise equivalent circuit, taking into account the photodiode dark-current shot noise, base- and collector-current shot noise, and thermal noise generated by the feedback resistor and the biasing resistor of the first gain stage. The calculated input noise 5

current spectral density is 8.2 pA/JTtz up to 1 GHz, dominated by shot noise from base current and thermal noise from the feedback resistor. With this value of noise current, estimated photoreceiver sensitivities of -24.3 dBm and -22.8 dBm are obtained for 0.5 Gb/s and 1 Gb/s, respectively, for a bit-error rate (BER) of 10-9 and X=850 nm. IV. Conclusion SiGe/Si PIN-HBT technology has been developed and applied to the fabrication of monolithically integrated SiGe/Si photoreceivers. The HBTs exhibit fT and fmax of 23 GHz and 34 GHz, respectively. Mesa-type PIN photodiodes showed responsivity of 0.3 A/W at X=850 nm and a diffusion limited bandwidth of 450 MHz. The SiGe/Si HBT transimpedance amplifiers have a transimpedance gain of 52.2 dBf and bandwidth of 1.6 GHz. The optical bandwidth of the SiGe/ Si photoreceivers was measured to be 460 MHz, which is apparently limited by that of the photodiodes. The sensitivity values of the photoreceiver are calculated to be -24.3 dBm and -22.8 dBm for 0.5 Gb/s and 1 Gb/s, respectively, for BER of 10-9 and X=850 nm. Acknowledgment This work is being supported by NASA-Cleveland under grant NAG3-1903 and the AFOSR under grant F49620-95-1-0013. 6

References [1] Y. S. He, L. D. Garrett, K. -H. Lee, and J. C. Campbell, "Monolithically integrated silicon nMOS pin photoreceiver," Electronics Letters, Vol. 30, pp. 1887-1888, 1994. [2] M. Yamamoto, M. Kubo, and K. Nakao, "Si-OEIC with a built-in pin-photodiode," IEEE Transactions on Electron Devices, Vol. 42, pp. 58-63, Jan. 1995. [3] M. Kyomasu, "Development of an integrated high speed silicon PIN photodiode sensor," IEEE Transactions on Electron Devices, Vol. 42, pp. 1093-1099, June 1995. [4] L. D. Garrett, J. Qi, C. L. Schow, and J. C. Campbell, "A silicon-based integrated NMOS-p-in photoreceiver," IEEE Transactions on Electron Devices, Vol. 43, pp. 411-416, Mar. 1996. [5] A. Schuppen, U. Erben, A. Gruhle, H. Kibbel, H. Schumacher, and U. Konig, "Enhanced SiGe heterojunction bipolar transistors with 160 GHz-fmax," IEDM Technical Digest, pp. 743-746, 1995. [6] H. Temkin, T. P. Pearsall, J. C. Bean, R. A. Logan, and S. Luryi, "GeSii. strained-layer superlattice waveguide photodetectors operating near 1.3 gim," Applied Physics Letters, Vol. 48, pp. 963-965, April 1986. [7] A. Splett, T. Zinke, K. Petermann, E. Kasper, H. Kibbel, H. -J. Herzog, and H. Presting, "Integration of waveguide and photodetectors in SiGe for 1.3 gm operation," IEEE Photonics Technology Letters, Vol. 6, pp. 59-61, Jan. 1994. [8] B. Jalali, L. Naval, and A. F. J. Levi, "Si-based receivers for optical data links," Journal of Lightwave Technology, Vol. 12, pp. 930-935, June 1994. [9] T. Tashiro, T. Tatsumi, M. Sugiyama, T. Hashimoto, and T. Morikawa, "A selective epitaxial SiGe/Si planar photodetector for Si-based OEIC's," IEEE Transactions on Electron Devices, Vol. 44, pp. 545-549, April 1997. 7

Figure Captions Figure 1. (a) SiGe/Si HBT grown by molecular beam epitaxy; (b) Circuit diagram of the photoreceiver. Figure 2. Schematic cross section profile of the fabricated photoreceiver. Figure 3. (a) Measured current-voltage characteristics of the HBT; (b) Measured frequency response of the photodiode with the dark- and photocurrent variation shown in the inset. The solid line shows the fits to the measured response; (c) Measured frequency response of the photoreceiver. The solid line shows the fits to the measured response. 8

Emitter Contact Emitter Spacer Base Spacer Collector Subcollector Substrate Si Si Si09gGe01, Si0.6Geo.4 Si Si Si n1+ n i i 1X1019 200 nm 2x1018 100 nm 1 nm 5x1019 30 nm 10 nm 1x1016 250 nm 1x1019 1.5 ~Lm 2x1012 540 ~Lm n p (a) Figure 1 9

VCC hv Vout (b) Figure 1 10

Photodiode HBT Passive elements Figure 2 11

r-" u L Q 5 4 3 2 1 0 0 1 2 3 4 VCE [V] 5 (a) Figure 3

5 ~... -i, —.... - w w iw * — w o A=12xl3gm2 Pinc=22 gW........................................................................8.. -'='8'50 nm.. * X* BW=450 MHz ri -5 1o-2.......,. o 100-3 o 10-5 Iphoto _ -10 10-. 10 -7 10;-9 o -15 1010 o- 10.1.. 0 2 4 6 8 10 12 Reverse Bias [V] -20........ I., 0.1 1 5 Frequency [GHz] (b) Figure 3 13

5. —.... I... v - Q f~ 0............. o............................................ -10 0 -15 -20........... 0.1 Frequency [GHz] (c) ~ I Vcc=6 V VDD=9.............V X=850 nm BW=460 MHz Ag4 So or.. I 1 2 3 Figure 3

X- and Ku-band Amplifiers Based on Si/SiGe HBTs and Micromachined Lumped Components J. -S. Rieh, L.-H. Lu, L. P. B. Katehi, and P. Bhattacharya Department of Electrical Engineering and Computer Science University of Michigan, Ann Arbor, MI 48109-2122 E. T. Croke Hughes Research Laboratory, 3011 Malibu Canyon Road, Malibu, CA 90265 G. E. Ponchak and S. A. Alterovitz NASA Lewis Research Center, Cleveland, OH 44135 Abstract Double mesa structure Si/SiGe heterojunction bipolar transistor(HBT) and novel micromachined lumped passive components have been developed and successfully applied to the fabrication of Xband and Ku-band monolithic amplifiers. The fabricated 5x5 Jm2 emitter size Si/SiGe HBT exhibited a DC current gain 3 of 109, and fT and fax of 28 GHz and 52 GHz, respectively. Micromachined spiral inductors demonstrated resonance frequency of 20 GHz up to. 4 nH, which is higher than that of conventional spiral inductors by a factor of 2. Single-, dual-, and three-stage X 1

band amplifiers have been designed, based on the extracted active and passive device model parameters. A single-stage amplifier exhibited a peak gain of 4.0 dB at 10.0 GHz, while dual- and three-stage versions showed peak gains of 5.7 dB at 10.0 GHz and 12.6 dB at 1 1.1 GHz, respectively. A Ku-band single-stage amplifier has also been designed and fabricated, showing a peak gain of 1.4 dB at 16.6 GHz. Matching circuits for all these amplifiers were implemented by lumped components, leading to a much smaller chip size compared to those employing distributed components as matching elements. 2

I. Introduction As the major application field of microwave circuits shifts from military to commercial markets, monolithic microwave integrated circuits (MMICs) based on Si technology have received great attention due to their lower cost compared to m-V components. Also attractive as the main advantages of Si MMICs are the matured Si technology, compatibility with Si CMOS technology, mechanical stability of Si substrate, and superior thermal conductivity of Si. In particular, CMOS compatibility opens a great opportunity for the integration of radio frequency (RF) modules into low frequency circuitry. In view of these facts, a great expansion of the Si MMIC market is anticipated in the near future. The first attempt to fabricate Si based microwave circuits can be traced back to the 1960's[l]. Since then, however, the development of Si monolithic microwave circuits has been impeded by several obstacles, the most significant of which are the absence of semi-insulating substrate and the inferior operation frequency of Si based devices. Recently, these two shortcomings have been removed by the availability of high-resistivity Si substrate and the emergence of high quality SiGe epitaxial layers. It has been reported that the dominant factor in transmission line loss is conductor loss, rather than dielectric loss, if the resistivity of the substrate is close to or higher than 10 kf2cm[2]. Fortunately, the matured impurity control techniques at the present time have led to the production of Si substrate with p > 10 kQcm, so that the lossy substrate may not be a limitation for Si MMICs. On the other hand, the recent advances in the growth of epitaxial SiGe layers have led to high quality Si/SiGe heterojunctions and, consequently, to high performance Si based devices employing these heterojunctions. This development of Si/SiGe device technology, especially that of Si/SiGe HBTs, has pushed the operating frequency of these devices to higher 3

than 100 GHz, approaching that of GaAs based devices and eliminating the remaining limitation for Si MMICs[3-5]. Owing to the breakthrough in the Si based device technology, there have been a number of reports on successful implementation of Si/SiGe HBT based MMICs operating at X-band or at even higher bands. Voltage controlled oscillators(VCOs) with oscillation frequency of 26 GHz and 40 GHz[6] and X-band mixers[7] have been realized based on Si/SiGe HBTs. A narrow band amplifier at Ka-band[8] and a wideband amplifier up to Ku-band[9] have also been implemented with Si/SiGe HBTs. However, all these circuits are designed with distributed matching components, resulting in rather large circuit areas. For large scale integration of circuits, which is essential in future commercial applications, reduction of chip size is critical. This can be achieved by employing lumped components as matching elements, owing to their smaller dimensions compared with distributed ones up to 30 GHz. Lumped components, however, generally suffer from low resonance frequency and this limits the frequency range of lumped matching circuits. This strongly motivates the development of lumped components with higher resonance frequency, compatible with Si based microwave transistors. In this study, novel micromachined lumped passive components on Si substrate have been developed, leading to a drastic improvement in the resonance frequency of inductors. Based on this, a Si/SiGe MMIC technology, combining double mesa structure Si/SiGe HBT technology and the micromachining technique has been developed. With this technology, X- and Ku-band Si/SiGe monolithic circuits employing micromachined lumped component matching networks have been successfully implemented for the first time. In this paper, the details of the Si/SiGe HBT MMIC technology are described in section II, followed by section mI describing the performances of active and passive devices. The design and performance of single-, dual- and three-stage X-band amplifiers and a single-stage Ku-band 4

amplifier is described and discussed in section IV. Conclusions are made in section V. II. Technology Growth of high-quality epitaxial layers and reproducible and reliable processing are the key factors in the successful development of high performance devices and circuits. We have grown npn double heterojunction Si/SiGe HBT structures and developed a stable SiGe MMIC process. Two methods are widely used for the growth of Si/SiGe heterostructures: MBE growth and UHV/CVD growth. MBE growth benefits from the larger dynamic range in doping concentration(1014_1021 cm-3) and lower growth temperature, while UHV/CVD growth offers higher throughput, which is favored for mass production[10]. In this study, the HBT heterostructures were grown by MBE, except for the thick subcollector layer(Fig. 1). The detailed growth sequence is as follows: arsenic-doped subcollector layer(1.5 pjm) is grown by CVD on a highresistivity (100) Si wafer, whose resistivity is higher than lOkQcm according to a spread resistance analysis(SRA). Then, the wafer is loaded into the MBE chamber for the growth of antimony-doped Si collector layer and boron-doped SiGe base layer. Two design issues for base layer are briefly discussed here: spacer layers and Ge composition profiles. The outdiffusion of boron, which may occur during the epitaxy, processing, and circuit operation, is known to move the p-n junction toward the emitter, away from the Si/SiGe heterojunction. This would give rise to parasitic energy barriers in the conduction band, resulting in the increase of the base transit time TB and the reduction of the cutoff frequency fT[1 1]. To suppress the boron outdiffusion, intrinsic spacers are frequently introduced as a buffering layer. In this study, a 50 A spacer layer is inserted on both sides of the base layer and no significant outdiffusion effects have been observed. A uni 5

form Ge composition profile of 40% is employed for the SiGe alloy in the base layer. Compared with a graded composition profile(smallest mole fraction at E-B junction), uniform profile shows larger base transit time rB due to the absence of the quasi-electric field. But, the larger bandgap offset at the E-B junction in the case of a uniform profile provides larger current gain P and smaller emitter delay time tE[12]. In addition, the larger Ge composition at E-B junction reduces the possibility of overetching the base layer during the selective wet etching of emitter layer in mesa type HBT processing, since the selectivity is higher for larger Ge composition in SiGe alloy. This leads to a smaller base access resistance. The Ge composition profile is determined by a trade-off between these parameters and the uniform profile was favored in this study. Base doping concentration is another issue in base design. SRA result shows that the base doping concentration of the structure is 2x1019 cm-3, which is believed to be underestimated because the measurement step is about the same order as the base layer thickness. The actual concentration is believed to be close to x 1020 cmn3, including unactivated dopants, which are not considered in SRA. After the growth of the base layer and spacer layers, antimony-doped Si emitter layer and emitter cap layer are deposited subsequently. All the MBE epitaxial layers were grown at a rate of 2 A/min at a background pressure of 6x10-9 Torr. The growth temperature was 550 ~C for the base layer and 415 ~C for the collector and emitter layers. SiGe MMICs with double mesa structure HBTs have been fabricated with standard lift-off and etching techniques, using the epitaxial wafers described above. The process starts with emitter metal contact formation(Cr/Au=500/2000 A) on the highly-doped emitter contact layer by evaporation and lift-off. The metal contact is used as an etch mask for the following base layer exposure step. The base exposure is the most critical step in the fabrication of mesa-type HBTs since this process directly affects the fma of the devices through the parasitic base resistance RB. 6

Hence, this step is discussed here in more detail. Overetching of the base layer and the excessive lateral undercut of emitter sidewall should be avoided to keep the value of RB small, while moderate undercut and vertical emitter sidewall profile are required for the following self-aligned base metal deposition. To meet these requirements, we have employed an angled emitter contact formation and two step etching. Two step etching is performed by the combination of dry and wet etching. First, SF6 and 02-based anisotropic reactive ion etch (RIE) removes the biggest portion of the emitter layer without undercut. Second, KOH-based selective solution(KOH:K2Cr2O7:H20 =50g:2g:200ml) etches away the remaining emitter layer and stops close to the E-B heterojunction. The etching selectivity of the KOH solution was found to be higher than 10 at 30 ~C for Ge composition of 40%. With this two step etching, emitter sidewall undercut can be much reduced since the sidewall is laterally etched only during the short wet etching cycle. The purpose of the angled emitter contact pattern is as follows. The etch rate of the Si in KOH-based solution is crystal-orientation dependent, exhibiting much smaller etch rate for (111) orientation compared with those for (100) and (110) orientations[13][14]. This orientation dependence gives rise to trapezoidal sidewall etch profile when etch mask patterns on (100) wafers are aligned along (110) orientation, which is parallel to the major flat of the wafer. On the other hand, vertical sidewall profile can be obtained when the etch mask patterns are aligned along (100) orientation, which is 45~ off the major flat of (100) wafer. This is depicted in Fig. 2 with SEM pictures, which show resultant trapezoidal and vertical sidewall profiles for etch mask patterns aligned along (110) orientation(A-B), and (100) orientation(C-D), respectively. Therefore, the self-aligned deposition of base metal, using emitter metal patterns as etch mask for KOH-etching, will be successful only if emitter patterns are aligned 45~ off the major flat. Otherwise, the base metal will eventually touch the protruding emitter sidewall, electrically shorting the emitter and base. Rapid thermal anneal 7

ing(RTA) is done for 20 sec at 400 ~C for the optimized ohmic contact of emitter metal. After the self-aligned base metal deposition(Pt/Au=200/1300 A) by evaporation, the base mesa is formed by RIE, exposing the highly doped subcollector layer for collector contact. Collector metal(Ti/ Au=500/2000 A) contact is defined by evaporation and lift-off, followed by another RTA (3sec, 375 C) for the base and collector ohmic contact. Device isolation RIE finishes the processing steps for active devices, leaving the high-resistivity Si substrate exposed. Passive devices are built on the exposed substrate. Three successive evaporations provide basic building blocks for MIM capacitors; bottom metal layer(Ti/AliTi/Au/Ti/Ni=500/9000/500/3000/500/1500A), dielectric layer(SiO=2000A), and top metal layer(Ti/Ni=500/1000). The bottom metal layer also serves as a feeding line for spiral inductors. Intermetal dielectric layer(SiO2=lgm), which also passivates HBTs, is deposited by plasma-enhanced CVD(PECVD). On top of the deposited SiO2 layer, thin film resistor is formed by the evaporation of 500 A NiCr layer. Via holes for contacts are opened by selective dry etching of the SiO2 layer. This is followed by a thick metal(Ti/AlfTi/Au/At/ Ni=500/15000/500/4000/500/1500 A) evaporation, which provides device interconnection, probing pads, inductor spirals, and top contact of MIM capacitors. Finally, a two step deep RIE removes the exposed SiO2 layer and Si substrate while active devices and resistors are covered with photoresist for protection. This is the micromachining step which improves the resonance frequency of inductors, as will be discussed in more detail in the next section. No airbridge is employed in this process. 8

III. Device performance A. Active devices - Si/SiGe HBTs Double mesa structure Si/SiGe HBTs with various dimensions have been fabricated and their DC and RF properties were measured. The following discussion will focus on the characteristics of devices with emitter area AE=5x5 (tm2, since these devices have been employed to the design of actual circuits. The devices have base-collector junction area of ABC=12X13 gim2, which is also an important parameter for maximum oscillation frequency fmax. The common emitter current-voltage characteristics are shown in Fig. 3(a). As can be seen from the plot, the device suffers from the Kirk effect, which arises from the concentration inversion of injected carriers and space charge in the collector depletion region. This can be ascribed to the relatively low collector doping concentration(5x1015cm'3) of the device. This effect appears to be more severe for low VCE, since the velocity of the injected carriers is smaller at lower voltage leading to the higher effective carrier concentration. However, the device and circuit operation would not be affected by the Kirk effect, provided the operating bias point is chosen outside the value for which the Kirkeffect is operative, and the signal amplitude is not significantly large. The offset voltage of the device is very close to zero, implying the symmetry of E-B and B-C heterojunctions as a consequence of uniform Ge composition across the base layer. Figure 3(b) shows the Gummel plot of the identical device. The collector and base ideality factors are extracted to be nc=1.04 and nb=1.79, respectively. The DC current gain P is measured at the fixed collector-emitter voltage VCE=4 V, as shown in the inset. Values higher than 100 are obtained for most of the operating current range with the maximum value of 109 occurring at Ic=10.4 mA. S-parameters have been 9

measured for a frequency range of 0.5-25.5 GHz with H85 10B network analyzer in order to investigate the RF characteristics of the device. Figure 3(c) shows the current gain H21 and the unilateral power gain U as a function of the frequency at a bias point of Ic=7.0 mA and VCE=4.0 V. The corresponding fT and fmax obtained from the extrapolation of IH211 and U on the assumption of -6 dB/octave roll-off, are 28 GHz and 52 GHz, respectively. Higher fma values could be obtained if the lateral dimension of the device is optimized for smaller base spreading resistance. Measured S-parameters have been utilized for the small signal modeling of the device with a HBT T-model. The equivalent circuit is given in Fig. 4, along with the corresponding parameters extracted from the method proposed in [15]. B. Micromachined passive components Planar lumped inductors are widely used in MMIC as matching elements, bias chokes and filter components. Compared with distributed transmission line components, lumped components are smaller, especially at frequencies below 30 GHz. As a result, lumped component circuits can be more compact than distributed ones in MMIC applications. However, planar lumped components suffer from parasitic effects. In particular, planar lumped spiral inductors exhibit very low resonance frequencies due to the parasitic capacitance, thus limiting operating frequencies. Work has been done by fabricating the inductors on a dielectric membrane to increase the resonance frequency[16][17]. This technique is difficult to adopt for integration with active devices, since it requires the development of a dielectric membrane between the bulk high-resistivity Si and the doped layers. Recently, an air-gap stacked spiral inductors, using air-bridge technology has been introduced[l18]. By stacking metal lines, inductor area can be reduced by 25% to 45% and the resonance frequencies can be increased by 10% to 15% compared with conventional spiral inductors. 10

However, the increase of resonance frequencies is not enough for MMIC applications in Ku-band or higher. To obtain a inductor with higher resonance frequency, a new micromachined spiral inductor has been developed, as shown in Fig. 5(a). In this inductor structure, bottom metal layer and interconnection metal layer, separated by a intermetal PECVD SiO2 layer, form the feed line and spirals of inductors, respectively. By covering the metal structure with Ni which is used as a selfaligned mask and removing the exposed PECVD SiO2 layer and Si substrate material in between the turns by RIB, the effective dielectric constant of this structure can be reduced. This results in a smaller series and shunt parasitic capacitance from turn to turn (Cc) and from the signal line to ground (Cp) as shown in the equivalent model of the inductor (Fig. 5(b)). Due to the significant reduction of the parasitics, the resonance frequency can be increased drastically. By measuring the dual-port S-parameters of the inductors up to 40 GHz using HP85 10C, the resonance frequencies are extracted. Figure 5(c) shows the resonance frequencies of the micromachined inductors and conventional ones. Compared with conventional spiral inductors, a 50% improvement in resonance frequencies can be obtained by a 10 gm-deep RIE, and the improvement can be as high as 100% if a 20 gm-deep RIE is used. MIM capacitors have been fabricated and characterized. As mentioned earlier, evaporated SiO film(d=2000 A) is used as a dielectric material and sandwiched by bottom and top metal layers. Top metal layer protects the dielectric film during via hole opening process and the top feeding contact is provided by much thicker interconnection metal to reduce the parasitic resistance and inductance. SiO is preferred to SiO2 as a dielectric film, since SiO provides higher dielectric constant, leading to smaller capacitor area. The dielectric constant er of the evaporated SiO, extracted from the capacitance and the area of fabricated capacitors, is 4.7, which provides a 11

capacitance of 0.21 fF/gIm2. The measured capacitors exhibit resonance frequencies higher than 20 GHz up to I pF. Since the capacitance values of the matching capacitors in X- and K-band application rarely exceed 1 pF, these capacitors can safely be applied to circuits at these bands. Thin film resistors are also indispensable components in most microwave circuits, frequently applied to bias circuits and feedback loops. 500 A NiCr film was evaporated to realize thin film resistors. The sheet resistance of the film is found to be in the range of 45-50QJEJ. Interconnection line sections were also fabricated and characterized, since they are frequently employed to connect adjacent components on circuits. They can be considered as electrical shorts in low frequency operations, but they behave mainly as inductors in the microwave frequency range, and their effect have to be considered for rigorous microwave circuit designs. The inductance of line sections shows fairly linear relation with the length of the line, which implies that the total inductance is dominated by self-inductance rather than mutual inductance. The inductance per unit length of 2.2 gm thick, 10 gm wide line sections is found to be around 1. 1 pHlgm. Interconnection line sections may be inserted to circuits on purpose for a fine tuning of inductance matching of circuits. The test structures for all these passive components were fabricated with various dimensions, which cover the entire range of practical interest. S-parameters were measured for the fabricated test patterns and used for modeling with appropriate equivalent circuits which include possible parasitics as shown in Fig. 5(a) and Fig. 6. This completes a passive components library to be used for circuit design. 12

IV. Amplifier Design and Performance After fabrication and characterization of active devices and passive components, the measured S-parameters and equivalent circuit parameters are utilized for circuit design. In this study, X-band single-stage, dual-stage, and three-stage Si/SiGe HBT amplifiers have been designed, fabricated, and characterized. A preliminary result of a Ku-band single-stage amplifier is also discussed. A. Single-stage amplifier Figure 7(a) shows the circuit diagram of the X-band single-stage amplifier. Basically, it consists of one Si/SiGe HBT common emitter amplifying stage, along with input and output matching networks and bias circuit. L1 and C1 provide a conjugate power matching to the input of amplifying stage, while L2 and C2 are employed for output power matching. L2 also functions as a RF choke. This, together with the bypass capacitor C3, isolates VCC from the amplifier. Base current is supplied from the input of the circuit, together with input RF signal. The photomicrograph of the fabricated circuit is shown in Fig. 7(b). The chip size is 0.75x0.65 mm2. Considering that circuits with distributed matching components usually stretch up to around half the wavelength at the operating frequency, this chip size may be less than 20% of the corresponding distributed matching circuit. The S-parameters of the fabricated circuit was measured with HP8510C network analyzer with DC bias supplies from HP4145B semiconductor parameter analyzer. The measured transducer gain S21 is shown in Fig. 7(c), along with input and output return losses S1 1 and S22 at the bias of VcE=4.7 V and Ic=9.9 mA. The bias was optimized for maximum gain. A peak gain of 4.0 dB occurs at 10.0 GHz. The output return loss S22 has min 13

imum value less than -20 dB, which is reasonably low. However, the minimum value of input return loss SI is only around -7 dB. This may be explained by the process variations which would change parasitic values of devices, thus leading to shifts in S-parameters. Input and output voltage standing wave ratios(VSWR), calculated from the input and output return losses, exhibit minimum values of 2.73 and 1.21, respectively. A Ku-band single-stage amplifier is also designed and fabricated. The circuit configuration is basically same as X-band version. Only the passive component values are changed to meet the new matching condition at Ku-band. The complete circuit occupies an area of 0.62x0.64 mm2, which is slightly smaller than X-band circuit, due to smaller passive element dimensions required for higher frequency. The horizontal dimension of the circuit is still less than single-eighth of the wavelength, suggesting that the advantage of lumped matching is still obvious for Ku-band in terms of circuit area. The gain and return losses are shown in Fig 8(a). The gain S21 exhibits a peak value of 1.4 dB at a frequency of 16.6 GHz and the gain keeps positive values over 20 GHz, reaching K band. The input return loss S22 is close to -25 dB and the output return loss S1 1 exceeds -11 dB. The input and output VSWR of the amplifier have the minimum values of 1.69 and 1.14, respectively, as shown in Fig. 8(b). B. Dual-stage amplifier A dual-stage amplifier is designed with a similar approach as the single-stage amplifier and its schematic is shown in Fig. 9(a). It consists of two common emitter stages and three matching networks. Input matching keeps the same configuration as single-stage amplifier consisting of LI and Cl. L2 and C2, L3 and C3 constitute interstage and output matching network, respectively. C2 also functions as a blocking capacitor separating the first and second amplifying stages DC 14

wise, and L2 behaves as RF choke as in the case of the single-stage amplifier. VcC supplies collector voltage for the first stage and, simultaneously, base current for the second stage via a resistor voltage divider. R1 and R2 values were carefully selected to give a accurate base-emitter voltage for optimum bias since the base current is very sensitive to the voltage across base and emitter. The resistor values are liable to change from process to process since the film is too thin(500 A) to be accurately controlled by evaporation. However, the ratio of R1 and R2 is unchanged, even if the absolute resistance values fluctuate, leading to a stable base current supply at the input of the second stage. The base current for the first stage and the collector voltage for the second stage are supplied through the input and output port of the amplifier, respectively. The photomicrograph of the fabricated circuit is shown in Fig. 9(b). The chip size is 0.98x0.80 mm2, which is 60% larger than that for the single-stage amplifier. In this context, it is apparent that the area per stage reduces as the number of stage increases. The gain is 5.7 dB at 10.0 GHz and the input and output return loss remains between -5 dB and -10 dB (Fig. 9(c)). The higher complexity of the circuit, compared with single-stage amplifier, is believed to result in poor return loss and lower gain per stage. C. Three-stage amplifier A three-stage amplifier is designed in a manner similar to the single- and dual-stage amplifiers. Three common emitter amplifying stages and 4 matching networks are the basic building blocks for the amplifier(Fig. 10(a)). Similar to the dual-stage amplifier case, VcCl supplies collector voltage to the first stage and base current for the second stage, while VCC2 supplies collector voltage and base current for the second and third stage, respectively. L2 and L3 are employed for both matching elements and RF chokes, while C2 and C3 serve as matching components as well as blocking capacitors. Base current for the first stage and collector voltage for the third stage are 15

supplied from the input and output port, respectively. The chip size i.as shown is 1. mm Fig. 10(b). The area per stage is 0.32 mm2, 60% of the single-stage amplifier. The measurement result is shown in Fig. 10(c). The peak gain is 12.6 dB, occurring at 11.1 GHz. The input and output return losses are found to be between -10 dB and -15 dB. Ripples can be seen in the plots. These may be attributed to either extrinsic or intrinsic factors. Extrinsic factors usually involve the measurement environment connected to the device under test (DUT). Occasionally, the bias supply affects the operation of the circuits under test if the isolation of the bias probes is poor. RF choke and bypass capacitors have been employed to isolate the amplifiers under study from the bias probes. This technique may provide insufficient isolation, leading to fluctuations arising from the loading effect. Intrinsic factors are closely related to the stability of the amplifier, which was taken into account in the design to avoid the unstable region in the determination of matching points for each stage. However, process variations may have changed the S-parameters of active devices, resulting in the shift of stability circles on the F plane. Extracted stability factor K and IA1 (A=S1 1S22-S21S12) of the amplifier indicate the unconditional stability of the circuit in the whole band, but this does not 100% guarantee the stability of individual stages. Further investigation is necessary to locate the exact source of the fluctuations. V. Conclusion X- and Ku-band amplifiers, based on Si/SiGe HBTs and a novel micromachined passive component technology have been designed, fabricated, and characterized. The fabricated double mesa structure Si/SiGe HBT(AE=5x5 rim2) exhibited a DC current gain of 109, and fT and fmx of 28 and 52 GHz, respectively. Micromachined spiral inductors demonstrated improved resonance 16

frequency by a factor of more than 2, compared with devices made with conventional processing. This broadens the applicable frequency range of lumped component circuits, leading to reduced chip size at high frequencies. Characteristics of capacitors, resistors, and line sections have also been investigated. Modeling of fabricated active and passive components was carried out with appropriate equivalent circuits and applied to the design of X-band and Ku-band amplifiers. Xband single-stage amplifiers exhibit a peak gain of 4.0 dB at 10.0 GHz, while dual- and threestage amplifiers exhibit peak gains of 5.7 dB at 10.0 GHz and 12.6 dB at 11.1 GHz, respectively. Ku-band amplifier showed a peak gain of 1.4 dB at 16.6 GHz. Minimum circuit area per stage was obtained from three-stage amplifier as 0.32 mm2 in X-band. Acknowledgment This work is being supported by NASA-Cleveland under grant NAG3-1903 and the AFOSR under grant F49620-95-1-0013. 17

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GHz SiGe HBT wideband amplifier," Proceedings of Bipolar/BiCMOS Circuits and Technology, pp. 190-193, 199'5. [10 S. S. Iyer, G. L. Patton, J. M. C. Stork, B. S. Meyerson, and D. L. Harame, "Heterojunction bipolar transistors using Si-Ge alloys", IEEE Transactions on Electron Devices, Vol. 36, pp. 2043-2064, Oct. 1989. [11] J. W. Slotboom, G. Streutker, A. Pruijmboom, and J. Gravesteijn, "Parasitic energy barriers in SiGe HBT's", IEEE Electron Device Letters, Vol. 12, pp. 486-488, Sep. 1991. [12] D. J. Roulston and J. M. McGregor, "Effect of bandgap gradient in the base region of SiGe heterojunction bipolar transistors", Solid-State Electronics, Vol. 35, pp. 1019-1020, July 1992. [13] K. E. Bean, "Anisotropic etching of silicon," IEEE Transactions on Electron Devices, Vol. 25, pp. 1185-1193, Oct. 1978. [14] H. Seidel, L. Csepregi, A. Heuberger, H. Baumgirtel, "Anisotropic etching of crystalline silicon in alkaline solutions - I. Orientation dependence and behavior of passivation layers," Journal of Electrochemical Society, Vol. 137, pp. 3612-3626, Nov. 1990. [15] D. R. Pehlke and D. Pavlidis, "Direct calculation of the HBT equivalent circuit from measured S-parameters," IEEE MTT-s Digest, pp. 735-738, 1992. [16] C. -Y Chi, Planar microwave and millimeter-wave components using micromachiningtechnologies, Ph. D. thesis, The University of Michigan, 1995. [17] Y. Sun, H. van Zeijl, J. L. Tauritz, and R. G. Baets, "Suspended membrane inductors and capacitors for application in silicon MMICs", IEEE Microwave and Millimeter-Wave Monolithic Circuits Symposium, pp. 99-102, 1996. [18] SW. Paek and K. S. Seo, "Air-gap stacked spiral inductor," IEEE Microwave and Guided Wave Letters, Vol. 7, pp. 329-331, Oct. 1997. 19

Figure Captions Figure 1. Si/SiGe HBT material structure. Figure 2. Orientation dependence of KOH etching profile. A-B: aligned for (110) orientation. CD: aligned for (100) orientation. Figure 3. (a) Measured current-voltage characteristics of the Si/SiGe HBT with emitter size of 5x5 gim2; (b) Measured Gummel plot of the HBT(AE=5x5 im2) with DC current gain p in the inset. Current gain is measured with VCE=4 V; (c) IH211 and U of the HBT(AE=5x5 pim2) measured at IC=7.0 mA and VCE=4.0 V. fT=28 GHz and fmax=52 GHz. Figure 4. HBT T-model small signal equivalent circuit and parameters extracted. Figure 5. (a) Photomicrograph of the micromachined spiral inductor with etch depth of 20 nm; (b) Equivalent circuit of spiral inductor. Cpl and Cp2 represent parasitic capacitance between inductor and ground. Cc is parasitic coupling capacitance. Rs is parasitic series resistance. L is main inductance; (c)Resonance frequencies of inductors with various etch depth, detch. Figure 6. (a) Equivalent circuit of MIM capacitor. Cpl and Cp2 represent parasitic capacitance between capacitor and ground. Rs and Ls are parasitic series resistance and inductance, respectively. RC is parasitic parallel resistance. C is main capacitance; (b)Equivalent circuit of resistor and line section. Cpl and Cp2 represent parasitic capacitance between resistor(line section) and ground. Ls is parasitic series inductance and R is main resistance for resistor equivalent circuit. R is parasitic series resistance and Ls is main 20

inductance for line section equivalent circuit. Figure 7. X-band single-stage amplifier: (a) Circuit diagram; (b)Photomicrograph of fabricated circuit. Chip size=0.75x0.65 mm2; (c) Measured transducer gain S21, input return loss S 1, and output return loss S22. Figure 8. Ku-band single-stage amplifier: (a) Measured transducer gain S21, input return loss SI, and output return loss S22; (b) Measured VSWRjj and VSWROut. Figure 9. X-band dual-stage amplifier: (a) Circuit diagram; (b)Photomicrograph of fabricated circuit. Chip size=-0.98x0.80 mm2; (c) Measured transducer gain S21, input return loss S11, and output return loss S22. Figure 10. X-band three-stage amplifier: (a) Circuit diagram; (b)Photomicrograph of fabricated circuit. Chip size= 1.15x0.84 mm2; (c) Measured transducer gain S21, input return loss Sli, and output return loss S22. 21

n+ Si Emitter contact Sb 2xl019cm-3 2000A n Si Emitter Sb 2xl018cm3 1000 i SiO.6Ge0.4 50 p+ Sio.6Geo.4 Base B 2x1019cm'3 200 i Sio.6Geo.4 50 n- Si Collector Sb 5x1015cm-3 3000 n+ Si Sub-collector As 1xl19cm-3 15000A p- Si Substrate 1x1012cm-3 540 gm Figure 1

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