ENGN UMR0142 t-T I m- 1, o 0 18 3 | ~DEPARTMENT OF ELECTRICAL ENGINEERING COOLEY ELECTRONICS LABORATORY w~ |Technical Memorandum No. 83 < A 1-Mc Transistor DC Amplifier By: E. M. AUPPERLE Approved by: H. W. FARRIS $ E L EC 48 R AT o t Under Contract With: CONTRACT NO. DA-36-039 sc-78283, DEPT. OF ARMY PROJ. NO. 3A99-06-001-01, PLACED BY: U. S. ARMY SIGNAL RESEARCH-AND DEVELOPMENT LABORATORY, FORT MONMOUTH, N. J. January 1961

THE UNIVERSLTY OF MICHIGAN ENGINEER'litN Li WpRY TEE UNIVERSITY OF MICHIGAN RESEARCH INSTITUTE ANN ARBOR A 1-MC TRANSISTOR DC AMPLIFIER Technical Memorandum No. 83 2899-44-T. -... -.,; Cooley Electronic Laboratory Department of Electrcal.:Engineering By: E. M. Aupperle Approved by: H. W. Farris A CEL publication is given a memorandum designation due to reservations in one or more of the following respects: 1. The study reported was not exhaustive. 2. The results presented concern one phase of a continuing study. 3. The study reported was judged to have insufficient scope. Project 2899 TASK ORDER NO. EDG-4 CONTRACT NO. DA-36-039 sc-78283 SIGNAL CORPS, DEPARTMENT OF THE ARMY DEPARTMENT OF ARMY PROJECT NO. 3A99-06-001-01 January 1961

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TABLE OF CONTENTS Page LIST OF ILLUSTRATIONS iii ABSTRACT iv 1. INTRODUCTION 1 2. CIRCUIT DESCRIPTION 2 3. EXPERIMENTAL EVALUATION 4 4. APPLICATIONS 7 APPENDIX 8 BIBLIOGRAPHY 13 DISTRIBUTION LIST 14 LIST OF ILLUSTRATIONS Figure Page 1 The completed dc amplifier package. 1 2 Basic open loop circuit. 2 3 Typical feedback arrangement. 4 4 Complete circuit diagram. 5 5 Experimental frequency response. 5 6 Square wave response. 6 7 Dc drift vs. operating temperature. 6 A.1 Differential amplifier stage. 8 A.2 Low frequency, small-signal equivalent circuit of Figure A.1. 8 A.3 Two input configurations (a) Direct (b) Feedback arrangement. 11 A.4 Thevenin equivalent circuit of Fig. A.3(b). 11 iii

ABSTRACT The design and evaluation of a stable, inexpensive, transistor dc amplifier capable of significent voltage gain from dc to several megacycles is presented. This device was built to serve in a wide-band, phase-lock loop application) however, it can replace a conventional operational amplifier in many circuits when space, weight, and bandwidth are important considerations. The amplifier features a differential input and an emitter follower, the latter to provide a low output impedance. iv

A 1-MC TRANSISTOR DC AMPLIFIER 1. INTRODUCTION The voltage gain of a typical dc amplifier is designed to decrease rapidly as a function of increasing frequency. Indeed, the unity gain frequency is seldom more than a few hundred kilocycles. This paper presents the design and analysis of a stable, wide-band, transistor dc amplifier. The amplifier incorporates a differential input stage and is terminated in an emitter-follower stage to provide a low output impedance. The open loop voltage gain of this simple four-transistor circuit is approximately 1000 at low frequencies. With an appropriate feedback resistor the circuit will provide a voltage gain of 50 with the 3db point at 1.1 Mc. Figure 1 is a picture of the completed amplifier. Fig. 1. The completed dc amplifier package.

2. CIRCUIT DISCRIPTION The basic open loop circuit is shown in Fig. 2. This circuit requires both a positive and a negative voltage supply, which conveniently permits a dc output centered about zero. The entire voltage gain results from the first two stages, while the third stage supplies a current gain and provides the low output impedance. The:-V t+V ~-V V V2 vR R3 D VO j ";; ff^ 4-^ 0 o +V -V +V Fig. 2. Basic open-loop circuit. voltage gain of the differential input stage for low-frequency, smallamplitude signals is derived in the Appendix. The result for an appropriate choice of resistor values is: R212(V2-V,) (1) S1 2 -2 1 3 R' 2 + \R Pi where: V3 is the instantaneous voltage across R2 p1 and 2 are the respective values of beta for T1 and T2 2

R and R are the respective values of the source impedance. s1 s2 For the symetrical case where 1 = 2 = and R = R = R, the gain becomes: 2(V2-V (2) 3 2Rs It follows that a substantial voltage gain is possible with this unit, and, furthermore, the sole transistor parameter which affects the gain is 3. The voltage gain of the second stage is discussed in detail in many books on transistor circuit applications. The appropriate expression is: 0 _ 34 (3) V R + r V 3 when: R << r and R << R6 4 c 3 6 r e3 If the constraint, l.3 << R_ << R6, applies to RB, then the gain of 3 -11 the second stage is independent of all transistor parameters except ca3 and Eq. 3 becomes: Vo 3R4 (4) V3 R5 3

When Eqs. 2 and 4 are combined, the open-loop voltage gain is given by: Vo = AA2(V2-V (5) where: A R2 ~3R4 Al -=- and A - 1 2R 2 R5 R fb It is to be observed that a phase RS, i 1 ~reversal occurs for V1 but not V- — f —rV2' T for V. V2 VO ~1i~~2 1~ ~Amplifiers of this type are 6 iO usually operated with some form of feedback. Consider the arrangeFig. 3. Typical Feedback Arrangement. ment in Fig. 3. The gain for this circuit is also derived in the Appendix With the final simple results: V (1 + ) (6) 2 sR Rfb R t is negative and >> R. 1 when the forward gain, Ve R 1 1v 2 3. EXPERIMENTAL EVALUATION The actual experimental circuit is given in Fig. 4. The frequency response of this unit was obtained using a source with an internal impedance of 528 ohms. 4

-15VDC +15VDC -15V DC 82 K 2 2 N37.5K 0270^ 2K t329K N 2N370 Fig. 4. Conmplete circuit diagram. The measured low frequency voltage gain was 53.5 with a 3db bandwidth of 1.1 Mc. The experimental frequency response curve is presented in Fig. 5. At 10 kc the input impedance was found to be 100 k ohms 35 0 0 o 0 o —o-o-.0 N 1308 TRANSISTOR 0 tDt 30 AMPLIFIERK 25- \7 20 FREQUENCY (IN KC) Fg. e Experimental frequency response. shunted with 35 pf, while the output impedance was 20 ohms. The output response to 1 kc, 10 kc, 100 kc, and 1 Mc square-wave input signals is shown in Fig. 6. The dc drift at room temperature (.25~C) re5

Output Input 1 kc 100 kc Output Input 10 ke 1000 kc Fig. 6. Square wave response. D o z6 O 2 > I ~h- CC -- ot~; DEGREES (C) l 0 -4 Fig 7. Dc drift vs operating temperature.

ferred to the input was approximately 1 mv/24 hr. A low frequency noise voltage with a 50 tv rms level again referred to the input was also observed. This fluctuation noise was reduced by an order of magnitude when a high pass filter with a cut-off frequency of 15 cycles was placed in the output circuit of the amplifier. Figure 7 indicates the dc drift as a function of operating temperature. 4. APPLICATIONS The total cost of materials for this amplifier, exclusive of a mounting structure, is less than twenty dollars. All the components are commercially available through electronic equipment suppliers. Since the amplifier has many desirable electronic properties and also is physically small, light weight, and inexpensive, it has many applications. Briefly, these include wideband transistor control systems, a cheap and compact computer component, and satellite instrumentation circuits. With an appropriate input or output filter this amplifier could also be used as a wideband audio amplifier. This unit was initially designed for use in a wideband phase-lock circuit. The high dc gain of typical commercial circuits was not required, however it was essential to have a one-megacycle bandwidth. In this sense this amplifier is not equivalent to the high dc gain operational amplifiers found in analog computer applications. By the addition of another stage of voltage gain it would be possible to increase the dc open-loop gain to approximately 30,000. Some loss of bandwidth would be expected, and the problem of stability would increase. 7

APPENDIX A very useful and practical input stage for a dc amplifier is the differential amplifier. A typical transistor circuit is shown in Fig. A.1. The output voltage may be taken across either R1 or R2, however, there is a 180-degree phase difference in these two voltages. In the circuit of Fig. A.1 it 9-V c 1~___ ~ ~ is possible to set R1 equal to R,1 gR2 zero without directly affecting V3. However, when this is done the circuit no longer retains its I — -- 2 insensitivity to variations in V2 3 ^ t~R, l l collector conductance of T. In general it is desirable to select o+V matched transistors and set R = R2. Consider now the low frequency, Fig. A.1. Differential amplifier stage. small-signal analysis of Fig. A.1. R An equivalent circuit is depicted in Fig. A.2. Here the assumption is that R1 < r and R2 << r, 1 21 c 2rb re rb2, hence the parallel combinations Rs, SR3 are essentially equivalent to R1 VI V2 and R2, respectively. Fig. A.2. Low frequency, small-signal equivalent circuit of Figure A.1. 8

To simplify the following analysis we will define: = Rs + rb R* = R + r S2 S2 b2 The following equations may then immediately be written: V = lR* + r i + R3(i + i ) 1 - s^11 e1e 3 eI e2 = R* + re2ie2 +R3(i e+ i ) 2 slb e e 3 e e el bl (l+1) 2 2 2 i = \ (1 + 8l These lead to the linear system: [V1 Rs1 + (1 + )r + R3(l + l)} R3( + |2 q R (1 + 1) R+ (1 + r2) + R3(1 +'2 L.J L 2 2 For the conditions R3 Rs (Ri + l)re' i 1 i = 1,2 3 s^ i = 1, it can be shown that i- R3(1 + 2) (v - 2) 2b R3(l + pi) (V V) A where: A-R3[R (1 + 2) + R (1 + l1)] 91 2

Hence: (1 + 19)(v2 - V1) P(V2 - V1)'2 RS (l + + R + (1 + ) 2 + P1 2 2 2 2 + 2 2 and (1 + p2) 2'b (l +.%j) 1 2 P 2 This last result indicates that the phase of the two currents and hence the voltages across R1 and R are 180 degrees apart. The voltage across R is given by R2pP2(V2 - V1) V = - RW b = - R2> (V2 - ) (A.1) ~3 P 2 R + P1 6s12 Rs 2 For the case of complete symmetry the above reduces to R2P(V2 V1) 3 v..-..... 2Rs If now R >> r (i = 1,2), then it follows that i i R2 p1p2(V2 - V1) V3:-... (A.2) S1 2 s2 1 This is independent of all transistor parameters other than the two betas. Note that the above equations. presuppose that the transistors are operating about a properly chosen quiescent point. A significant point to observe is that for V1 = V2, the input impedance is infinite, subject to the above approximate expressions. 10

Now consider replacing the input source A.3(a) with A.3(b). With the aid of Thevenin's theorem, the equivalent circuit of A.3(b) is as shown in Fig. A.4. I - O I — b, Rfb R R I )fb R +Rf VI R RVO Rs l fb (a) (b) Fig. A.3. Two input configurations: Fig. A.3. Thevenin equivalent (a) Direct circuit of Fig. A.3(b). (b) Feedback arrangement. Substituting this into Eq. A.2, there obtains: / Rs. V0 V - v3 a Rsfb \ [1 P+ \ Rs + L 2 s2 If one now sets: V =A V3 then: V 21( 2 Rs1 +R RA2 +/Rs R 1 2 11

or: V R V + 0 (A 3) For A ~ 0 this system has regenerative feedback. Indeed the system 2 -2'= VO Rfb 1 -- For A2>> 0 this system has regenerative feedback. Indeed the system will be unstable for Rfb + Rs O A< A<. —. 2 2Rt For A2 < 0 the system is degenerative. The usual case is for I|A2B >> fb + 1 2 and for A to be negative. Hence, VO Rfb 2 S1 and if Rfb >> Rs, this leads to Vo Rfb V2 R 0,%, ft 2 This equation indicates that for the above assumptions the dc amplifier 12

with degenerative feedback has an overall voltage gain which, within the above approximations, is independent of the transistor characteristics. The value of this last result, of course, depends on the stability of the open-loop gain. BIBLIOGRAPHY Fitchen, F. C. Transistor Circuits Analysis and Design. Princeton, N. J.: D. Van Nostrand Company, Inc., 1960. Riddle, R. L. and Ristenbatt, M. P. Transistor Physics and Circuits. Englewood Cliffs, N. J.: Prentice-Hall, Inc., 1958 Shea, R. F. Transistor Audio lifier. New York: John Wiley and Sons, Inc., 1955. 13

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