THE U N I V E R S I T Y OF M I C H I G A N COLLEGE OF ENGINEERING Department of Electrical Engineering Space Physics Research Laboratory Scientific Report No. JS-4 DEVELOPMENT OF A DIGITIZED VOLTAGE GENERATOR FOR IONOSPHERIC PROBE MEASUREMENTS Prepared on behalf of the project by: George D. Breen ORA Project 03599 under contract with: NATIONAL AERONAUTICS AND SPACE ADMINISTRATION CONTRACT NO. NASw-139 WASHINGTON, D C. administered through: OFFICE OF RESEARCH ADMINISTRATION ANN ARBOR October 1961

This report has also been submitted as a thesis in partial fulfillment of the requirements for the degree of Electrical Engineer in The University of Michigan, 1961.

TABLE OF CONTENTS Page ABSTRACT v LIST OF TABLES vii LIST OF FIGURES viii LIST OF SYMBOLS xi I. INTRODUCTION 1 II. SYSTEM DESIGN 7 A. Duality 8 1. Dual Source —Identical, Isolated, and Synchronized Step Generators 8 2. Single Source —Dual Output Systems 9 a. Dual Secondary Transformer 9 b. Switching Techniques 11 B. Stairstep Voltage Generator 13 1. A Train of Unit Voltage Steps, Delayed, Added, and Stored 14 2. Triggered Steps 15 3. Gated Linear Sweep 18 4. "Q-Transporter" 21 III. CIRCUIT DESIGN 24 A. "Q-Transporter" 24 B. Trigger Circuit 29 C. Multivibrator Driver Circuit 44 iii

Page D. Voltage-Operated Reset Switch 47 E. Output Amplifier 56 F. Zero Reference 62 G. Power Supplies 69 IV. DUAL OUTPUT CIRCUIT 77 A. Diode Switches 77 B. Synchronization of Reset Levels 79 V. ERROR ANALYSIS 83 A. Step Droop 83 B. Environmental Effects 86 1. Voltage Stability 87 2. Temperature Stability 88 3. In-Flight Calibration 88 VI. PRACTICAL CONSTRUCTIONAL DETAILS 90 A. Transistor Selection 90 B. Circuit Adjustment 91 APPENDICES I. STORAGE-COUNTER STAIRSTEP-WAVEFORM GENERATOR 97 II. TRANSISTOR PARAMETERS 102 III. EXPERIMENTAL DETERMINATION OF TEE TEMPERATURE COEFFICIENTS OF LARGE ELFCTROLYTIC CAPACITORS 103 REFERENCES 110 iv

ABSTRACT The program of ionospheric research conducted by The University of Michigan's Department of Electrical Engineering makes extensive use of rocketborne probes. Data are collected by means of an electrostatic sensor in the probe, and analyzed by means of a large, ground-based, general-purpose digital computer. To exploit the vast potential of the latter more fully, a development project was undertaken to modify, or redesign as necessary, present analogtype sensors. Means of generating an accurate series of discrete voltage levels, corresponding to a stairstep waveform, are investigated and an efficient method is described. The resulting compact, transistorized circuitry has been compensated for variations in supply voltages and ambient temperature to insure voltage level accuracies of better than 99%U with less than 0.05% droop per step. In addition, means have been developed to provide two identical output waveforms with a high degree of electrical isolation.

LIST OF TABLES No. Page I. Surmmary of Q-Transporter and Trigger Stage Design Considerations 40 II. Q-Transporter and Trigger Circuit Component Values 40 III. Q-Transporter Step-Generation Sequence 41 IV. Multivibrator Component Values 44 V. Properties of 2N338 Transistor 58 VI. Stairstep-Generator Component Values 73 VII. P, Percentage Droop of Output Steps with Temperature 85 III-1. Capacitor Test-Circuit Component Values 108 vii

LIST OF FIGURES No. Page 1 Functional Block Diagram of "Dumbbell" Probe. 2 2 Single Spherical Electrode Volt-Ampere Characteristic. 2 3 Volt-Ampere Characteristic of Equal Area Bipolar Probe. 4 4 Motor-driven 5V Generator. 4 Ideal "Stairstep" Waveform. 6 6 Stairstep Generator with Transformer Coupled Dual Output. 10 7 Block Diagram of Stairstep Generator with Switched Dual Outputs. 11 8 Unit Step Implementation of Stairstep Generator. 14 9 Implementation of Stairstep Waveform Considered as Sum of Square Waves. 15 10 Storage-Counter Circuit with Output Waveform. 17 11 Storage-Counter Circuit Linearized by Feedback with Output Waveform. 17 12 Stairstep Waveform Considered as Limiting Case of a Gated Linear Sweep. 18 13 RC Integrator Circuit. 19 14 Typical Junction Transistor Collector Characteristics. 20 15 Gated Linear Sweep Circuit. 20 16 Modified Gated Linear Sweep Circuit 22 17 Q-Transporter Equivalent Circuit. 27 18 Q-Transporter Trigger Circuit. 29 19 Modified Q-Transporter Trigger Circuit. 31 20 Complete Q-Transporter Trigger Circuit. 33 21 Q-Transporter Base Waveforms. 35 and 36 viii

LIST OF FIGURES (Continued) No. Page 22 Q-Transporter Response to Trigger Pulse. 42 23 Q-Transporter Output Waveform. 43 24 Multivibrator Circuit. 45 25 Multivibrator Output Waveform. 45 26 Multivibrator Temperature Characteristic. 46 27 Temperature Compensated Multivibrator Characteristic. 46 28 Unijunction Transistor Schematic and Equivalent Circuit. 47 29 Variation of Unijunction Base-One Resistance with Emitter Current. 49 30 Unijunction Discharge Time versus Emitter Circuit Capacitance. 49 31 Typical Unijunction Input Characteristic Near Peak Point. 49 32 Block Diagram of Unijunction Triggering Method. 52 33 Unijunction Triggering Circuit. 52 34 Oscillogram of Unijunction Interbase Voltage, VBB. 54 35 Oscillogram of Unijunction Discharge Spike in Interbase Voltage. 54 36 Emitter Follower Equivalent Circuit. 57 37 Emitter Follower Amplifier Circuit. 58 38 Emitter Follower Stage Voltage Gain. 60 39 Diode Zero Reference Circuit. 62 40 Silicon Diode Forward Transfer Characteristics. 63 41 Generalized Zero Reference Circuit. 63 42 Emitter Follower Zero Reference Circuit. 66 43 Zero Reference Circuit Input Waveform. 66 ix

LIST OF FIGURES (Concluded) No. Page 44 Zero Reference Circuit Output Waveform. 67 45 6V Schematic Indicating Required Supply Voltages. 68 46 Typical Temperature Coefficients of Zener Reference Diodes 70 47 Typical Zener Diode Reverse Characteristic. 70 48 Variation of Zener Diode Dynamic Impedance. 73 49 Complete 6V Circuit Diagram. 74 50 Dual Output Circuit. 76 51 Bridge Diode Reverse Characteristics (at 250C). 78 52 Bridge Diode Reverse Characteristics versus Temperature. 78 53 Transformer Synchronization of Reset Levels. 79 54 Dual System Synchronization Test Circuit. 80 55 Transformer Coupled Synchronizing Pulse. 81 56 Output Capacitor Currents. 83 57 Transistor Leakage Current Measurement Circuit. 91 58 Negative Voltage Reference Circuit. 94 59 Wiring Connections on Printed Circuit Board. 95 60 Component Arrangement on Printed Circuit Board. 96 I-1 Diode Counter Circuit. 97 I-2 Linearized Storage Counter Circuit. 99 III-1 Capacitor Temperature Coefficient Test Circuit. 105 III-2 Temperature Characteristic of Texas Instruments' SCM Series Tantalum Electrolytic Capacitors. 109

LIST OF FIGURES (Continued) No. Page 22 Q-Transporter Response to Trigger Pulse. 42 23 Q-Transporter Output Waveform. 43 24 Multivibrator Circuit. 45 25 Multivibrator Output Waveform. 45 26 Multivibrator Temperature Characteristic. 46 27 Temperature Compensated Multivibrator Characteristic. 46 28 Unijunction Transistor Schematic and Equivalent Circuit. 47 29 Variation of Unijunction Base-One Resistance with Emitter Current. 49 30 Unijunction Discharge Time versus Emitter Circuit Capacitance. 49 31 Typical Unijunction Input Characteristic Near Peak Point. 49 32 Block Diagram of Unijunction Triggering Method. 52 33 Unijunction Triggering Circuit. 52 34 Oscillogram of Unijunction Interbase Voltage, VBB. 54 35 Oscillogram of Unijunction Discharge Spike in Interbase Voltage. 54 36 Emitter Follower Equivalent Circuit. 57 37 Emitter Follower Amplifier Circuit. 58 38 Emitter Follower Stage Voltage Gain. 60o 39 Diode Zero Reference Circuit. 62 40 Silicon Diode Forward Transfer Characteristics. 63 41 Generalized Zero Reference Circuit. 63 42 Emitter Follower Zero Reference Circuit. 66 43 Zero Reference Circuit Input Waveform. 66 ix

LIST OF SYMBOLS a amperes C capacitor CCCe Q-Transporter stage collector and emitter capacitors, respectively D diode E supply voltage e0 (t) output voltage en Storage counter circuit output voltage er Storage counter feedback (error) voltage f frequency h transistor hybrid parameters; hfe, hob hib, hrb I,i current IcIe transistor collector and emitter currents, respectively electron and positive ion probe currents, respectively ICOJIEO transistor leakage currents; collector to base and base to emitter, respectively Ip Unijunction transistor peak emitter current IT total probe current I Zener diode reverse current K multiplier (= 1 x 103) Ko,K1 fixed scale factors k Boltzmann's constant M multiplier (= 1 x 10~) MV multivibrator xi

m multiplier (= 1 x 10~) N positive ion density in the ionosphere n number of steps in stairstep voltage sweep Pq Pv percentage change in charge and voltage, respectively 6Qn Transistor no. n Qn Q, q charge q unit of electric charge q/k unit electric charge/Boltzmann's constant = 1/11,600 R resistor, resistance RBB Unijunction Transistor Interbase resistance RB Unijunction Transistor Base-One resistance B1 RB Unijunction Transistor Base-Two resistance RE Emitter Follower Amplifier emitter resistor Rg effective series resistance of signal generator g Ri input resistance RL load resistance RMV multivibrator high-level output resistance Ro output resistance R? "plasma resistance" RSAT transistor collector to emitter saturation resistance SAT rbrcr transistor equivalent circuit resistances c,re Sn switch no. n s, sec. seconds T,t time T temperature xii

Te electronlr. termp;.llature i n iP.he. i onosphere rio arbitrary re~'erernce t: tnme U(t) Unit Step Function V v vo]3ts.ae- volts VBB Unijuncti on Ta.nsistor:Interbase voltage VAbe transistor base-emitter voltage Vc,Ve transistor collector and emitter voltages, respectively V'CBO maximum rated transistor collector to base voltage VD diode voltage Vin input voltage Vn negative supply voltage Vo output voltage Vp Unijunction Transistor peak emitter voltage p VR Zener diode reverse voltage Vz Zener diode reverse reference voltage cx;normnal transistor current gain (X current averaged transistor curren.t gain normal transistor current gain inverted transistor current gain (collector and emitter terminals interchanged) AV,Aq change in voltage and charge on output capacitor, Cc, resulting from single operation of Q-Transporter stage, respectively 6V Probe electrode voltage sma.ll volt~age change Unijunction Transistor Intrinsic Standoff Ratio x iiJ

I-t multiplier (= 1 x 10-6) T RC or RL circuit time constant cie ~ ~Transistor collector and emitter junction voltages, respectively QZ ohms xiv

I. INTRODUCTION This report describes the development of a transistorized stepped voltage source to be used to implement electrostatic ionospheric probe experiments conducted by the Space Physics Research Laboratory of The University of Michigan, Department of Electrical Engineering. A description of the experiment and the theoretical considerations pertaining thereto can be found in Scientific Report No. JS-1 of The University of Michigan's Office of Research Administration, dated August,!961. Summarized briefly, the report describes how electron temperatures (Te) and ion densities,(Np) in the ionosphere are deduced from measurements made by a rocket-launched instrumentation package, the sensor of which operates as a Langmuir probe. Part of the theoretical problem is establishing a region in which the electric fields are such that the desired quantities (Np and Te) can be most directly related to the voltage, 5V(t), applied across a set of electrodes and the resulting plasma current, I(t). This includes the formidable problem of adequately describing the perturbation of the field due to the presence of the instrumentation hardware, and/or mitigating this effect by appropriate compensation techniques, often done with guard electrodes. When this is done, separate and synchronized voltage sources must be provided for the two electrode pairs. ':These source es,must be isolated becaus-ecircuitous;- current paths would otherwise result, since all external terminals of the probe are interconnected through the plasma. The arrangement of the electrodes and their voltage sources is shown in Fig. 1 for a "tDumbbell"-shaped probe. The current detector measures the current to the outer hemispherical collectors. Voltage

Fig. 1. Functional Block Diagram of "Dumbbell" Probe. Ion Saturation I=1 +1 -V \ IT C IT = I + I Tig 2e p Fig. 2. Single Spherical Electrode Volt-Ampere Characteristic.

and current data are then telemetered to the ground for analysis. Each voltage source, commonly referred to as a 6V generator, establishes a potential across its pair of electrodes in the plasma. As an electrode is driven negative, with respect to the plasma, low-energy electrons are repelled and positive ions are attracted. The electron current falls to zero at a potential that is a function of the average energy (temperature) of these particles, as in Fig. 2. In the temperature range encountered (500-30000 K), this occurs between -0.3 and -1.5 vdc. Further excursions, to about -3 vdc, serve to define the positive ion. saturation region of the V-I curve. The complete characteristic of the bipolar probe, shown in Fig. 3, is obtained by alternately reversing the polarities of the electrode pairs. Thus the dynamic range required of the bV's is -3 to +3 vdc. In early experiments these requirements were fulfilled by two ganged, motor-driven potentiometers, each connected to a separate, regulated battery source, as shown in Fig. 4. This arrangement adequately fulfilled the requirements from the system point of view. The potentiometers provided linearity and duality; the motor shaft provided synchronization and adequate electrical isolation, and the batteries provided accurate reference voltages. However, since the applied voltages vary linearly, the graphic record of the dynamic volt-ampere characteristic of the probe is a continuous curve. This feature necessitates tedious point-by-point graph reading to provide digitized data for computer solution of the pertinent variables, i.e., ionospheric electron temperatures and ion densities as a function of altitude.

sv Fig. 3. Volt-Amere Characteristic of Equal Area Bipolar Probe. Linear Potentiometers ~D-C v~1 (t) ji — - $ — iMotor - (t) E1 E2 Fig. 4. Motor - Driven sV Generator.

Experience with these rocket probes has shown that five minutes of flight data require some 6 man-months of data reduction time, mainly as a result of the analog to digital conversion problem implicit in the graph-reading process mentioned above. The improvements desired in equipment or techniques obviously must not compromise present accuracy for the sake of short-term economy. Yet, from the magnitude of the time intervals cited, it can be seen that the potential economic benefits to be reaped in this area are substantial. Hence it was thought expedient to reduce this excessive time lag by programming the 6V generators to apply a series of discrete, digitized voltages across the probe electrodes, resulting in data in a form more conveniently read from the telemetered record. The ideal waveform can be described mathematically in terms of the Unit Step Function, U(t), i.e.: Vo(t) = Ko + K1 [U(t) + U(t - to)+...U(t - nt (1) where Ko can be an arbitrary d-c level, K1 is an adjustable scale factor, to is the step length and n is the number of steps per cycle. Figure 5 describes this "stairstep" waveform graphically. The following sections will discuss methods of generating this waveform, with provision for the two isolated outputs required by the experiment. Subsequently, the engineering details of the design of a circuit suitable for flight will be described.

3 SV(t) 0 0 I~~~~~~~~~~~~~~~~~~ - n I ~ --- —— f — - -3 Fig. 5. Ideal "Stairstep" Wavtfoti'll..

IIo SYSTEM DESIGN The System Design aspects of the problem consist in the optimum tradeoff of performance specifications on the one hand, and the functional characteristics of realizable equipment, circuits, components and techniques, on the other. At this stage, initial solutions will be attempted in terms of symbolic "Black-Box" devices. Initially, modifying the motor-driven bV generator to fulfill the new requirements was considered. Such modification would involve replacing that section of the system accounting for the linearity, i.e., the potentiometers, with a device exhibiting a discrete characteristic as a function of shaft position. This suggests a non-shorting, rotary switch. A preliminary design figure of 30 individual voltage levels per cycle n = 30 in Eq. (1), dictated switches whose cost and physical size were too great. This, as well as subsequent system modifications reducing the volume allotted to the 6V generators to approximately two cubic inches, directed the course of the development toward an all-electronic solid-state system. Electronically duplicating the desirable features of the electromechanical, motor-driven switch scheme imposes two general system-type problems: (1) Generation of the stairstep-waveform subject to the stated volume limitations, and (2) Provision for dual outputs synchronized and isolated to the degree afforded by the common motor shaft. Although an effort will be made to treat each problem individually, their optimum solutions are not independent. As a result,. it is advantageous to treat the

second problem first. A. DUALITY Means of satisfying the isolation and synchronization requirements for dual outputs can be divided into two categories. Either two distinct waveform generators are used as the design starting point, so that isolation is assured but synchronization must be provided, or a single waveform source is used, thereby eliminating the synchronization aspect, while complicating the isolation problem. Both approaches will be investigated below. 1. Dual Source —Identical, Isolated, and Synchronized Step Generators If two separate electronic generators are used to obtain dual outputs, one may reasonably predict that each will be more involved in components, and hence less reliable than the electromechanical version of Fig. 4., The increased complexity suggests that some sort of voltage monitoring would be necessary for comparison of the two outputs. It is apparent from the nature of the experiment that an indication of a discrepancy between the two outputs will only confirm that the data are in error, since the relations between the measured variables, V and I, are known in a useful way only under the precise guardfield condition that 6Vl(t) = 6V2(t). Therefore it is essential to use some sort of automatic feedback control to maintain the. equality of step levels whenever separate generators are employed. It is thus necessary to compare the voltages across.the two isolated electrode

pairs, and to provide for feedback voltage control without introducing any mutual current paths. This is not feasible, even with high-input-impedance vacuumtube circuits, because of the common (ground) connection between input and output in three element active devices. Therefore, without feedback voltage control and the assurance it provides, separate 6V generators must be considered too unreliable for use in a dual system. 2. Single Source-Dual Output Systems An alternative to the dual generator system is to generate a single voltage waveform and use it to drive a device that will in turn provide two identical, isolated reproductions. Two possibilities have occurred to the author: one involves the use of a dual-secondary transformer; the second makes use of switching techniques. a. Dual-Secondary Transformer.-A transformer will provide dual, isolated outputs from a common source, but it is not a d-c operated device, and not directly applicable to the transfer of the 10-msec d-c pulses of Fig. 5. Therefore, modification of the input waveform is necessary to utilize the isolating features of the transformer as an output device. Specifically, it can be shown that the longest possible flat-topped wave that can be passed through a miniature pulse transformer with reasonable droop has a width of the order of 10 vtsec. Therefore it would be necessary to chop each of the 30 required voltage levels into 1000 short pulses of 10-kisec duration. A block diagram of a method of implementing this idea is shown as Fig. 6.

AmplifiCoupleder Dual Output.PowerSupply 8V1 (t) Fig. 6. Stairstep Generator wit h Transformer Coupled Dual Output.. The stairstep voltage generator output would be used as the collector supply for a 100/sec multivibrator oscillator. This arrangement would act as a combined Amplitude and Frequency Modulator. The AM would alter the magnitude of the output according to Eq. (1), while the FM arises from the fact that the charging voltage-of the multivibrator RC circuits also varies, thus changing the pulse width. But if the center frequency were chosen so that the minimum frequency output does not result in unduly distorted pulses, this feature could be tolerated. A more seriously undesirable feature is the shape of the composite envelope formed by the pulses. At best, it represents only an approximation to the desired flat-topped waveform. As the chopping rate is increased to reduce droop and to afford a closer approximation, rise times and switching transients become increasingly significant and detract from the useful data-collection time per cycle. Although an acceptable solution might be 10

reached using this approach, it is not to be expected without considerable compromise between the quality of the stairstep waveform and the volume of the output transformer. b. Switching Techniques.-A general approach to the method of switching techniques is shown in block diagram form as Fig. 7. -....... Storage Amplifier 1V (t) Step I IISS I P ower Storage Amplifier sv (t) Power 2 Fig. 7. Block Diagram of Stairstep Generator with Switched Dual Outputs. Here a single source charges two storage devices (presumably capacitors) connected in parallel, thereby satisfying the synchronization requirement in addition to providing identical voltage amplitudes. Now d-c isolation can be achieved by activating the switches, which remove the source and separate the two output circuits. To achieve reasonable data-collection efficiency, the charging time must be kept small with respect 11

to the 10 msec step length. It is clear, then, that this approach simply transfers the major system problems to the box labeled "S". Specifically, "S" must: (1) have an asymmetrical switching cycle of 10:1 or better. (2) be synchronized in some fashion with the source, (3) have equal and low forward impedance in both paths, and (4) have equal and high back impedance in both paths. Before investigating possible means of fulfilling the above objectives, it is well to point out that the reason given above for rejecting feedback techniques, namely, that simultaneous isolation and feedback control were mutually exclusive, must now be modified in light of the time-shared case of Fig. 7. However, although realizable, neither voltage comparison nor' automatic voltage control would now be necessary since both storage circuits would be in parallel while charging. Returning to the selection of the switching unit "S" of Fig. 7, three devices deserve consideration: (1) relays, (2) transistors, and (5) diodes. Both relays and transistor switches require an external synchronization connection with the source, making unreliability likely. Furthermore, isolation of 100 megohms or better is desired. This figure is far in excess of the opencircuit impedance of present-day transistor switches. While relays are capable of exceeding this specification, they are not adapted to meeting the severe duty12

cycle requirements of approximately 0.5 msec "on" and 9.5 msec "off". Diodes, on the other hand, would be ideal from two standpoints: they can be driven to forward resistances approaching 2 ohms and reverse resistances of the order of 1000 megohms. Being passive devices, moreover, synchronization and duty-cycle would be source-controlled without additional synchronization paths. Requirements for the step generator of Fig. 7 follow directly from the above. In addition to being stable and reliable, it must: (1) generate the waveform described by Fig. 5, (2) be capable of delivering the output in the form of low-impedance discrete pulses that can forward-bias the diode switches and charge the capacitors rapidly, and (3) be capable of maintaining the diodes in a high-resistance portion of their characteristic between pulses. Having thus reached some conclusions about the duality problem, we can now turn to the other major problem - generation of the stairstep waveform itself. B. STAIRSTEP VOLTAGE GENERATOR Various means of generating a stairstep waveform are suggested by a broad interpretation of the composition of the waveform shown in Fig. 5. Three different interpretations are given below. 13

1. A Train of Unit Voltage Steps, Delayed, Added, and Stored, The stairstep waveform can be considered to be composed of a series of unit voltage steps sequentially added or accumulated by a storage device. This suggests the generation of a train of unit steps driving an adder circuit modified by a feedback loop as in Fig. 8. The suitability of such an arrangement would be largely determined by the properties of the delay device shown in the feedback loop.. Square Wave Adder -rage Generator Output i Delay Reset Switch Fig. 8. Unit Step Implementation of Stairstep Generator. The characteristics of delay devices are markedly dependent on the magnitude of the time delay required, which in this case is approximately 10 msec. This immediately rules out circulating delay devices of the lumped parameter or acoustic line varieties by virtue of their size. What is required, then, is an active delay device of the multivibrator class. The weak point of this system, however, is the adder, which must be linear over a dynamic range of at least six volts.* Its inherent nonlinearities could be compensated for by appropriate networks in the feedback *A conservative figure, it will develop later. 14

loop. Yet, regardless of compensation, the adder would introduce unreliabilities, such as drift, previously avoided by the use of discrete devices such as the square-wave pulse generator and the active delay circuit. Fortunately, other waveform compositions are available for investigation. 2. Triggered Steps The desired stairstep waveform can also be interpreted as composed of square waves added in series as shown in Fig. 9. Waves of this type could i I Timing 0 t Fig. 9. Implementation of Stairstep Waveform Considered as Sum of Square Waves be generated by bistable multivibrators, or other gating arrangements, all of which exhibit two salient characteristics: (1) Accurate voltage increments could be assured since each level would be switched "ON1" or "OFF" with no intermediate states possible. (2) Separate square wave generators and switching arrangements would be required for each voltage level desired. 15

These characteristics suggest an electronic duplication of a mechanical switch in that each switch position and associated voltage tap correspond to a squarewave oscillator and associated gating or trigger circuit. Therefore, such an implementation has the same limitation as the mechanical switch: excessive size. In a general effort to avoid implementations that involve duplication of circuits and components performing identical operations sequentially, step generators containing storage or delay elements are necessary. There are single circuits that combine the separate functions of addition and storage. One that uses capacitors for storage, a diode switching network for addition, and the timing circuits of a multivibrator for delay is the storage counter,l shown in Fig. 10. The exponential relationship between the sizes of the output steps can be eliminated by charging C1 to a voltage proportional to the output voltage plus the input step. This can be accomplished by a variety of feedback techniques, one of which is shown as Fig. 11. A derivation of the performance of these circuits is given in Appendix Io The conclusion that adequate step equality can be achieved by using feedback has great significance. For one thing, it means that the need for a linear d-c amplifier of wide dynamic range is eliminated, since this circuit embodies a method of pulse addition whereby the charge accumulated on one capacitor can be transferred to a second capacitor regardless of the latter's state of charge. This, in turn, means that the same components are utilized in generating an arbitrary number of equal steps - a feature not shared by other circuits and a virtual necessity if the volume limitations are to be met. 16

Reset Switch C1 MV C2 V (t) t Fig. 10. Storage Counter Circuit with Output Waveform. Reset Switch v (t) _i. 1 Sg _-E E Fig. 11. Storage Counter Circuit Linearized by Feedback with Output Waveform. 17

However, the mechanism by which this charge transfer takes place, the familiar exponential process, never reaches steady state in any finite time. This is of negligible consequence in applications of pulse counting and frequency division for which the circuit was originally designed, but is a serious limitation in the present application, where an accurate voltage reference source is required. It will be shown below, however, that the same concept of charge transfer, combined with a faster transfer mechanism, will preserve the advantages coincident with the simplicity of this circuit. 3. Gated Linear Sweep There is still another interpretation of the composition of the waveform represented by Fig. 4 that avoids duplication of circuits. This is to consider the waveform as the limiting case of a gated linear sweep as the charging time, tc in Fig. 12, becomes arbitrarily small. V (t) t t c Fig. 12. Stairstep Waveform Considered as Limiting Case of a Gated Linear Sweep. Linear sweeps are generated by very common and well-understood circuits. The simplest is the familiar RC integrator circuit shown in Fig. 13, where e (t) = E(1 - e t/RC) {URC] 2 ERC 0 3 f F("))1..(2 &11 + 7 -...) 18

Fig. 13. RC Integrator Circuit. Approximate linearity can be achieved by making RC very much larger than t, so that eo (t) _ E(C (3) RC To achieve periods of constant output voltage, the charging current to capacitor C must be periodically interrupted by a switch placed at point "a". Either a tube or a transistor would be a suitable gate since both can be readily controlled by an external timing device. An additional requirement on the gate is that the current through it must be independent of the voltage across the capacitor to make the step increments proportional to time. Transistors, being current-operated devices, are ideally suited to this task. Reference to a typical set of transistor output characteristic curves as in Fig. 14 shows that, over a considerable portion of the operating range, the collector current, Ic, is virtually independent of collector voltage. This property of the transistor allows its use as a gate to achieve the waveform of Fig. 12, by the circuit configuration of Fig. 15. Ideally, when switch S is in position 1, constant base current flows, resulting in constant collector current and linearly increasing output voltage. 19

IC Vc Fig. 14. Typical Junction Transistor Collector Characteristics. E Re Timing Switch Fig. 15. Gated Linear Sweep Circuit. 20

In position 2, the transistor is cut-off, since B is more positive that E, with the result that the emitter current is reduced to zero and the output voltage is constant. The timing device should be sufficiently asymmetrical to make the charging time negligible. Thus a gated linear sweep approach leads to a feasible step generator and, in addition, one that requires significantly fewer components than the other methods considered. It is clear, however, that if successive step amplitudes are to be identical, the charging times (the time S is in position 1) must be maintained constant. 4. Q-Transporter It will be observed that the gated linear sweep circuit can be considered as a modulator, where the square-wave oscillator amplitude modulates the waveform generated by the;sawtooth oscillator formed by Re, Cc, and the voltageoperated reset switch. Not only must the step increments be equal, which has been the primary concern up to now, the level of each individual step must also remain constant from cycle to cycle.* This precise recurrence of d-c levels will occur only if the square wave and sawtooth oscillators are synchronized and locked in phase. It is, of course, possible to synchronize two oscillators so they become harmonically related. When their frequency ratio becomes large, however (e.g., 30:1, as it is here), pulse-counting synchronization systems require several stages of frequency dividers. This would make the control circuit almost as large as the controlled circuit, which seems extravagant. *It is helpful to consider a stairstep waveform as a special case (zero velocity) of an "escalator" waveform in which the steps move progressivley up or down from cycle to cycle. 21

It is possible to eliminate the need for synchronization by making the length of time collector current flows independent (over a suitable range) of the period and duration of the timing pulses, so that, whenever a timing pulse is received, the gate is turned "ON" for a time that is less than, but not determined by, the duration of the timing pulse. This is accomplished by adding a capacitor, Ce, in the emitter circuit of the gating stage as in Fig. 16. Effectively, if Re is large, Ce becomes the sole power source for E Timing Re i X1 DiC e 1X 2 'B (tE) C Reset Switch Vo0t) Fig. 16. Modified, Gated, Linear Sweep Circuit. the transistor. Since the energy stored in Ce is finite and discrete, the gate will remain open (conducting) during a timing pulse only as long as the emitter voltage remains greater than the base-emitter threshold of the transistor. Transistor saturation resistances are typically so low (_40 ohms) that RC circuits can be designed to decay during the duration of any reasonable 22

timing pulse. The discharge of the emitter capacitor, Ce, results in a pulse of collector current which deposits a discrete quantity of charge in the output capacitor, Cc, and produces a corresponding step in the output voltage. The depletion of the charge on Ce results in a quiescent cut-off condition that continues until the termination of the timing pulseo When switch S reverts to position 2, the resulting jump in base voltage unclamps the emitter voltage, which rises as Ce charges through Re toward the supply voltage E. If steady state is achieved long before the next timing pulse, the amount of charge stored in Ce will be known and discrete. Thus the discrete increments made in the output voltage are independent of both the number of previous charging pulses and a wide range of variation in the frequency of the timing pulses This mode of operation of the transistor is based on the same physical principle that makes operation as a constant current source possible - yet the current is by no means constant, or even linear, by virtue of the character of the power source in the emitter circuit (Ce). For this reason it is convenient to think in terms of charge rather than current, i.e., when Ce discharges it gives up a charge, qe, a of which is deposited on Cc in the collector circuit during each timing pulse. Hence, I will refer to this circuit as a "Q-Transporter." By means of the mechanism described above and the switching technique of Part IIB, a satisfactory circuit for the generation of a stairstep waveform may now be designed. Subsequent sections will deal with the engineering design problems concerned with producing an efficient, reliable, voltage- and temperaturestable package. 23

III. CIRCUIT DESIGN In this section the details of the Q-Transporter circuit will be examined and relations governing its use explained. A trigger circuit that provides a much sharper cutoff mechanism than base-emitter junction clamping shown in Fig. 16 is developed and an asymmetrical multivibrator timing source is given. Output circuits, such as the Unijunction voltage-operated reset switch, a low output impedance emitter follower amplifier and a zero reference circuit, are discussed in detail. Finally, power-supply requirements are treated and provision is made for compensation of random voltage and temperature changes. A. Q-Transporter As noted above, the fundamental property of junction transistors whereby collector current is independent of collector voltage for constant emitter current forms the basis by which equal voltage steps are generated. This property is depicted graphically by the static collector characteristic curves and described analytically by the equations of Ebers and Moll:2 q0 I aI Ico e I = exp c ~ ~ exp xp kT —' (5) C I-ct exp kT exp kT NI NI eo c o where Ico and Ieo are the collector and emitter saturation currents, respectively; cN and aI are the normal inverted current gains, respectively; 0c and Oe are the collector and emitter junction voltages, respectively; T is the temperature in degrees Kelvin and q/k = 1/11,600. 24

These equations describe the operation of the transistor's pair of "internal diodes" in terms of the external currents. They are valid for large (d-c) input signals in all three operating regions: cutoff, active, and saturation. For current values at which the internal IR drops significantly alter the junction voltages, equivalent circuit analysis techniques, employing linear circuit elements, can be used in conjunction of the above relations. Solving Eqs. (4) and (5) for Ic in terms of Ie yields: - -. -, I'expC (6) = co kT Ne For the operation contemplated, the collector junction will always be reversed biased, so that Oc will be negative. The exponential term will be less than.005 and hence negligible compared to 1, for Xc less than -0.155 volts at T = 65~C, the highest operating temperature expected. Thus, if the transistor is operated in regions where the collector junction is reversed biased by more than 0.155 volts, the following simplication can be made: Ic = Ico - aIe(7) At this point a preliminary calculation is helpful to show the critical approximations and the criteria by which the optimum commercial transistor will be selected. Assume that in Fig. 16 the base-emitter junction is abruptly forwardbiased so that collector current flows as given by Eq. (7). From the nature of the emitter source (Ce charged to voltage Vc), it is evident that Ie will be of the form Ile t/Te (I1 = maximum permissible emitter current). Thus: Ic c= I - Ile-t/Te (8)

T Q (t) 1 and V =C I dt c C C C I o 1 C C T 1 co -caI e )dt C IcoT /.TYe (9) C C c c where aI1 is negative for current flow out of the PNP transistor shown and where Cc will be determined by other considerations to be at least 1.O0Lfd. T, the duration of the charging period, and Ten the emitter-base circuit time constant, will subsequently be shown to be approximately 60 and 40 Lsecs respectively. Typically, values of Ico and I1 for the silicon PNP transistor 2N1036* are 0.005 M~a and 20 ma, respectively. At 65~C, Ico will have increased to about 0.4 pta, which is still four orders of magnitude less than I thus making the first term of Eq. (9) negligible during the charging phase when I1 exists. The question of leakage currents cannot be ignored. however, since I1 is zero during most, of the cycle. The effect of leakage currents during these periods will be treated in Section V on Error Analysis. But since under the most adverse temperature conditions Ico is negligible compared to Il, the analyses can be extended by use of the linear equivalent circuit, which is commonly introduced for small signal a-c analysis. However, the assumption of small excursions about a stable operating point, commonly made in an a-c analysis, is by no means justified here. In fact, the operation contemplated will traverse *Manufacturers' ratings and equivalent circuit parameters for all transistors used are given in Appendix II. 26

such an expanse of the operating region that substantial changes in the equivalent circuit parameters will result. The equivalent circuit of Fig. 17- is none.theless extremely useful for establishing an important feature of the "Q-Transporter"; changes in the equivalent circuit paramneters, resulting from bias current changes that appreciably alter the linearity of operation, will not affect the independence of collector current on collector voltage, provided that the junction-biasing conditions required by the Ebers and Moll equations are satisfied. The parameters of the equivalent circuit are shown to be functions of the bias Currents and it is assumed that current-weighted average values exist for any operating path. For the PNP transistor shown, with both switches in position 2, Ie = 0, if B is greater than E. During this phase, V Iie Br (i _ e. 1 E Fig. 17. Q-Transporter Equivalent Circuit. Ce charges through Re toward the supply voltage E. When both switches are changed to position 1, Ce discharges into the input impedance, hib(i) = re(i) + (1 - a)rb(i), of the transistor causing Ic = a(i)Ie to flow in the collector circuit. When the current flow is terminated, either by equilibrium 27

between the voltages across Ce and Cc or by externally activating the switches, Ce will have lost a charge proportional to its change in voltage, whereas ca of this charge appears across Cc and (1 - a) is dissipated in the input circuit resistance. Thus: Aq AV = o C C EAqi C C = ~V e (10) 'C C e gC - ) = a(i} ie di where a = I i di i=O e is a current-weighted average which one would expect to be a constant somewhat less than a. The significant result is with the form of Eq. (10). Anticipating future problems with variations in temperature, one could elect to sacrifice a possible voltage gain at this point in favor of malking Ce identical to Cc. Thus, if placed in comparable thermal circumstances, the output would be: V~ = A V (12) which is independent of the choice of temperature coefficients of both capacitors. Although this would permit the use of inexpensive capacitors for Ce and Cc as long as a matched pair could be obtained, it is an uneconomical solution from other standpoints. The value of Cc will be dictated by the maximum droop that can be tolerated when load current is drawn from it. The value of Ce, on 28

the other hand, cannot be selected independently of the circuitry by which its charge is replenished between pulses. It will be shown in the next section that the conflicting requirements of minimum step droop and minimum power consumption can best be resolved by matching the temperature coefficients of the two capacitors so that their ratio remains invarient, but need not necessarily be unity as first assumed. B. TRIGGER CIRCUIT In connection with implementing the base switch, labeled "S" in Fig. 15, it is assumed that a square-wave voltage source is available to provide the "Timing" pulses. Consider first the circuit of Fig. 18, where an unilateral voltage divider R R4 NVI e 1 c C 1R VV ~< e 5 Fig. 18. Q-Transporter Trigger Circuit. network has been added across Ce to permit charging to a steady-state voltage other than E. To find a relationship between the quiescent base voltage, Vb, and the voltage, Ve, to which the emitter is clamped by the divider, R4 and R5, when the base-emitter junction is reverse-biased and steady-state conditions exist, one can write for the emitter voltage: 29

Vee RCe + 5 VD (12) and for the base voltage: R v = E + V b R2 + R3 D (13 / nR (R +R where: R 3 1 MV R (14) R1 R3 +RMV since RMV, the multivibrator open circuit resistance, is about 5 megohms, while the other resistances are of the order of several kilohms each. Thus the junction voltage is: V = V - v be b e R R R5 E + V (15) R2 + R R D It will be observed that Eq. (15) is linear and that the coefficient of E contains two terms of opposite sign. Thus the partial derivative of Vbe with respect to E could be made to vanish by appropriate choice of the resistors. This would make the junction voltage independent of supply voltage variations. Proceeding formally, _.v b e `=E 0 (16) requires that: R3 R 3_ 5 R2 + R3 R4 + (17) Since both voltage dividers are to have the same ratio, Eq. (17) suggests the possibility of (1) making the corresponding resistors equal, and (2) using the same components for both voltage dividers. 30

The latter can be achieved by the circuit shown in Fig. 19, which, in addition to consolidating the two voltage dividers, eliminates the separate emitter resistor, Re. While the nature of the emitter voltage clamp has been E R1 MV V R b e Fig. 19. Modified Q-Transporter Trigger Circuit. changed from shunt to series to effect the consolidation, the repetitive property of the steady-state emitter voltage is preserved. Moreover, the diode paths connecting the base to the emitter, while bilateral, are mutually exclusive, so that discreteness of the transfered charge is assured. The dynamic behavior of this circuit will now be investigated. Assuming that steady-state base and emitter voltages have been achieved, consider the instant the multivibrator switches "ON, " changing its output impedance from Rmv to RSAT, the collector to emitter saturation resistance (typically 40 ohms). If the switching is fast enough so that RSAT can be considered a constant, the new base voltage will be: 31

R 3 - R E (18) b = R2 + R3 / (R1 + RSAT R3R3 where: R - 1 (19) 3 R1 + R + R R + R If Ve exceeds Vb plus the threshold voltage of the forward-biased emitter-base junction (approximately 0.4 volts for silicon transistors), emitter current begins to flow: I = I (1 - et/RC) (20) e o where: R = h +R3 (21) ib 3 V -V V e D b and: I = (1-) R(22) SAT The time constant of the exponential term describes the rate of charge transfer between Ce and Cc. It can be seen that realistic values of resistance in Eqs. (19) and (21) indicate that R will not be less than 250 ohms. For Ce equal to 1.0 pfd, the minimum value of charge transfer time constant, Tmin will be approximately 250 Ais. Thus it takes 1 msec (or 12% of the desired step duration) for the output voltage across Cc to reach 98% of its target value. Some improvement could be realized by reducing Ce, but this is not feasible for other reasons.* In any event, the basic problem of asymptotic charging and discharging of capacitors would still not be solved. The reader will recall that this is what led to the decision to reject the storage-counter circuit of Section II. A charge-transfer circuit which reaches its target value in 1.0% of the step duration can be obtained by adding a capacitor in series with R1, as in Fig. 20. *Primarily the need to match the temperature coefficient of Cc. 32

After a trigger pulse this capacitor, C1, would be charged (by the base current but mainly by the supply voltage through R2 and RSAT) so as to return the base voltage exponentially to the quiescent cutoff value, Vb. By proper selection of the time constant associated with the rise in base voltage, the exponential decay of the voltage across the emitter capacitor could be limited to the region of the first time constant, where the rate of charge transfer is E RI R A _ I........ _ _....V(t) L Multivibrator - I Fig. 20. Complete Q-Transporter Trigger Circuit. maximum. Moreover, in addition to the high efficiency attained thereby, the sharp cutoff mechanism would exclude operation in the region of low junction voltages, where the temperature-dependence of the exponential term in Eq. (20) is significant. However, to be effective in controlling the duration of charge transfer period, it is obvious that C1 can exert critical influence over the step size, especially with variations in its nominal capacitance with temperature. Hence 33

it is advantageous to include in the circuit provision for a temperature compensation mechanism. In addition to the choice of temperature coefficient for C1, additional flexibility can be achieved by the use of a temperaturesensitive resistor (thermistor or sensistor) for R1. This resistance would also serve to limit the peak trigger current (through the multivibrator collector circuit) below the rated maximum of 20 ma. Note in Fig. 20 that between pulses C1 will charge through Rc, R1, and R3 to: V E - Vb +R E (23) C~~1 ~(2 3 Thus, when the multivibrator switch saturates, the instantaneous maximum charging voltage will be: Vb + VC E (24) Hence the minimum value of R1 required to limit Ic (max) to 20 ma is: R2R3 RRE R+(25) R1 0.02 SAT R2 + R which is typically 1.5 kilohms. Figure 21(a) shows the effect of a trigger pulse at time to on the base waveform. Since the voltage across C1 cannot change instantaneously, the base voltage starts to drop toward minus VC1 in a time determined principally by the transistor fall time. But even as the voltage falls, C1 begins to charge through the rapidly diminishing multivibrator output impedance. The minimum base voltage attained is shown in Fig. 21(a) as about 4.5 volts below Vb, the steadystate value. This change takes place in, typically, 10 Usec. The base voltage then begins to rise according to the base time constant: R2R Tb = (R1 + RSAT + R) C1 30 se. (26) 34

t I / V t t t o t (c) Combined Response. Fig. 21. Q-Transporter Base Waveforms.

t t t2 t 12 (d) Overshoot Exceeding Quiescent Value. Vb t t t2 t a 1 2 (e) Overshoot Used to Accelerate Recovery, Without Exceeding Quiescent Value. Fig. 21 (Concluded)

toward Vb. As soon as the base voltage has dropped more than 0.4 volts, the emitter-base junction of the Q-Transporter stage begins to conduct, and the emitter voltage, V, decays with time constant: CC e c R 50 sec. (27) e C + C CE e c as shown in Fig. 21(b). The emitter decay continues until the base and emitter voltages converge to within the 0.4 volt junction threshold, at which point, tl, the Q-Transporter is abruptly reverse-biased and collector current ceases. Sketches of these two voltages are shown superimposed in Fig. 21(c) to exhibit the sharp cutoff mechanism. Once the transistor has been cut off, diode D1 is forward-biased and Ce begins to charge, in parallel with C1, toward Vb. At some point, t2, along the exponential rise, the multivibrator reverts to its initial open circuit impedance of RMV. If the switching were instantaneous, the base voltage would immediately overshoot to (1 + 2R3 ) E, causing no change in R2 +R3 the state of the Q-Transporter stage but altering the voltage to which Ce is charged, as shown in Fig. 21(d). The amplitude of the overshoot is a function of the magnitude of C1 and hence is temperature-dependent. Furthermore, the variation with temperature is such as to augment rather than mitigate other thermal variations. It is evident that any direct measures taken to suppress this overshoot would also desensitize the circuit to the trigger pulse. However, if the "ON" time of the multivibrator is adjusted so that the overshoot occurs while the base voltage is low enough so that the increase is still less than Vb, the overshoot will actually accelerate the recharging of Ce. Figure 21(e) shows the base waveform with the multivibrator "ON" time so adjusted. The multivibrator frequency and asymmetry are determined once the step length and "ON" time are specified. The emitter circuit time constant, Ten must be much less than the "OFF" time to avoid dependence of step size on multivibrator frequency and to justify the assumption of steady-state conditions prior to the trigger pulse at to. 37

In addition to establishing the emitter-circuit charging time constant, R2 and R3 in series form a voltage divider that sets the quiescent base voltage, Vb, and the steady-state d-c level of Ceo Clearly this level must exceed the maximum voltage to be accumulated on Cc, the output capacitor. The maximum output voltage, in turn, is determined by the properties of the voltage-operated reset switch used to discharge Cc at the end of each sweep, as well as the magnitude of the supply voltage, E. The maximum voltage swing is determined in Part D of this section to be approximately 17 volts. Thus Vb must exceed this value. While it is advantageous to make both R2 and R3 small to reduce the recharging time of Ce, this increases the d-c power loss through the series combination to ground. Hence a trade-off is required between power loss on the one hand and charging time on the other. If the recharging of Ce could be completed in 7 ms after the trigger pulse, an b-ms step length would allow a 12.5% margin of safety against decreases in multivibrator period. Since such changes are associated with increases in supply (battery) voltage, the margin appears ample. Thus, once the value of Ce is determined, R2 and R3 can be calculated. R, The selection of Ce is related to the choice of Cc through the temperaturecompensation aspect of Eq. (10), while Cc is determined in Section V from a consideration of step droop. The value of C1 is based on considerations discussed on pages 33 and 34, where it was shown that it is the principal variable in Tb. For a sharp cutoff characteristic, the base and emitter time constant, Te and Tb, should be comparable. If there is an appreciable difference between them, the slope of the longer will approach zero, so that the shorter time constant will be the sole determinant of cutoff. The degree of freedom that does exist, 38

allows considerable flexibility in the choice of C1 on the basis of physical dimensions, step size, and temperature coefficient. Of these, the temperature coefficient is by far the most important consideration, since it permits compensating for the appreciable variation in the voltage drops across D1 and the emitter-base junction with temperature. The multivibrator collector-supply voltage can then be used as a fine adjustment of the step size. For convenience, a summary of the dependence of the various parameters of this section is given below as Table I; Table II lists typical component values. Details of the step-generation process, depicted graphically in Fig. 21; are given explicitly in Table III and illustrated by means of the oscillograms of Fig. 22, where the sharp cutoff can be seen. The point at which the multivibrator reverts to the high impedance position (t2) is visible as a change in the slope of the recharging portion of Fig. 22(c). The partially discharged emitter capacitor, Ce exhibits such a low impedance at this time that it suppresses the overshot that would otherwise occur. The duration of the charge-transfer period, the sharp cutoff mechanism, and confirmation of steady-state conditions prior to triggering at to, are all apparent in Fig. 22(d). Figure 23 displays the stairstep output voltage obtained from the Q-Transporter circuito 39

SUMMARY OF Q-TRANSPORTER AND TRIGGER STAGE DESIGN CONSIDERATIONS (1) Maximum rated multivibrator collector current determines the minimum value of RlO (2) Maximum acceptable step droop as well as physical size and temperature coefficient determine value and type of the capacitor used for Cc (3) Necessity of matching temperature coefficients suggests making Ce identical to Cc, while pressure to reduce recharging time requires use of a smaller value. (4) The product of voltage-operated reset switch intrinsic standoff ratio and the supply voltage magnitude (TE) determines the minimum quiescent base voltage R3 E +R2 +R3 (5) Minimum power loss in R2 and R3 on the one hand and minimum recharging time for Ce on the other serve with no. 4 to define R2 + R3. (6) Desired step size as well as system-temperature coefficient determine choice of C1 (coarse) and R1 (fine). TABLE II Q-TRANSPORTER AND TRIGGER CIRCUIT COMPONENT VALUES R1 R2 R3 Rc C1 Ce Cc 1,2 K 1.8 K 6.8 K 10 k o022 Vfd 1.0 tfd 5. 6 ifd 40

TABLE III Q-TRANSPORTER STEP-GENERATION SEQUENCE (To be used in conjunction with Figs. 21 and 22) Time Condition RMV Base-Emitter RCE IC VD Note ( vs ) Junction O- quiescent high cutoff high 0 nonconducting 0-15 MV "ON" falling conducting falling rising cutoff 15 " min saturated min max " 15-60 TIoII " " " " " 60o CUTOFF " cutoff high 0 saturated A 800 MV "OFF" rising " " 0 conducting B 6000 quiescent high I" " cutoff C 8000 CYCLE REPEATS Note A: Q-Transporter stage cuts off. C1 and C2 begin recharging in parallel. Note B: Multivibrator changes state, causing overshoot in base voltage. Nonlinear resistance of diode increases, slowing charging of Ce. Note C: Charging of Ce completed.

(a) Emitter Response |IIIIIIII E (2 ms/cmII II (b) Base Response EE***** ( 2 ms/cm ) l (c) Expanded View of. Base Response ( 1 ms/cm ) (d) Charge Transfer ___ Portion of Base Response ( 200 ps/cm ) Fig. 22. Q-fransporter Response to Trigger Pulse. (All vertical scales 2 volts per centimeter) ///l//!

V/(t)111/ I (2 v/cm) t (20 ms/cm) (a) Stairstep Output Waveform v (t) (0.5 v/cm) t (4 ms/cm) (b) Expanded View of Output Waveform Fig. 23. Q-Transporter Output Waveform.

Co MULTIVIBRATOR DRIVER CIRCUIT The switching times required for efficient step generation with independence of supply voltage variations have been specified in Part B of this section with the aid of Fig. 21. The following is a discussion of the properties of an astable solid-state multivibrator to meet the requirements for the "Timer." As previously mentioned, it is desirable to use the multivibrator frequency as a means of independent control over the step length and hence the repetition frequency of the stairstep output waveform. The most convenient means of exerting frequency control without affecting the degree of asymmetry is by varying the collector supply voltage. On that basis, a multivibrator of 9:1 asymmetry and base frequency of 70 cps at a nominal collector voltage of 13 vdc was designed using conventional methodso3 Figures 24 and 25 show the circuit configuration and output waveform, respectively, of this multivibrator. The temperature variation of the circuit, exclusive of capacitors, was then evaluated by placing the entire circuit, except for the capacitors, in an environmental oven. The resulting variation in the output frequency of the circuit is shown in Fig. 26. The variation is due principally to the temperature dependence of ICo and Vbe of both transistors. This variation was then matched by capacitors of opposite coefficients, while the resistors were adjusted for the desired base frequency and asymmetry. -Table IV lists the component values used, and Fig. 27 shows the compensated temperature variation over a wide range of collector voltages. TAIBLE IV MULTIVIBRATOR COMPONENT VALUES R1,4 R2 R3 C1 C2 l,2 10 K 100 K 82 K.68 pfd.022 tfd 2N33d 44 -

CC C2:1 2 MV Figure 24: Multivibrator Circuit. 30 (5 mv/cm) t (2 ms/cm) Fig. 25. Multivibrator Output Waveform

117 V = 13 cc MV (cps) 114 30 40 50 60 T ( C) Fig. 26. Multivibrator Temperature Characteristic. 190 t _ VCC=28 170 fxv 150.V =20 CC (cps) c 130 V =14 110 VCC 90 V =10 90...... -CC 20 30 40 50 60 T ( C) Fig. 27. Temperature Compensated Multivibrator Characteristic. 46

D. VOLTAGE-OPERATED RESET SWITCH Throughout the preceding, it has been tacitly assumed that a means of rapidly removing the charge accumulated on the output capacitor, Cc, was available. Indeed, blocking oscillator and gas thyrathron circuits are quite commonly employed as voltage-operated switches. A solid-state equivalent of the thyratron is the Unijunction Transistor (formerly called the Double-Based Diode). 4' It is small and has a high discharge-current capability. The applicable schematic and equivalent circuits for this device are shown in Figs. 28(a) and (b), respectively. The internal ohmic path (:-7K) R2 Emitter -t- Base Two 7-T~~~ VBB V_ C - k Base One L iRR B2 B2 Emitter R BB ' ~~1 /~B1 C B C 1 (b) Unijunction Equivalent Circuit Fig. 28. Unijunction Transistor Schematic and Equivalent Circuits.

between the base-two and base-one terminals draws a steady-state direct current from the voltage source E, and establishes an open circuit voltage of RB1 RB1 V. V= R1 =- VBB for R1 = 0 (28) rtVBB RB1 + RB2 BB RVBB across the emitter and base-one terminals (input) by ordinary voltage divider action. For inputs less than VBB, the PN emitter junction is reverse-biased and exhibits the high impedance characteristic of such diodes. If the externally applied voltage, VC, is raised, the point will be reached where the c emitter junction becomes forward-biased and current begins to flow from the emitter to base-one. Further increases in applied voltage will not raise the emitter voltage, Ve; on the contrary, Ve actually decreases. The emitter current, Ie, however, increases because RB1 exhibits a negative resistance characteristic above a peak forward-current value, Ip. The forward-biased input characteristic of this device is stable until a critical value of emitter current greater than Ip is reached. Avalanche multiplication of base-one carriers then occurs, decreasing RB1 according to Fig. 29. Currently available commercial units are rated to pass peak discharge currents of 2 amperes. Figure 30 depicts the discharge time as a function of emitter capacitance. For Cc greater than 1.0 [fd, the exponential discharge exhibits -an equivalent emitter-to-base-one series resistance of about four ohms, and typically takes approximately 200 lsec. This is about 3% of a typical step length. The most seriously undesirable feature of this device is the variation of its input impedance (emitter to base-one) in the vicinity of the firing 48

105,, (4s)100 RB t 3 f 10 (KO) 1 (vs) 0 1 3 5.001 0.1 10 Ie (ma) C (jfd) Fig. 29. Variation of Uni- Fig. 30. Discharge Time junction Base-One Resistance versus Emitter Circuit Capwith Emitter Current. acitance. -* — Cut of f --- Conduction - Leakage -— Negative Resistance -- Region Difference Between 'Stable - Breakdown -- Input Voltage 0.0 and Firing LeVel, V - V -0.2 a P (volts) -0.4.01 0.1 1.0 10 100 I (pa) e Fig. 31. Typical Unijunction Input Characteristic Near Peak Point. 49

point, V, as depicted in Fig~ 31. The current multiplication mechanism by which the rapid discharge takes place is actually a current-operated phenomenon rather than the voltage-controlled mechanism suggested above, Of course this is really just another aspect of the same thing, but the current-biased description is more revealing in this instance-as it is for solid-state devices in general. Initiation of the current multiplication process requires an emitter current of from 2 to 100 pia, depending on the value of the interbase voltage, VBBo Even for fixed values of interbase voltage, the emitter current required for avalanche breakdown exhibits considerable statistical deviation among specific Unijunctions. Thus the input terminals could draw up to 100 tpa from the input capacitor Cc without initiating breakdown. For a 5.6-1ifd input capacitor and an 80 O-ms step length, this results in a 1% droop on the last step before reset occurs. Previous steps would suffer proportionally less droop according to Figo 31. Two distinct methods of mitigating this effect are available. One is to increase the step size so that the knee of the input resistance curve, Fig. 31, is traversed in a single step. The second is to apply an external triggering signal either to raise Ve or to lower Vp by lowering VBB, thereby inducing premature firing. The first approach requires considerable modification of previous circuits. For a fixed number of steps an increase in step size increases the output swing and hence requires the addition of an output attenuator to realize the required levels. It will be shown subsequently that increasing the step size is desirable to facilitate establishing an unambiguous reference when the output voltage passes through zero. In the next section it will be shown that the principal

limitations in step size are the available supply voltages and the maximum reliable collector breakdown voltage ratings of the transistors. Therefore it is advantageous to consider the method of controlled breakdown by the application of a trigger pulse to one of the Unijunction terminals. Base-two is the terminal best suited to this role; any circuitry attached to the emitter would be additional loading on the output capacitor and would itself contribute to the droop, while application of a trigger signal to base-one would require the addition of a series impedance in that circuit which would increase the discharge time. It can be seen from the equation relating the firing voltage Vp to the interbase voltage VBB: Vp = Vd + VBB (29) (where Vd is the diode drop) that a reduction in VBB by a factor E would reduce Vp and cause the emitter to fire if Ve (=Vc) exceeded Vd + ) (VBB - c). Due to the storage effects at the junction, the duration of the triggering pulse must exceed o.6 Uisec for pulse amplitudes of about two volts. This signal could be obtained from a separate timing source (multivibrator or sawtooth oscillator), but a more reliable solution is to derive the trigger from existing waveforms. Since c is to be negative, it could be obtained from the collector waveform of the multivibrator that triggers the Q-Transporter stage as in Fig. 32. The latter introduces a 180~ phase shift that causes a positive signal (the step) of about one-half volt to appear at the emitter terminal of the Unijunction. This, combined with a simultaneously applied two-volt negative trigger signal capacitively coupled to the base-two terminal, would quickly traverse the knee of the firing curve (Fig. 31). 51

MV Q -...... --- 0 i Transporter C2 C Reset Switch Fig..2. Block Diagram of Unijunction Triggering Method. c R1 C12

Figure 33 shows the circuit implementation of these concepts. The basetwo series resistance would exist regardless of triggering requirements for temperature-compensation purposes. Thus C2 is the only additional component required. Its value can be calculated from knowledge of the minimum necessary pulse duration. When the output voltage of the multivibrator is maximum, R2 2 BB Immediately after the multivibrator changes state, V = V + (E - V ) exp t R (31) BB C C 2 2 2 For a pulse width of at least 1 Usec, R2C2 1 x 10; and 02 will be 0.00 tfd when R2 is shown to be 330 ohms in Eq. (32). The finite value of multivibrator switching time, with the above value of C2, prevents VBB from being instantaneously shorted to ground and the Unijunction thus firing at every multivibrator pulse. VBB actually drops only about two volts, or four step heights, which is sufficient virtually to eliminate the Unijunction's contribution to droop. Figure 34 is a photograph of the actual interbase voltage, VBB. The large 17-volt spike occurs during the discharge of Cc, at the end of a sweep. The smaller 1.5-volt spikes are the capacitor-coupled trigger pulses from the multivibrator. It can be seen that they occur exactly one step length apart. An expanded view of the discharge spike is shown in Fig. 35. The discharge time is seen to be slightly over 200 tsec. Even on this fast trace, the slope of the leading edge of the discharge spike appears infinite.

VBB 5 v/cm ) t (5 ms/cm) Fig. 34. Oscillogram of Unijunction Interbase Voltage, VBB. ( 5 v/cm)il t (50 As/cm) Fig. 35. Oscillogram of Unijunction Discharge Spike in Interbase Voltage. i~mmmmm5mm

The fact that these trigger pulses are applied to base-two of the Unijunction each time the multivibrator changes state, or n - 1 times as often as necessary, is an inconsequential feature of this arrangement. The additional power is only 2.5 Itw and the additional discharge current through the multivibrator averages 3.3 pa while the finite switching time likewise limits the peak discharge current to much less than the maximum transistor rating of 20 ma. The switching time is so predominant in determining the magnitude of the trigger pulse that a temperature variation of + 1004 can be tolerated for the trigger capacitor. Much more critical, however, is the temperature variation of the firing point [Eq. (38)] of the Unijunction. From the equivalent circuit of Fig. 28(b), it is evident that Br will be independent of temperature since RB! and RB2 are formed by a tap on the same homogeneous material (a bar of silicon) and hence have the same temperature dependence. The variation of the junction diode voltage, Vd, moreover, can be compensated for by modification of the interbase voltage (VBB) in Eq. (38) by the addition of resistance in either the base-one or base-two leads or both. The resistance is chosen so that the voltage divider ratio forming VBB exhibits the precise fraction of the temperature dependence of RBB necessary to compensate for the coefficient of Vd. The manufacturer's empirically derived formula: 0.70 RBB R1 32) E l 2 E (32) determines R2 to be 330 ohms for R1 = 0 in Fig. 28(a). The firing point

Eo OUTPUT AMPLIFIER The reader will recall from Fig. 1 that the stairstep voltage output of the bV generator is to be applied across the series combination of the current detector and the hemispherical collectors to measure the "plasma resistance," Rpo Given the known voltage steps and measuring the current at each level, the Ohm's Law calculation for Rp will include the series resistances of both the 5V generator and the current detector as well as Rp. In practice, Rp ranges from several megohms in the ion saturation region to several hundreds of kilohms at the lower applied voltages, whereas the series resistance of the current detector is about 10 kilohms. Correction is made for the voltage drop across this resistance in reducing the flight data. It is desired that the 5V series resistance be as low as possible so that, in the event of any variation during flight, the change in correction factor will be negligible. Thus an amplifier of nearly perfect linearity, wide dynamic range, and low output impedance is required. Moreover, the amplifier input resistance must be high enough so that the current drawn from the output capacitor, Cc, during the long data-collection intervals between pulses, causes only negligible step droop. An amplifier configuration that satisfies the above requirements is the emitter-follower circuit. The equivalent circuit representation of Fig. 36 can be solved for the input and output resistances to yield the results given in Eqs. (33) and (34),. respectively.

Base Collector e C R Ic Emitter R cc --- — cc ei E Fig. 36. Emitter Follower Equivalent Circuit. r + R e E R = l. + +r E (33 i c (l-a) r + r + Ra c e E and R + r R = r +r (l-b) b (34) o e c R + r + r (34) g b c It is clear initially that Ri can never exceed rb + rc ( - 10 megohms) regardless of the value of the emitter resistor while Ro can never be less than re + (l-a)rb [ ~ 63 ohms]. It is advantageous to approach these limiting values, since they represent the minimum loading on Cc and the minimum series resistance, respectively. Therefore, the transistor for the first stage of the amplifier must have high collector resistance as well as high gain and low leakage. A survey of commercially available transistors indicates that the 2N338 silicon grown junction (diffused base) best meets these requirements. For convenience, a summary of its significant parameters is given below as Table V. More complete descriptions of all transistors used are given in Appendix II.

TABLE V PROPERTIES OF 2N338 TRANSISTOR _ re rb rc Ido 0.99 33 3K 10 M 0.002 Mia The impedance transformation ration (Zin/Zo) attainable with a series of N emitter follower stages each of current gain A is about AN. For A = 100, N = 3 gives a transformation ratio of 106. This figure indicates that the limiting impedances of 10 megohms and 63 ohms given by Eqs. (33) and (34) for the input and output, respectively, can be closely approached by three stages. Considering the three-stage amplifier of Fig. 37, it is of interest to calculate the three emitter resistors and to specify the over-all input and output impedances. V cc in V.E V Fig. 37. Emitter Follower Amplifier Circuit. Since the maximum emitter current for the 2N338 is 20 ma, V e 16 RE3 20 K = 800 ohms, minimum (35) 3 e Twenty milliamperes drawn from the 28-volt supply is over 1/2 watt of power - as a58

much as will be required to operate the rest of the device. Hence, RE should be increased to at least 10 times the minimum value above, or to 8 K, to reduce the power consumption by a factor of ten. But if it is necessary to tap down on the final emitter resistor (RE3) to obtain a lower amplitude output swing, the voltage divider thus formed will introduce additional series resistance that could be as much as 1/2 RE. Setting RE3 equal to 5 K seems to be a reasonable compromise; the output resistance would then be between 63 and 2600 ohms, depending on tap position, while the maximum current drawn from the power supply is 3.2 ma. On this basis the input resistance to the final stage is: ( 10 ) 50 + 5 M = 910K (36) An emitter resistance of 100 K would limit the maximum emitter current of the second stage to 160 ia and reduce the effective load resistance of that stage to: R R. E2 13 I00,9.10 =E + R K = 90K (37) RE2 + Ri 1010 3 The input resistance to the second stage would then be: 90 g38) R. = 6 10 ) 50 + 90 M = 6.43 M (38) R,,= ( 10 ) 50 + 90 12 An emitter resistance of 3.3 megohms would limit the maximum emitter current of the first stage to 6 Cpa, and reduce the effective load resistance of that stage to: R R, RE1 2 +.3 R6.4 M 2.15 M (39) RE + R; 9e.7 1 2

The input resistance to the complete three-stage amplifier would then be: =.(10) 2.15 R (10) 2.15 +.05 9. 7 M (40) Therefore the limiting value of 10 megohms is closely attained. From Eq. (34) the minimum stage output impedance, which occurs when the driving source has zero internal impedance, is 63 ohms. This value is approached using a threestage amplifier even if the source is assumed to have infinite internal impedance. Since three stages of impedance transformation very closely approach the limiting values set by the transistors, adequate circuit performance is assured in spite of relatively large variations in transistor parameters of random origin. Moreover, provision for an accurate zero reference is more readily achieved as a result of the flexibility due to the large range of impedance transformation realizable with this circuit. The transfer function of the emitter follower circuit, however, involves the nonlinear threshold drop across the forward-biased base-emitter junction. Figure 38 shows this characteristic of current-operated devices. The region of nonlinearity can be avoided by application of a positive d-c bias of at least 2 volts magnitude. [If necessary, this bias could be removed after the emitter 1.0 Vo/Vin |/ V/V. 0.5 1 2 3 V (volts) be Fig. 38. Emitter Follower Stage Voltage Gain. 60

follower amplifiers by an appropriate d-c source placed in series with the output terminals. ] In the present application, the biasing voltage already exists at the input terminals of the amplifier as a result of the residual (valley) voltage remaining on Cc after the firing of the Unijunction reset switch. This is typically 2.5 volts. Biasing of the output is necessary in either case, however9 to provide an output sweep which centered on zero volts. An additional requirement of the amplifiers is that the collector voltage exceed the maximum voltage swing to be expected to avoid clipping. The requirement that V Vcc < B is easily satisfied and allows the collector voltmax. age to be obtained from any convenient point in the circuit. This permanent reverse-biasing of the base-collector junction will result in the flow of leakage current into the capacitor, which tends to replenish the charge lost due to the flow of base current into the amplifier. The effect of this leakage current will be treated in Section Vo 61

F. ZERO REFERENCE To correct for the particles collected solely as a result of the velocity of the probe through the ionosphere, the current resulting when zero voltage is applied across the probe terminals must be measured. The special significance attached to the measuremett at this particular voltage level makes adjustment of the stairstep waveform, so that one step falls precisely at zero, an unreliable solution, since a drift of even a few millivolts would be unacceptable. Recognizing this, present electronic 5V's, having a sawtooth output waveform,6 employ a zero reference circuit consisting of a parallel combination of two reversed diodes in series with one output lead, as in Fig. 39. Ideally, when Current Detect or Linear,,R Sweep P Fig. 39. Diode Zero Reference Circuit. the driving voltage is less than or equal to the threshold voltages of the diodes, the generator portion of the current through the output resistor RL is reduced to zero; yet the voltage swing is unaffected beyond the threshold region either side of zero volts. Of little consequence is the finite dynamic resistance of the conducting diodes, as shown in Fig. 40, since it merely 62

alters the slope of the driving sawtooth waveform. 1.0.75 D.50.25 0 ' /..I. 1. 1. 0 1 2 3 4 5 Vin (volts) in Fig. 40. Silicon Diode Forward Transfer Characteristics. When the driving voltage is a stairstep waveform, however, the nonconstant voltage drop across each conducting diode superimposes its nonuniformity upon the steps. Consequently, to preserve the uniformity attained thus far, a switching device of more ideal characteristics is required. Switches may be considered to fall into two general categories, active and passive, according to the nature of their activation - diodes clearly belonging to the latter class: moreover, both types of switches can be utilized in two distinct modes, series or parallel (shorting) - the above diodes clearly representing the former use. Figure 41 shows the application of this concept to the circuit under discussion. r. S Detector 'in series R "1R " FSITV I Sparalle Fig. 41. Generalized Zero Reference Circuit. 63

A solid-state parallel switch, either active or passive, employed to short the generator terminals at a specified time for a specified duration. would be a device that could be driven from a high impedance state to a low, or saturated, state. As such it will always exhibit some finite resistance (40 ohms for a transistor) and a residual voltage (400 mvy, typically) and hence would be even less satisfactory than simply adjusting one of the original steps to be coincident with zero. The diode arrangement above thus represents the only mode of operation (series) capable of meeting the requirements of an acceptable reference. To find a more satisfactory transfer characteristic than that exhibited by the passive diode switch, the above requirements suggest investigation of active series switches. Consequently,a transfer function similar to the emitter-follower characteristic of Fig. 38, which exhibits a region of constant base-emitter voltage drop, is mandatory to avoid a calibration curve. However, this transfer function is not directly usable since the region of uniform junction drop has only been approached at the maximum sweep excursion of 350 voltso The bias possibilities considered when this problem was discussed ~in the previous section (emitter-follower output amplifier) are not applicable here, since a zero reference requires deliberate use of the entire characteristic curve including the transition (knee) region. Therefore, the only alternative is to increase the step size (and hence the input swing, if the number of steps is to be held constant) sufficiently so that the knee of the transfer characteristic is but a small portion of the total excursionn Of course, it is then necessary to employ a final voltage divider to restore the stairstep amplitude to the desired output level. The maximum increase in step size is limited by the maximum positive amp64

litude of the voltage swing and the number of steps required. The former is determined by the level of the positive voltage source and the intrinsic standoff ration (rI) of the Unijunction voltage-operated reset switch, which are fixed externally at 28 vdc and 0.67, respectively. The trigger techniques used to reduce the step droop caused by the Unijunction reduce the maximum positive limit of the output swing by some two volts to approximately 17 volts. For 30 output step levels each step would be approximately 0.57 volts and the first four steps on either side of zero would be foreshortened as a result of the nonuniform diode drop. Ideal performance near zero would require at least 2.5 volt steps, a 75-volt swing and 110 volts for the Unijunction base-two supply. This supply voltage is not consistent with current instrumentation plans, and, furthermore, voltage swings in excess of 35 volts are entering the region where the probability of a transistor failure due to collector breakdown is not remote. Thus, the only compromise now apparent is to increase the step size as much as possible (to slightly over one-half volt) and to provide a calibration curve for the steps adjacent to zero. In practice its use would be contingent on the economics of the trade-off between the inconvenience involved and the utility of the information available at that level. The reader will perhaps recall from Figs. 2 and 3 that this is the area where the measured current consists of contributions from both electrons and positive ions, and that the information sought by this experiment occurs principally after one component or the other of the total measured current has nearly vanished. This occurs at the higher voltage levels and reduces somewhat the necessity of a calibration curve near zero 6V. Figure 42 shows an emitter follower type zero reference circuit used in conjunction with the output amplifier of Fig. 37. Only one additional transistor and one resistor are required, The stairstep input waveform, Vin, driving this circuit is shown in Fig. 43. The corresponding output waveform, Vo, as well as two expanded views that exhibit the area around zero volts, are shown in Fig~ 44~

+V cc Q - Transporter Res et _ Switch c V. V (t) -V n Fig. 42. Emitter Follower Zero Reference Circuit. in0 (t) ( 4.4 v/cm ) li* * * * t ( 42.4 ms/cm ) Fig. 43. Zero Reference Circuit Input Waveform. 66

(a) V0 @ 2.0 v/cm t @ 42.4 ms/cm (b) V @ 1.0 v/cm t @ 42.4 ms/cm V @ 0.5 v/cm t @ 8.5 ms/cm E Fig. 44. Zero Ref erence Circuit Output Waveform. 67

VMv E MV VEF -V -V n EF Fig. 45. 5V Schematic Indicating Required Supply Voltages.

Go POWER SUPPLIES Figure 45 is a schematic diagram indicating the required supply voltages for the circuitry developed. It is assumed that adequately regulated and temperaturecompensated plus and minus 28-volt sources are available. The maximum output swing has been shown to be approximately 17 volts. Therefore, the negative line voltage Vn must be half of this plus one half of the valley voltage bias level or about 10 volts to center the output swing on zero. To allow for minor variations in the valley point of the Unijunction and in the base-emitter drops of the emitter followers, it is convenient to determine the voltage that precisely centers the sweep about zero by supplying this negative voltage from a variable external power supply as discussed in the partsselection procedure of Section VIo The permanent negative voltage level could be obtained from the negative 28-volt source by a simple voltage divider, but additional regulation is easily obtained by the use of a zener reference diode. Figure 46 shows the temperature coefficients of typical zener diodes. Since a single diode providing the required 10 volts would exhibit a negative temperature coefficient of 0~06 %/~C, it is necessary to use two diodes in series to develop 10 volts drop and a net temperature coefficient of zero. Figure 47 exhibits the typical reverse characteristic of these diodes. Since decreases in supply voltage magnitude are the most likely variation to occur, the diode operating point must be sufficiently past the knee of the curve to provide adequate regulation. The corresponding current is determined from the characteristic curve and this, with regulator input and output voltage levels, determines the value and power rating of the series dropping resistor. An additional requirement of the negative supply is that it be capable of passing, in the reverse direction, in the reverse direction, positive pulses from the series combination of Cc and the Q-Transporter~ These currents, which reach peaks of about 80 ma for a few microseconds, greatly exceed the regulation.range of the zenero Moreover, 69

.06 I -5 ma. Temp. z Coeff..02 0.02 (%/ C) -.06 3 5 7 9 11 V (volts) z Fig. 46. Typical Temperature Coefficients of Zener Reference Diodes. z V 0.4 Fig. 47. Typical Zener Diode Reverse Characteristic. 70

if this current were made to pass through the dropping resistor and the power supply to the ground, the rise time of the steps would increase thirty-foldo Any switching device used at this point to reduce temporarily the charging resistance would in addition short out the negative supply, and hence involves the interrupting of large currents and a consequent power losso Even more important than the power loss is the overshoot that occurs if the negative supply should be temporarily shorted to provide a low impedance path to ground. The output voltage would then change by Vno The zener diode itself provides this switching function, since the change in current from -5 ma to + 75 ma causes the terminal voltage to change from -10 to + 0~7 volts. To suppress this overshoot, a shunt capacitance is added across the zener diode. If the capacitance is large enough, it can accommodate the change in charge of Cc without an appreciable shift in voltage level. Moreover, because of the low dynamic impedance of the zener in parallel with the capacitor, the time constant of this circuit can be made low compared with the step length, even for large values of capacitanceo The positive supply voltages present considerably less difficulty. The circuitry of the Q-Tiransporter and the Unijunction stages have already been designed to operate from the +28-volt supply. For ease of construction, the multivibrator supply voltage will be used to adjust the frequency of the trigger pulses for continuous control of the stairstep repetition rate. The magnitude of the trigger pulse can be maintained constant and independent of the multivibrator frequency by returning the collector resistor (R6) of the output transistor, Q2, directly to the +28-volt supply. Since, by reason of the high degree of asymmetry, Q1 will be conducting 90% of the time, a voltage divider can be formed by inserting a dropping resistor in series with the collector resistance R 71

If R3 and R4 are returned to this point as in Fig. 49, independent frequency control can be achieved by adjusting either R1 or R2. Inasmuch as the voltage at the divider will increase during the trigger pulse period when Q1 is cut off, a further increase in the degree of asymmetry is attained. The frequency range of 80 to 200 cps as in Fig. 27 can be achieved in this way with a 70% reduction in power consumption over a zener-regulated source. To achieve linearity in the emitter-follower stages, the impedance of the collector circuit must be low compared with that of the emitter. Moreover, the collector voltage, Vcc, must be less than the transistor breakdown voltage and greater than the maximum base voltage. For the 2N338, VCBO is 45 volts maximum and the base voltage peak is about 9 volts. Thus the final amplifier stages, Q7 and 6Q, of the zero reference circuit can be returned to +28 and -10 (Vn) volts, respectively. It is to be noted, however, that the emitters of Q5 and Q6, the first two amplifier stages are already biased by Vn to center the output on zero volts. This bias voltage is in series with the collector supply voltage, so that the sum of the magnitudes must be less than VCBO. A greater measure of reliability can be achieved by keeping Vcc as far below rated breakdown as possible, but any voltage divider used for this purpose will also introduce series resistance into the collector circuit. As this resistance is reduced, of course, steady-state power consumption increases. Typically, 48 mw are dissipated to reduce the, collector voltage 16 volts, while introducing 2000 ohms of collector resistance. Although this is a situation where voltage regulation is not required, a zener regulator diode may be used to advantage to reduce collector impedance. '~e 48 shows the variation of zener diode dynamic impedance for typical breakdown (zener) voltages and biasing currents. ThBus a 12-volt zener 72

400 — 5 ma. 40 J. 10 4 5 7 10 15 20 30 40 V Fig. 48. Variation of Zener Diode Dynamic Impedance. drawing 1 ma will reduce Vce to 26 volts maximum, while introducing less than 100 ohms of collector resistance. The steady-state power dissipated has been reduced by 1/3 to 16 mw. The complete circuit diagram of the stairstep waveform generator, including power-supply features, is shown in Fig. 49. Component values are listed in Table VI. 73

R2 H2 I 2-5K 1 R9 iL 8K RI2 8.2K Di K3 K4 10K 100K 82K ) 15K Q4 ~~~~~~~~D4 C, C2 C4 R7 04 1.2 ___06.68.022 01 6.8K R10 Q5~~~~~~Q 03.002 R5 RI 1 Y~ 3 3-3M C5 R13 " L Fig. 49. Complete 5V 5.6 82K Generator Circuit Diagram. DI 1.5 C7 D3 68" -E

TABLEE VI STAIRSTEP GENERATOR COMPONENT VALUES* Q C D _________ (4f'd) _ _ _ _ _ _ _ 1 2N338**.68 lN645 2 2N338**.022 4.5 volt zener 3 2N492.002 6.o T 4 2N1036.01 12 II IT 5 2N31558 5.6 6 2N338** 1.0 7 2N338** 68.o 8 2N10o36*** *See Section VI for component test procedures. **May be replaced by the 2N793 for a reduction in volume (95%). ***May be replaced by the 2N329B or equivalent. All resistors are 1/10 watt except R8 and R11, which are rated 1/4 watt. All capacitors are rated for a minimum d-c -orking voltage of 35 volts except C7, whi~ch nay be rated at 15 volts.

MV -- - Transporter AMP. AMP. V1(t) Power Reset () Bias Bias Supply Supply Fig. 50. Dual Output Circuit.

IVo DUAL OUTPUT CIRCUIT The circuit design of a single-output stairstep waveform generator was discussed in Section III. This unit, without further modification, has application in Langmuir probes in which the guard and collector circuits do not require d-c isolation. The first flight test of the unit will be in such a system. In the present section, however, the switching techniques of Section II are applied to yield dual, isolated outputs from the step generator so that it may be used, as planned-, in the isolated guard-collector probe configuration of Fig. 1l A. DIODE SWITCHES Figure 50 shows the essentials of a diode-switching system which provides the separation and isolation necessary for the dual outputs. A single Q-Transporter stage and its associated multivibrator and trigger circuit charge two identical output capacitors through the diode bridge circuit showno The diodes permit connection of the capacitors only during the charging phase and isolate them between pulses. Identical output circuits, including a separate zero reference, Unijunction reset switch, as well as separate power supplies are necessary to maintain d-c isolation of the output circuitso The power source and bias supply shown for each system need not be isolated from each other, but both are required; the former, to provide the power gain for the stairstep voltage developed across the output capacitor and to operate the Unijunction reset switch, the latter, to center the output sweep on zero volts. Each pair of power supplies could thus be a single tapped sourceo Inasmuch as each supply is isolated from the source that provides the charging pulses to 77

Cc, the biasing supply may be placed directly in series with the output, irrespective of ground connections, thereby simplifying the design requirements since the charging pulses need not flow through the bias supply. Diodes of exceptionally high reverse impedance and low leakage are used for the bridge circuit. Figures 51 and 52 depict the reverse characteristics of the type FD300 diodes used. During the charging pulses, the impedance of the path shunting the capacitors is as little as twenty ohms, which insures that the charging currents to each capacitor are identical. Between pulses (during the data-collection interval) the path between the capacitors contains two back-biased diodes, each exhibiting a reverse impedance of at least 2 x 105 megohms. Thus isolation of the two outputs approaches the region where leakage resistance paths (on the printed circuit board primarily) are the limiting factors. 1.0 6 0.8 0.6 4......... (na) I - ( _ __a o.4, 0.2 ~ o -".......zz...i 1 I 0.0 0 -0 40 80 120 160 0 50 100 150 200 VR (volts) T (O C) Fig. 51. Bridge Diode Reverse Fig. 52. Bridge Diode Reverse Characteristics (at 250C). Characteristics Versus Temperature (at VR = 125 volts). 78

B. SYNCHRONIZATION OF RESET LEVELS Concern about the use of separate power supplies for the two isolated systems arises from the voltage dependence of the firing points of the Unijunction reset switches. It has already been shown that the performance of the emitter-follower amplifiers is independent of a wide range of variation in collector-supply voltage. To preclude the possibility of a power-supply variation or other change causing the Unijunctions to reset on different steps and thereby lose synchronization, techniques analogous to the external triggering method discussed in Section III D may be employed. The constraint of d-c isolation (even for transients, which may be of long duration compared with the step length because of the high value of "plasma resistance") prevents the use of an extension of the capacitive coupling method previously used to prevent step droop. An alternative means of synchronization is the coupled transformer scheme in Fig. 53. The transformer polarities will be arranged so that the E1 E2 Q-Transporter Q-Transporter Amp. t --- —t ---\m. 1~~~~~~~~~~~V (t) V (t) 4 V2(t) Fig. 53. Transformer Synchronization of Reset Levels. 79

firing of either Unijunction develops a pulse in the base-two circuit of the other that reduces its interbase voltage, thereby causing it to fire-. The value of transformer inductance required can be calculated in a manner analogous to that used to determine the value of capacitive coupling needed; i.e., by specifying the minimum pulse durationT,, required for reliable triggering. For T = L/R _ 1 x 10 seconds, where R is the sum of the Unijunction interbase resistance, RBB, and the external base-two resistance, R2, L = 7 millihenries. Miniature pulse transformers in this region are readily available. The circuit of Fig. 54 is used to evaluate the degree of synchronization attainable by this means. The reset switch of a single 5V generator is inductively coupled to a Unijunction sawtooth oscillator shown on the right of the transformer in Fig. 54. This test oscillator circuit simulates the firing of the second 5V generator, while allowing more convenient measurement of the firing voltage, since the emitter voltage is continuous. Triggering of the 5V E sV Generator Unijunction Test Circuit B+ VBB V n Fig. 54. Dual System Synchronization Test Circuit. 80

reset switch developed a negative 6-volt, 7-psec spike in the interbase voltage of the test Unijunction. This resulted in a 1.6-volt drop in the emitter firing point, Vp, or synchronization over three step levels. This is equivalent to a + 10% frequency zone of synchronization and should adequately compensate for any discrepancies likely to occur between the two output circuits during flight. Figure 55 shows the transformer coupled synchronizing pulse, developed by the firing of the bV reset switch, as it appears across the interbase resistance of the second Unijunction. The overshoot that appears after the negative pulse would not occur until after the discharge was completed ( _ 250 is) if the second Unijunction had been permitted to fire. Firing was prevented (by reducing the interbase voltage to zero) to exhibit clearly the magnitude and duration of the coupled pulse. (2 v/cm) t ( 5 s/cm) Fig. 55. Transformer-Coupled Synchronizing Pulse. T//he sawtooth oscillator test circuit in Fig. 54 is additionally useful for experimentally selecting the optimum Unijunction transistors for flight purposes. The output voltage across the emitter capacitance is a sawtooth 81

sweep whose minimum is the Unijunction valley voltage Vv, and whose maximum is the peak point voltage Vp. The amplitude of the output swing is thus equal to Vp - Vv (a quantity that is to be maximized to develop the largest possible step and thereby minimize the effect of the nonlinear region of the zero-reference amplifiers). In addition, by means of careful adjustment of R, it is possible to achieve an equilibrium condition where the emitter voltage will neither increase nor decrease, since the direct current supplied through R that is flowing into the forward biased emitter junction is insufficient to initiate avalanche breakdown according to Fig. 31. By means of this steady-state condition, the value of the peak point currents of a sample of Unijunction transistors may be conveniently determined. The significance of this parameter is that it has been shown in Section III D to contribute directly to the droop of the top steps. According to the manufacturer's specifications, the quantity Vp - Vv may vary from 11.8 to 17.8 volts under the intended operating conditions, and the peak point emitter current has been found to vary from 2 to 30 pla in a sample of six units, which makes knowledge of these parameters mandatory for each Unijunction and the use of this simple circuit extremely advantageous. 82

V. ERROR ANALYSIS A. STEP DROOP When the charging of the output capacitor through the Q-Transporter stage was discussed, it was asserted that the leakage current, ICO' was at least four orders of magnitude less than the charging current and hence negligible. This was a reasonable conclusion for the time interval concerned. Attention will now be directed to the interval between charging pulses where the same leakage currents will have a more prominent role. Figure 56 depicts the currents that flow during the data-collection intervals between charging pulses. The transistor leakage currents tend to jIeo1 AMPLIFIER R; — At- L + V(t) R C 0 C Fig. 56. Output Capacitor Currents. 83

replenish the charge lost by Cc as a result of the finite shunt (leakage) resistance of the capacitor as well as the flow of load current, IL, into the input resistance of the output amplifier. It has been shown that the latter is subject to the fundamental physical restriction of the shunting effect of the collector equivalent resistance, rc. The capacitor leakage resistance has been experimentally determined to be of the order of 109 ohms, which is negligible compared to collector resistances in the vicinity of 107 ohms. Thus, immediately after a charging pulse, the charge on the output capacitor is given by: qc(t) = C V (t) C C (41) and the load current by: = C et/t L R (42).where = R.C 25 sec and 0 t < 8 ns. nThus IL is virtually constant and equal to Vc/Ri, for t equal to the step length, T, of 8 ms. The change in charge on Cc due to the flow of collector leakage current and load current during the interval between charging pulses will thus be: Aq = (21 I) T (43) for a percentage change in charge of: Aqc 21 IL P =. T x 100 q qc C V C C x 100 (44) V R. c c 1 c 84

The variation of the capacitance of Cc with temperature affects the output voltage to an extent beyond that described by Eq. (44). Thus the percentage change in output voltage, Pv, is P q/Kt where Kt is the temperature coefficient of Cc expressed as a percentage of the 250 capacitance value. Values of Pv at the end of each step length (droop) have been calculated for changes in temperature over the design range of step voltage (Vc)* The other parameters in Eq. (44) are assumed constant with the step length, T, equal to 8 msec, Cc equal to 5.6 ptfd, and the emitter-follower input resistance, a conservative 5 megohms. The calculations and results are shown in Table VII below. TABLE VII Pv PERCENTAGE DROOP OF OUTPUT STEPS WITH TEMPERATURE T I V P AC CO c q c v (~C) (4a) (vdc) () () (%) -5 0. 0002 0.5 -. 0286 -2.3 -.0293 I" 17. 0 11 25 0o.005 0.o 5 -.0258 0 -.0258 I 11 17. o -. 0286 " -.0286 55 0.135 0o 5 -o0486 2.3 +o 0476 II I " 17.0 -.027 I" -.0264 65 0.40 0~5 +.20 3.15 +.1937 "I " t 5.0 -.oo6 -.o 0055 "I "I 10.0 -.017 -.0166 "I " I 17 0 -.022 " -.0214

These values, based on Eq. (44), demonstrate the following facts: (1) That were it not for the temperature dependence of the leakage term in Eq. (44), the percentage droop would be exactly the same for all the steps regardless of voltage level. (2) That while the departure from zero slope is uniformly small, the deviations are cumulative, resulting in maximum error at the higher voltage levels. (5) That high leakage currents impart positive slopes to the initial steps, since significantly more charge is added than is extracted during periods of low output voltage. (4) That the load-current term can be reduced by increasing the input resistance of the amplifier. (5) That the over-all percentage droop is inversely proportional to the magnitude of Cc. Since the variation of ICO is so great.over the design temperature range, it is not feasible to attempt to match the load current with the leakage currents that flow into Cc to reduce the cumulative error. This would be the equivalent of an attempt to match a linear variation with an exponential and is possible only over small intervals. Therefore step droop and cumulative error are best reduced by the approach previously employed, i.e., using low leakage transistors, large output capacitance, and high amplifier input resistance. The results attained (Table VII) are deemed adequate for the experiment. B. ENVIRONMENTAL EFFECTS The following is a description of the performance of the yV stairstep

generator circuit under adverse voltage and temperature conditions. Attention is directed toward the degree to which the number of steps, the step size, and the d-c level of the steps remain constant. 1. Voltage Stability Variations in supply voltage can affect the output waveform in three ways: (1) the number of steps may change, (2) the step size may change, and (3) the d-c level of the waveform may change. The first variation, the number of, steps, is affected principally by changes in the firing level, Vp, of the Unijunction reset switch, if the step size and d-c level are constant. Vp, in turn, is directly proportional to the regulated supply voltage, E. The voltage divider action of the Unijunction between the base-two and emitter terminals, provides an additional regulation factor of e. For a step size of 510 mv (a 17-volt swing with 30 steps, it is possible to center the firing point between two steps so that as much as a ~200-mv variation can occur without changing the output swing by one step. Therefore regulation of the positive 28-volt supply to within 300 mv or about 1% is adequate to insure against variation in step number. The second variation, step size, is affected principally by changes in the collector voltage of Q2 and/or in the steady-state Q-Transporter base voltage, Vb. Since these circuits have been designed to be self-compensating in Section III B1 variations several times the above tolerance of +300 mv may be experienced without adverse effectso The third variation, changes in the d-c level of the stairstep waveform, are the result of changes in the negative supply voltage, Vn, used to center the waveform on zero volts. This biasing voltage is obtained from the negative 67

28-volt supply by a series-dropping resistor and a zener diode. The supply voltage is itself regulated to within +300 my, while careful selection of the operating current for the zener diode (set by the value of series dropping resistance) can result in regulation of Vn to within a few millivolts. 2. Temperature Stability Variations in ambient temperature affect principally the nominal value of capacitors and the magnitude of the voltage drops across semiconductor junctions. The capacitance variation has previously been accounted for in Sections III B and V A. The variation of junction voltage drops can be compensated by careful selection of the temperature coefficient of the trigger circuit capacitor, C4% By this means compensation of step size with temperature to less than 3% over the range of from 0~ to 50~C has been attained. Finer compensation requires the use of measuring equipment approximating, or better still, exceeding, the resolution of the recording equipment used in the actual flight. The degree of compensation attainable is principally a function of the patience exercised in the selection of the coefficients of C4 and R7 of Fig. 49. 5. In-Flight Calibration Previous instrumentation packages employed an internal calibration circuit to check system performance during flight. For approximately one second out of every thirty, the output of the linear yV 'is removed from the probe electrodes and applied to a known resistance standard. The bV output is assumed constant and' accurately known, allowing calibration of recorded galvanometer deflections in terms of the calculated current through the known resistance. In this manner, 86

changes occurring in modulation, transmission, demodulation, and recording equipment may be detected and considered. The first flight test of the digitized bV generator, described herein, will be as part of such a system. Internal switching and timing circuits will apportion data-collection and calibration times between the two 5V generators, providing both linear and discrete data, and permitting evaluation of the stability of the discrete step levels in terms of the stability of the output of the proven linear 6V generator. It is expected that such a test will be made late this year, in an experiment requiring only a single-output 6Vo 89

VI. PRACTICAL CONSTRUCTIONAL DETAILS To facilitate the construction of the circuit described in the preceding sections, control of the output parameters (the number, amplitude, and duration of the steps, and the repetition frequency) has been concentrated in a few key components. As a result, the other components are not subject to stringent tolerances, and may be assembled into the circuit without extensive testing. Experience will dictate if quality control testing of the Go, No-Go variety is justified to determine whether these components are within manufacturer's specifications. The exceptions are capacitors C5 and C6 of Fig. 49 (previously referred to as Cc and Ce)y whose temperature coefficients are of vital importance. A method for determining the temperature coefficients of large capacitors such as these, has been developed and is detailed in Appendix III. It will be noted, especially from Section III, that a single transistor type is often used in more than one circuit application. The 2N338, for example, is used as a switching device in the multivibrator circuit and as an impedance transformer in the emitter follower stages, while the 2N1036 is used as a Q-Transporter as well as an impedance transformer. Different qualities are required for these roles, and transistors of the same lot are subject to wide variations in parameters, which makes selection desirable and profitable. A. TRANSISTOR SELECTION Transistors may be evaluated by measuring the hybrid (h) equivalent circuit parameters, the collector leakage current, ICO, and the collector breakdown voltage VCBO. These parameters are conveniently measured on such instruments as 90

the Owens Laboratories Semiconductor Test Set, Model 310. Transistors exceeding rated leakage or failing to meet the specified collector breakdown requirements are not used. Acceptable 2N338's are then ranked in descending order of input impedance (hob-1) and used in the following sequence: Q5, Q6, Q7 Q1i and Q2. Q5 is the preferred position because of the high amplifier impedance required at the input to avoid step droop. Q1 and Q2 can be further differentiated by selecting the unit with minimum saturation resistance (RCE) for the Q2 position. -14, Collector leakage currents to 1014 amp may be evaluated by means of the Keithley Electrometer used as shown in Fig. 57. This measurement is especially useful for determining the optimum 2N1036 for the Q-Transporter stage (Q4). E Electrometer s o~ I R ~ I ICO V/R Fig. 57. Transistor Leakage Current Measurement Circuit. Unijunction Transistors (2N492) have been evaluated in Sections III D and IV B. In summary, the test circuit of Fig. 54 is used to select the Unijunction possessing minimum peak emitter current (Ip) and maximum emitter voltage swing (Vp - Vv). B. CIRCUIT ADJUSTMENT The range of voltage variation across the output capacitor, Cc, is controlled 91

by the parameters- of the Unijunction reset switch connected across it. This voltage swing has been set by zero-reference considerations, Section III F, at the maximum feasible variation of 17 volts. Under this restriction, the step size and the number of steps cannot be chosen independently, since the product must remain constant at 17 volts. Yet the design is such that the 17-volt swing can be divided into anywhere from 10 to over 100 equal levels, while the step size (as well as the total voltage output swing) can then be adjusted by a voltage divider to the desired levels. Separate circuit adjustments are provided to control: (1) the step size across Cc, (2) the step length (and sweep repetition frequency), and (3) the. symmetry of the voltage swing about the reference at zero. The step size is controlled principally by the value of C4. Although R8, R9, and the quantity C6/C5 (Ce/Cc) also exert varying degrees of control, they are subject to other considerations that restrict their range of values. Variation of C4 from 0.01 to 0.1 pifd results in a range of step sizes from 0.313 to 1.07 volts, based on a 17-volt swing. This is adequate control for most intended applications. After the value of C4 has been selected to provide the desired step size, its temperature coefficient is determined empirically to compensate for variation in step size with temperature. Considerable flexibility in the choice of temperature coefficient can be achieved by making C4 two parallel capacitors or making R7 a temperature-sensitive resistor, or both, as needed. The step length, which for a fixed number of steps determines the stairstep repetition frequency, is controlled by adjusting the frequency of the multivibrator 92

driver. The range of repetition frequencies is limited at the high end (short step lengths) by the degree of asymmetry obtainable from the multivibrator; and at the low end (long step duration) by the maximum permissible step droop. The latter could be reduced, of course, by the use of a larger capacitor for Cc, since at the lower sweep frequencies more time could be alloted to the reset operation (discharging of Cc through the Unijunction) while maintaining the same ratio of sweep time to reset time. As described in Section III G, R2 provides multivibrator frequency control without altering the magnitude of the, trigger voltage or appreciably changing the degree of asymmetry. A frequency variation of from 40 to 178 cps results from a change in R2 of from 0.0 to 68 kilohms. The asymmetry changes by less than 12% over this range. If required, the frequency range could be extended in either direction, while still maintaining control with R2, by appropriate adjustment of R3 and R4. In addition to the voltage reference at zero, a negative reference may be easily added to the waveform as a calibration check. A zener diode placed from the emitter of Q6 to ground will clamp the output at the zener voltage whenever the driving voltage is more negative. To prevent clamping of the positive portion of the swing at the 0.4 volt forward breakdown of the zener, a junction diode is inserted in series, as shown in Fig. 5o. 93

v cc 6 Q in Fig. 58. Negative Voltage Reference Circuit. Once the above adjustments for step size, number, and length have been made, the precise biasing voltage, Vn, that centers the sweep on zero volts can be determined. This is most readily done by inserting a variable d-c voltage source in place of diodes D3 and D4. The diodes are then selected such that their sum exhibits the required drop with nominally zero temperature coefficient, by means of Fig. 46 and experimental verification. Finally, the values of R14 and R15, the output voltage divider, are selected so that the output voltage swing has the correct amplitude (nominally -3.0 to +3.0 volts) and so that the total series resistance is approximately 5 kilohms. The components are placed on the printed circuit board in slightly elevated positions to prevent lead stress with board flexure. Transistors are elevatedabout 1/8 inch to provide space to accommodate a heat sink 94

during the soldering operation. The components are then encased in insulating foam* to dampen mechanical shock and vibration and to offer thermal resistance to the flow of heat from external sources. Figures 59 and 60 are photographs displaying the wiring connections and component arrangement on the printed circuit board, respectively. Fig. 59. Wiring Connections on Printed Circuit Board. Reino.lllRAElcrncPatcI., BokyNY *Resin no. 1111, RAD Electronic Plastics, Inc., Brcoklyn, N.Y.

Fig. 60. Component Arrangement on Printed Circuit Board. 96

APPENDIX I STORAGE COUNTER STAIRSTIEP WAVEFORM GENERATOR1 The square-wave voltage source of Fig. 10 can be conveniently represented by the battery and switch arrangement of Fig. I-1, where rb represents the multivibrator high-level output impedance. 1 S rb C 2 C1 D2 + D Fig. I-1. Diode Counter Circuit. When switch S is in position ~, C1 charges through the forward resistance of diode D1 and the internal resistance of the battery source with time constant T1 = C1 (rb + rD). If this is short compared with the length of time S is in position 1, the steady-state condition of FC = E will be attained. When S is switched to position 2, charge flows from C1 to C2 through D2 with time constant T2 1 2 rD until V = VC2 if the time the switch C} + C2 rD C1 C is in position 2 is much greater than T2. Assuming steady-state conditions are achieved (an absolutely necessary condition for voltage reference applications of this circuit), the relationships between successive pulses to C2 can be determined from the principle of 97

of conservations of charge: q(tl) a 2 (I-1) Thus: V1 (tl) C1 + V2 (tl) C2 = V1 (t2) C1 + V2 (t2) C2 (I-2) But at time t2, when S is in position 2: V1 (t2) = V2 (t2) = Vo (t), so that: V (tl) C1 + V2 (t1) C2 (C1 + C2) Vo (t2) (-3) After n pulses, the output voltage on C2 will be en, so that from Eq. (3): C + en C2 = (C1 + C2) en + 1 (I4) Thus the step increment Aen can be written: C1 Aen = en + 1 - e= (E - en) C. + (I-5) 1 2 Since Aen is a function of n, the step increments will not be uniform. This feature must be eliminated before the circuit could be considered for voltage reference purposes. The circuit of Fig. I-2 is an attempt to accomplish this by means of the feedback path that alters the charging voltage to C1 according to the level of C2. 98

V (t) rb C D S D1 2 2 e The transfer function of the emitter follower feedback amplifier insures that the error voltage er is of the same sign and nominally the same magnitude as the output voltage en. Proceeding as before, application of Eq. (3) yields: (E e)C + er) C1 + enC2 = (C1 + 2-6) and C C e =(E + e ) 1 + e 1 (1-7) n + 1 =(+r n C0 +C C + C ' 1 2 1 2 so that Ae = e - e n n + 1 n C = (E + e - e ) 1 (1-8) r n 1 2+ 99

For unity gain in the emitter follower stage, er equals en, making the step increments independent of n for perfect uniformity. However, it is apparent from Fig. I-2, that the emitter resistance, Re, across which the error signal er is developed, is in series with the path by which C1 recharges and hence T1 is increased. Moreover, since the loading on C2 is to be kept to a minimum (certainly no less than 5 megohms) to prevent droop, Re must be large. The simultaneous requirements of high input impedance with unity voltage gain can be met by a multi-stage emitter-follower amplifier as discussed in Section III D,* In spite of the low output impedance attained thereby, the fact that the charging current to C1 flows through the emitter resistance causes a. transient spike to appear in the emitter'voltage. When switch S begins the recharging phase of the cycle, the emitter load impedance is abruptly changed. The magnitude of the resulting transient could be suppressed, of course, by the addition of a capacitor from the emitter to ground, but this would increase the recovery time as well. As a consequence, it is not possible to obtain the output signal from the same resistance used to develop the error signal. Separate multi-stage emitter-follower amplifiers are thus required, and the loading on C2 is automatically doubled.. If this concession is made, the time constants of the charge transfer processes, and the degree to which steady-state conditions are achieved in each phase of the cycle can be calculated. Since Ecc must exceed the expected *High input impedance could be achieved, of course, by use of a vacuum-tube stage operating as a cathode follower, even with relatively low values of load resistanceo 100

output swing of 17 volts, it is convenient to make it the low impedance supply voltage of 28 volts. Assuming unity gain feedback, Eq. (8) becomes: C = 28 1 (I-9) C + C 1 2 C2 has been determined from leakage considerations and Unijunction peak discharge current limitations to be 5.6 Lfd. For half-volt steps, Eq. (9) shows C1 to be approximately 0.1 kfd. T2 is thus about 10 ~s, while T1 is approximately 1.5 ms. These values were calculated assuming a minimum value of diode forward resistance. This is valid for the instant after switching when the driving voltage is a maximum. But as the driving voltage decays, the nonlinear characteristic of the diodes describes how the series resistance increases, so that the charge transfer is never really completed in four or five times the value of the above time constants. The equilibrium process implicit in the short value of T2 could be utilized to replenish the charge lost as a result of the excessive loading on C2, were it not for the asymmetry demanded by T1. Since 7.5 ms of the 8.0-ms step length is the minimum time required for the recharging of C1, C2 would be disconnected from the charging source for over 90%0 of the cycle. Some improvement could be realized by reducing the series resistances contributing to T1, but this results in increased steady-state power drain on the voltage supply. Increasing the step length would improve the charge-transfer situation, but the excessive droop would contribute increased output error. Thus the charge transfer mechanism of this circuit is either too slow or too power consuming to be suitable for use as a miniaturized reference source. 101

APPE-NDIX II TRAINSISTOE PARAMETERS Q. Type* VCBO ICO (pia) hFE re rb r0 (Mc ) typ max min typ max min typ max 2N1036 PNP 50.005 1.0 54 6o 88.89 1.02 2N338 NPN 45.002 1.0 45 80 150 33 2K 1 10 2N793 NPN 45.002 2.0 78 - 550 49 740.83 2 * All silicon transistors. 0 2N492 Unijunction V 6o volts max. 1.2 volts min. BB.56 min = 2.2 volts typ. I = 2 amp peak =.62 typ..o8 max. 5.9 volts max..03 p-a typ. IEO 12 p-a max. 6.2 K min - 4 p-a typ. E 7.5 K typ. 12 p-a max. 9.1Kmax.BE 12 ~~~a max. 9ol~9. K max.

APPENDIX III EXPERIMENTAL DETERMINATION OF THE TEMPERATURE COEFFICIENTS OF LARGE ELECTROLYTIC CAPACITORS Matching of the temperature coefficients of Cc and Ce (C5 and C6 in Fig. 49) is an experimental procedure calling for accurate measurements. The capacitors in question have large nominal capacitance values, low working voltages, and small temperature coefficients (capacitance variation is typically + 2% over the range of interest), which all compound the measurement problem. As a result, the shortcomings of the available methods of capacitance measurement are briefly described and a simple, accurate alternative is proposed. While the capacitance range from 0.5 to 10 pAfd is of principal interest, the technique is applicable and often more accurate in other ranges where the more common techniques can also be employed. The so-called common techniques include direct capacitance-meter measurements and indirect resonance and bridge measurements. The direct-reading capacity meter, a Heathkit CM-1, has a maximum capacity limitation of 0.1 Afd. The sensitivity at this range is such that deviations of 1% can be detected, although not measured accurately, thus precluding the possibility of using series combinations of capacitors to extend the range. Resonance techniques suffer from an analogous accuracy limitation in that frequency changes of the order of 1% can only be detected - not measured accurately. The bridge technique available employs a General Radio Type 740 Capacitance Test Bridge. Although somewhat more accurate than the previous techniques and useful to 100 kfd, it has the incredible property of applying 90 volts a-c 103

across the unknown capacitor. If the unknown is an electrolytic, as most capacitors of manageable size in this range are, then a d-c bias voltage of at least 45 volts must be applied in series with the a-c signal voltage. Hence, peak voltages across the capacitor will always exceedl 130 volts. This precludes measurement of capacitors with lower breakdown ratings, which includes those of manageable size. To provide a more satisfactory method, it was felt that means should be investigated of measuring the time in which the unknown capacitor charged through a known impedance to a voltage less than its rated breakdown TIhe necessary switching involved could be adequately handled by circuits of the multivibrator class. The conventional two-stage astable (free running) multivibrator, however, uses two timing capacitors so that the inherent accuracy is limited to the degree which the asymmetry can be measured (presumably) on an oscilloscope. IThe multivibrator configuration employing a single active stage (Unijunction transistor), on the other hand, derives its timing sequence from the charging and discharging of a single capacitor. This circuit is shown as Fig. III-1 where Q1 is the Unijunction Transistor and C is the capacitor to be measured. The operation of the Unijunction is adequately described elsewhere. 2 has been added simply for the convenience of having a large output voltage swing. The baseemitter terminals could very well have been replaced with a diode and the square-wave output taken from the base-two terminal of Q1' When voltages are applied, base current flows through R3, saturating Q2. C then charges through R2 toward voltage E2 as given by: Vc = Vab = E2 (1 - e t/R2C) (III-1)

R4 R2 R b Fig. III-1. Capacitor Test Circuit. If the exponential is replaced by its Taylor series expansion, then Eq. (1) becomes: V=2 R E2c (t)] (III-2) If R2C is made much larger than t, then Eq. (2) can be approximated as: V, =E2 R (111-3) Vc = E2 R2C The charging sequence is terminated when Vc reaches the firing voltage of the Unijunction (called the peak voltage and designated Vp). Thus, Eq. (3) can be solved for the charging time tc: c _ R2c (111-4)

Similarly on the discharge cycle, the current path is through R3 and Vc can be written: v ba _ (E + (2 +Vp) (III-5) This discharge sequence is terminated when Vc given by Eq. (5) reaches the cutoff voltage of the IUnijunction (called the valley voltage and designated Vv)*. Thus Eq. (5) yields the discharge time: V D - E2 + V R3C (III-6) Equations (1) through (4) can be modified for the residual voltage, Vp, remaining on C after the discharge cycle. Thus Eq. (4) becomes: tC R2C (III-7) E 2 - Vv The frequency of the output square-wave thus becomes: 1 1 f = + tc tD 1 vp C (III-8) Therefore, the output frequency is inversely proportional to the capacitance C, 106

within the accuracy of the approximation made in Eq. (3). The degree of approximation can be seen from Eqs. (6) and (7) to be: to Vv R3C E2+Vp (111-6).t V C p and d_R C (III-7) R2CE2 Vv Thus Vv, Vp, and E2 are to be selected so as to minimize the terms of Eqs. (6) and (7). Since Vv and Vp are fractions of E1, this is equivalent to a selection of E1 and E2. Obviously E1 is to be made as small as practical and conversely for E2. For Vp = 4.5(E1 = 7.5) and E2 = 300 tc was measured at 12.5 ms so that. t:- 12.5 ms -3 R2C (1.8) (5.6) for an error of 0.12* by neglecting all terms of Eq. (2) after the first. Table III-1 lists the component values used in an experimental determination of the temperature coefficients of several Texas Instruments', SCM series, tantalum electrolytic capacitors. The capacitors were placed in an environmental oven and connected to the measuring circuit by a one-foot length of shielded cable. Figure III-2 shows the experimental results, which verify both the above theory as well as the manufacturer's data for the capacitors. The results are relative to the room temperature (250C) capacitance value. Absolute measurements are possible, but of course require calibration of the circuit with a known standard. A Hewlett-Packard Electronic Counter, Model 23B, was used for the frequency 107

measurements. This instrument displays frequencies less than 100 cps to three significant digits with an accuracy of + 1 count. Period measurements can also be made to improve accuracy. The manufacturer claims that the possible error using automatically averaged period measurements does not exceed 0.o006% at these frequencies. TABLE III-1 CAPACITOR TEST-CIRCUIT COMPONENT VALUES R Q V (0) (vdc) 1 330 2N492 7.5 2 1.8 M 2N338 300 3 1.8 M 4 10 K 108

C = C = 1.0 ifd. e 6 C = C 5 6 pfd. 1 0 ( % are I I I.. I II-60 -40 -20 0 20 40 60 80 100 120 Temperature ( C) Fig. II-2- Temperature Characteristic o1 Texas Instruments' SCM Series Tantalum Electrolytic Capacitors. -10

REFERENCES 1. Millman, J., and H. Taub, Pulse and Digital Circuits, New York, McGrawHill Book Company, Inc., 1956, pp. 346-353. 2. Ebers, J. J., and J. L. Moll, "Large-Signal Behavior of Junction Transistors,"' Proc. IRE, 42, 1761-1772 (1954). 3. Millman, J., and H. Taub, op. cit., Chapters 5, 6, and 18. 4. Transistor Manual, Fifth Edition, General Electric Company, Semiconductor Products Department, Liverpool, New York. 5. Sylvan, T. P., Notes on the Application of the Silicon Unijunction Transistor, General Electric Company, Semiconductor Products Department, Liverpool, New York, 1961.* 6. Carignan, G. R., and L. H. Brace, The Dumbbell Electrostatic Ionosphere Probe: Engineering Aspects, Univ. of Mich. ORA Report 3599-S-5, Ann Arbor, 1961. *The author gratefully acknowledges the kind permission of the General Electric Company, Semiconductor Products Department, to reproduce curves and data from the above publication. 110

UNIVERSITY OF MICHIGAN 39II 11111111111111111111511 02539 1 16 3 9015 02539 7160