ENGINEERING RESEARCH INSTITUTE THE UNIVERSITY OF MICHIGAN ANNI ARBOR Progress Report No. 3 COMPUTER COMPONENTS DEVELOPMENT R. A. Car-S..lsen.; D. - C. Ray Harvey L,. Garner Project Supervisor Project 2452 NATIONAL SECURITY AGENCY SIGNAL CORPS PROCUREMENT OFFICE CONTRACT NO. DA-49-170-sc-1791 WASHINGTON, D, C. March 1957

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The University of Michigan ~ Engineering Research Institute TABLE OF CONTENTS Page LIST OF ILLUSTRATIONS v TABLE OF SYMBOLS vii ABSTRACT viii OBJECTIVE viii 1.o INTRODUCTION. Diode Gating Structure 1 1.1 DESIGN PHILOSOPHY 1 1.2 OPERATION OF GATING STRUCTURE 1 1.3 GATE REQUIREMENTS FOR IDEAL DIODES 2 2. APPLICATION OF NONIDEAL DIODES TO GATING CIRCUITS 4 2.1 THEORY OF SEMICONDUCTORS 4 2.1.1 Basic semiconductor properties 5 2.1.2 Mechanism of current flow 5 2.1.3 The solution of the diffusion equation for reverse current as a function of time 9 291.4 Barrier capacitance 12 2.2 DIODE CHARACTERISTICS 15 2.2,1 Back transients 15 2,2.2 Forward transients 21 2.2.3 Static forward characteristics 23 2,3 DIODE SPECIFICATION 25 2. 31 Diode requirements 25 2.3,2 Experimental testing, unclocked 27 2.3.3 Experimental testing, clocked 29 2.3.4 Experimentally observed correlation between static characteristics and back-transient properties 32 3, GATE STRUCTURE PERFORMANCE 32 3,1 SPECIFICATION OF LEVTS AND CURRENTS 33 3.2 GATE PERFORMANCE 36 353 EFFECT OF GRID CURRENT ON GRID WAVE-SHAPE 38 304 UPPER LIMIT OF PERFORMANCE 39 iii

The University of Michigan * Engineering Research Institute TABLE OF CONTENTS (Concl.) Page 4. SUMMARY 41 APPENDICES 77 A, OTHER LOGIC CIRCUIT CONFIGURATIONS 78 B. "OR-AND-OR" CIRCUIT ANALYSIS 81 C, SERIES RESISTANCE SEEN BY THE PULSED "AND" DIODE 85 D. IMPEDANCE OF THE GRID-CLAMP DIODE 87 BIBLIOGRAPHY 90 iv

The University of Michigan ~ Engineering Research Institute LIST OF ILLUSTRATIONS Figure Page 2.1-1 Mechanism of diode conduction. 42 2.1-2 Theoretical junction diode. 43 2,2-1 Effect of back bias on back recovery. 44 2.2-2 Effect of circuit series resistance R' on back recovery. 45 202-3 Back recovery at a 10 Me repetition rate. 46 2.2-4 Noise as a function of the number of gates pulsed. 47 22.2-5 Static characteristics of representative diodes. 48 2~2-6 Deviation of static characteristics. 49 2.2-7 Static characteristics of additional diodes tested. 50 2.2-8 Back transient test circuit at 25 Kco 51 2. 2-9 Current at t =.05 jLsec vs forward current, Eb = -1.5 v. 52 2,2-10 Current at t =.05 pUsec vs forward current, Eb = -3.0 v. 53 2o2-11 Time at Ib =.5 mil vs forward current, Eb =-1.5 v. 54 2.2-12 Time at Ib = ~ amil vs forward current, Eb = -3.0 v. 55 2.2-13 a/b ratio vs forward current, Eb = -1.5 v. 56 2.2-14 a/b ratio vs forward current, Eb = -3.0 vo 57 2.2-15 Initial back current vs forward current, Eb = -1-1/5 v, 58 2.2-16 Initial back current vs forward current, Eb = -3.0 v. 59 2,2-17 Forward transients. 60 2.2-18 Determination of the best clip diode (G). 61

The University of Michigan * Engineering Research Institute LIST OF ILLUSTRATIONS (Concl.) Figure Page 2.2-19 Effect of static characteristics on wave shape. 62 2.3-1 Experimental determination of the best grid-clamp diode. 63 2.3-2 Experimental correlation between.static characteristics and lost charge. 64 253-3 Noise variation with frequency. 65 3.2-la 10 Mc experimental package. 66 3.2- lb 5 Me experimental package. 67 3.2-2a 10 Mc gate performance. 68-69 352-2b 5 Me gate performance. 70-71 3041 Upper limit of performance. 72 Table Page 2.2=I BACK RECOVERY AS A FUNCTION OF FORWARD CURRENT 75-74 2.3-II EXPERIMENTAL DETERMINATION OF THE BEST "AND" DIODE 75 3.2-I SECONDARY FACTORS AFFECTING NOISE 76 vi

The University of Michigan ~ Engineering Research Institute TABLE OF SYMBOLS Eo At = T/10 -- At T 2 Ideal Information Pulse I Gate current I' Input gate current I* Minimum input clamp current - If Forward diode current IBO Initial reverse diode current after switching IB Reverse diode current I3 Grid pull-down current id Instantaneous diode current (general) ic Diode C instantaneous current ib Diode B instantaneous current Vd Voltage drop across diode (general) VA,VB,VCP... Voltage drop across particular diodes A, B, C,... E1,2;..n Supply voltages Eo Amplitude of input (or output) pulse Eb Back bias voltage Eg Grid voltage swing En Amplitude of noise clipping Ac Amplitude of clock voltage Co Capacitance of an "and" gate input C1 Capacitance at the "and" gate output Cg Effective capacitance at the grid T Basic clock period At Rise and fall time of an idealized information pulse prf Pulse repetition rate E Dynamic noise voltage a/b. Ratio of initial back current to steady-state forward current vii

The University of Michigan ~ Engineering Research Institute ABSTRACT The speed of operation of a diode gating structure is limited by 1) the amount of noise which can be tolerated in the circuit and 2) the magnitude of current required per gate input. Both of these limiting factors are dependent on the reverse transient properties of the semiconductor diodes used in the gate structure. As frequency of operation is increased, the reverse transient is accentuated by the required increase in gate currents. This report is a study of the effect of various diode parameters on overall gate performance0 OBJECTIVE The purpose of this contract was to investigate experimentally and theoretically the possibliity of increasing the speed of operation of the dynamic circuitry of SEAC-type computer components~ This particular report deals with the design limitations of the diode gating structure. viii

The University of Michigan ~ Engineering Research Institute 1. INTRODUCTION Diode Gating Structure 1.1 DESIGN PHILOSOPHY The purpose of this contract is to investigate experimentally and theoretically the possibility of increasing the speed of operation of the dynamic circuitry of SEAC-:type computer components by at least an order of magnitude. The investigation has proceeded along three lines: investigation of the pulse amplifier, pulse transformers, and diode gating structures. The basic philosophy followed in the design of circuitry for high-speed operation has been the reduction of voltage swing. That is, as frequency of operation is increased the available voltage swing is reduced while the over-all current remains constant. As a consequence of this approach, high gm tubes are required for low-current gates at high frequency. Other reports in this series deal with the pulse amplifier and design aspects of the problem. This particular report deals with design and limitations of the diode gating structure. 1.2 OPERATION OF GATING STRUCTURE The circuit of a typical gate structure is shown in Fig. 3.2-lao This circuit consists of two parts-an "and" gate followed by an "or" gate. The typical "'and" structure shown below has the C diodes arranged in such a manner that the output voltage is equal to the lowest voltage applied to the diodes. Let us assume, therefore, that we have two voltage levels, O and 1. The 1 level shall be the highest level. If all the inputs of the "and" structure are high, then the output is high or in the one state. However, if any one of the inputs to the "and" structure is low or in the zero state, the output of the "and" structure is also in the zero state. This can be verified by studying the circuit given. The "and" gate output is clamped to the zero level by the B clamp diode and pull-down resistor R1. Therefore, in the absence of any signal the gate is automatically clamped to the zero level. A typical "or" gate is shown below. The "or" gate implements the logical function Y + Z which is the disjunction of Y - Z. The gate must provid

The University of Michigan * Engineering Research Institute an output if either of the inputs are high. This can be verified by an examination of the circuit. If either of the preceding "and" gates provides a 1 output, it can be seen that the output of the "or" gate is 1. On the other hand, if neither of the "and" inputs provides a high output:the "or" output will be zero. 39.5 v B R2 R2 -KI.5~~v D C ~o5 v | JF | O'Oft 0O, -Z cn - I -41.5 v R1 -41.5 v Typical "and" gate W X Typical "or" gate Y + Z 1.3 GATE REQUTEMENTS FOR IDEAL DIODES Some general remarks can be made regarding the gate configuration'below where perfect diodes are assumedo''R21 1 )-41.o5 v C D' as R1 -. v7Cg

The University of Michigan * Engineering Research Institute First, if the gate voltage swing is small compared to the supply voltages, the charging and discharging of the capacitance associated with the gate occurs at approximately constant current. If the grid capacitance Cg is required to discharge in time At through the grid pull-down resistance R3, the grid pull-down current I3 is then~ I3 = Eg Cg (1) At The gate current I required to swing the grid Eg volts in At seconds is given byo = (Eg+ )C + 13 + I(2) At At where I = 2I3 if C1 is neglected, At = T/10, T = the clock period, and En = amplitude of the noise clipping at the "or" gate input. Example: Let T = 100 mWsec (10 Me operation) Eg = 1 volt En = 1 volt Cg = 30 I4Lf C1 = 5 liltf I3 = 3 ma I = 7 ma Second, the input gate current must satisfy two requirements, namely, I' must be greater than I and must satisfy Equation (3). Equation (3) is the requirement placed on the input gate current by the discharge time of the circuit input capacitance. The input capacitance of each gate must discharge through the input pullhdown resistance~ > E0 CO = ('3)'At where Eo = amplitude of the signal applied to the gate input. A condition defined as "and" diode-limiting must be avoided. Note that the grid can rise no further positive during a pulse than the maximum potential of point (5) which is in turn determined by the amplitude of the input pulse at point (2). This action may be used to advantage to obtain grid clipping if the input pulse has a flat top. However, if noise is present in the input pulse, it will then also appear on the grid pulse. The grid-pulse rise time is also influenced by another factor~ The grid pulse can rise no faster than the slowest rising input, but in a clocked computer the information inputs are up before the clock pulse arrives, This 57

The University of Michigan ~ Engineering Research Institute stresses the necessity of having a well-shaped clock pulse with a rise and fall time less than or equal to the rise time desired for the grid pulses If the above requirements are met, that is, if (1) the input signal is more positive than the grid clip level, and (2) the slowest input rises faster thanl W",.e desired grid rise, then in the ideal diode case, the grid wave-shape is independent of the input wave shape and is a function of gate current I and any wave shaping that may be done on the grid, These requirements are fundamental to gating operation, and although they were considered for the ideal diode case, they apply equally well to the nonideal diode case with only slight modification. 2. APPLICATION OF NONIDEAL DIODES TO GATING CIRCUITS Unfortunately, the diodes in a gating structure are far from ideal; therefore, the emphasis has been placed on the effect of diode transients on the circuit of Figo 3-21,o* It is the diode transient characteristics, particularly the reverse transienrts, which ultimately limit high-speed gating performance0 For example, the reverse transient cuLrrent of the pulsed "and" diode is primarily responsible for noise at the "and" gate output, If the frequency of operation would be increased by a factor of two with Eg held constant, the gate current I and the initial forward current of each of the pulsed "and" diodes would be increased by approximately a factor of two, Increased forward current would accentuate noise, thus demanding increasednoise clipping, and ultimately a large gate current is required to charge capacitance C1 the additional AEn voltage. Therefore, emphasis has been placed on diode transients and their result.ing effect on the operation of a high-speed logical circuit. The following sections discuss Theory of Semiconductor Properties (2.1), Diode Transients (2.2), and Diode Specification (2,3) for the logical gating circuit. 201 TEEORY OF SEMICONDUCTORS The purpose of this section is to outline some of the basic principles necessary to an understanding of semiconductor diodes. A short section on basic semiconductor properties is included mainly to introduce semiconductor terminology. This is followed by a short discussion of the mechanism of current flow and those equations leading up to a solution for the reverse current as a function of time. hAd scussion of various logical confbigurations is included in Appendix A. The circuits of Figs 352-I were found to be superior to the others considered. _ )l~

The University of Michigan ~ Engineering Research Institute 2o1.1 Basic semiconductor propertiesl —Electrical conductivity is a measure of the number of charge carriers per unit volume which are available to move under the influence of an electric field0 Semiconductors, as the name implies, are materials with a conductivity between that of metals and insulatorso Two materials, silicon and germanium, are of the semiconductor type and in the pure form (intrinsic) have resistivities of 60 a/cm and 60 Ka/cm, respectively. These intrinsic materials are of little practical use until additional impurity (donor and acceptor) atoms have been added to the initially pure crystalline structure. The addition of a donor atom introduces (or donates) an extra electron or carrier into the crystal structure. The presence of some relatively few impurities of this type greatly increases the conductivity over that of the initially pure germanium. In the same manner, if an atom with 3 valence electrons (acceptor impurity) is introduced into the crystalline structure, the added impurity has an affinity for the neighboring valence electrons of the intrinsic germanium. The capture of the needed valence electron then generates an absence of an electron (or hole)o The hole is propagated in:a random fashion throughout the crystal until such a time as the hole reconmbines with a free electron. If two blocks of germanium with donor-type impurity (type N) and acceptor impurity (type P) are fused and a potential is applied to the fused block, a current flows. In the N-type material the current is composed of moving electrons which are called majority carriers and moving holes which are called minority carriers. In the P-type material the electrons are the minority carriers and the holes are the majority carriers, At any particular cross section in the block the total current is the sum of the majority and minority carriers. 1,2,10 2.1.2 Mechanism of current flow.-Carrier movement in semiconductors is the result of the superposition of two effects, drift and diffusionl Drift is the motion resulting from the force associated with an applied electric field. Diffusion, on the other hand, is the result of thermal agitation and is therefore random in nature. A diffusion current will flow by virtue of a density gradient. The equation relating the gradients to the current density J is given by: Jp = q Dp P, (1) where q = charge of an electron, Dp = diffusion constant for hole, VP =- gradient of hole density P, and Jp = current density due to the diffusion of holes (J = Ip/A). For a one-dimensional case and with the origin as shown below the above equation reduces to:

The University of Michigan ~ Engineering Research Institute Carrier density P x -b Jp q Dp dP (2) The theoret.cal analysis in the literature58 begins by assuming that the voltage drop across the end region is zero. This allows a relatively sImple analytilcal approach in. that the diffusion equation is solved for P under the boundary conditions of interest, The diffusion current is then obtained by substitution of aP/Ax in Equation (2), The justification for the above simplification is based upon the fact that the voltage drop across the diode is anlmost entirely equal to the voltage drop across the junction. If the concentration of P impurities is much greater than the concentration of N, the total current can be assumed to be equal to the hole current (.p)o In. Fig. 2,12l1l an idealized junction diode has been taken to illustrate the function of' the barrier height in diode operation. Although t:he poilt-onrtact diode, basically a PN junction diode with a small region of -P rider th.le whi.sker4,:is of major interest, the analogous junction diode allows a more manageable sofilution due to its simple geometry. FIgxrAe wlB0 5 is a schLematic representat3ion of a diode under conditlcn of equ,.lbi Dri0mo The effect of forward and reverse bias is also illustrated., Note the effect of the external.. field on the barrier height, coltzmann's equation relates the relative concentration of carriers adjacent to the barrier reg.on to the potential gradient, If Ppo is the con= centrat:ion of holes adjacent to the barrier in. the P region and Pno is the concentration in the N region -under equili3brium conditions, then Pno is related to Pp.o by~ Pno o = e kT,(3) po where q = charge of an electron, k = Boltzmann's factor, and T = absolute temperatlure, ~Kv

The University of Michigan ~ Engineering Research Institute An understanding of the derivationl of the above equation is basic to the understanding of the mechanism of current flow at the junction. Consider a one-dimensional velocity distribution of the holes in the P region as a result of thermal agitation. Relative density -v vo + v Since the distribution is Gaussian, it is easy to show that the probability of a carrier acquiring sufficient velocity vo to jumnp the potential barrier is given by: 00 P Ppo f P(v)dv = n (4) 2 The significance of the right-hand factor is that of those holes which have crossed into the N region any that have a velocity component in the direction of the barrier are free to roll back down the potential hill. There. fore, since at equilibriumn* the current from region P to N is equal to the flow from N to P, the number of holes with velocities greater than vo is exactly equal to one-half the total number of holes in the N region. P(v): 1 exp 2k) (5) V2A KT/m The kinetic energy of an electron (hole) is related to the potential by: mv2 p (6) m2= qAV. (6) Then: 2 v m _ Sv P(V) = - e kT (8) 2kT *No bias applied. _ ~~~~~~~~~~~7

The University of Michigan ~ Engineering Research Institute The correctness of this normalization can be checked by integrating +CO P(v)dv -00 Then 00 (p Ppo qfein P2 S kTe dAV = no9) 2 kT 2 v P e kT = no Po eno no e kT (3) P po If Pp and Pn are the respective hole concentrations in the P and n region when the diode is biased by an external voltage source E 6=Vd ax Equation (3) can be modified to relate the equilibrium concentration density Pno to the concentration Pn when the diode is externally biased. Equation (3) for the forward bias condition may be written: Pn = Ppo e kT (AV - Vd); qAd gB Pn = Ppo e kT e (lo0) Substituting Equation (2) in Equation (10), gVd Pn = Pno e u o (11) The hole current under steady-state conditions is proportional to the increase in minority carrier density in the N region: p UC[Pn Pn ] Ip = Pno Ce k _ (12) Under back-bias conditions Vd is negative and the hole current is just equal to the intrinsic back current Io.

The University of Michigan ~ Engineering Research Institute Ip = Pno C = -Io; {qyd Ip = Io ) -1 (13) Equation (13) may be recognized as the steady-state diode equation. Although the result above applies to steady-state conditions, Equation (11) does not have this restriction. It is this relationship that forms the basis for the Ebers-Moll equations which have contributed greatly to the theoretical analysis of the junction transistor.ll 2.1.3 The solution of the diffusion equation for reverse current as a function of time.-The presence of diode transients has been known for many years. Many individuals and organizations have contributed to both the theoretical and experimental understanding of these nonperfect switches. The forward transient may be considered to be the inability of a diode to establish the steady-state gradient in the N region instantaneously. In the same way, the reverse transient is the result of the delay in removing the stored carriers in the n region after the external field has been reversed.5 If some simplifying assumptions are made regarding the diode, it is possible to obtain a solution for the reverse current as a function of time. lo Current flow in the end regions is entirely by diffusion. 2. The cross-section dimensions are much greater than the diode width. 30 If the concentration of P > N, then it can be assumed that current flow at the Junction is entirely by holes. At the junction, current flow is by hole diffusion only and therefore Equation (2) of Section 2.1.2 becomes IB = -qDP ax|x (1) x =0 where IB = the reverse current resulting from hole storage in the P regiono Thus, to solve for the reverse current it is then necessary to solve the continuous-flow or one-dimensional diffusion equation (18) for the proper set of boundary conditions associated with the reverse current transient: 6P Pno - _ P 22P 6A =,+ Dp 82x' (2) where P = hole density in N region, Pno = hole concentration in N region under conditions of no externally applied bias, and Tp = life-time of holes in N region.

The University of Michigan * Engineering Research Institute The reverse transient is composed of times T1 and T2. (See Fig. 2.1-2.) After a semiconductor -diode has been passing current in the forward direction for a period of time sufficient to allow the hole density P to reach its steady-state value, the concentration gradient is as shown. When the bias is reversed, the concentration gradient assumes successive conditions at times t 1i t2, t3, and t4. During T1 the hole diffusion out of the N region is limited by the resistance of the external circuit. Thus T1 is a function of the external circuit resistance and the previous forward current.* Reverse-recovery time measurements have shown that for point-contact and small junction diodes T1 << T2. One possible reason for this would be the relatively small volume of P and N material used in the construction of the above type of diode as compared to the larger volumes used in such junction diodes as the G. E. 1N91, where T1 does become an important factor. Since T1 << T2 here, we can limit our interest to the time T2, We are interested in solving the diffusion equation for the following boundary conditions (see Fig. 2.1-2): P = 0, x = 0, and P = 0, x = Lo at t = O to obtain P = f(xt) t > 0. The procedure is to solve Equation (2) for the boundary conditions given and thus evaluate two of the three resulting constants. However, to satisfy the third constant it is necessary to require Equation (3) to equal Equation (4 ) at t = 0~ P = f(x,t) for t ~O (3) P = f(x,t) for t < o (4) Equations (3) and (4) both result from the solution of Equation (2), but Equation (4) is the steady-state solution for hole density before switching bias conditions. The mathematical steps have been omitted, as routine methods of solving partial differential equations are used: in h Lo - x sin h P = Pn max Lsin h (Lo/L) (3) *Sometimes reference is made to holes being swept out of the N region. It is true that those holes adjacent to the junction are "'swept out," but the majority of the N region holes "die"' as a result of recombination if T1 is much less than T2. 10

The University of Michigan ~ Engineering Research Institute P a 2sin 1 + 0 n max - tL LoM Ir = - 2 q Pn max L [ D= x ex -r+. (6) where = L length of N regation, L = T T = absolute temperature in degrees, and in drawing conclusions, especially in regard to temperature effects4 The model taken is quite simple, and such considerations as surface recombination have been neglected. There are three conclusions that can be drawn: 1C Since hole mobility (alp) is less than electron mobility (le)' there would be a gain in recovery time if the current was primarily electron current rather than hole current as assumed here. 2. The hole mobility of silicon (~p) is less than the hole mobility, for germanium (ip). Therefore, diodes made from basic germanium may be superior to silicon diodes of identical construction. -11-

The University of Michigan ~ Engineering Research Institute 35 Small dimensions are very important as Lo appears as a squared term, There are a number of factors that affect reverse-recovery Current IB 1 IB is a function of the diode physics by Equation (5). 2. IB is a function of steady-state forward current (If). Notice in Equation (5) that the term Pn max appears. By Boltzmann's equation governing diffusion across the junction, nmax = Po e kT (11) (Section 2.1.2) Pn max no Vd is the external forward bias, and is a function of forward current (If) 3, IB is a function of pulse rate (prf). If the pulse rate is such that the forward-current steady-state condition is not reached, then the reverse-recovery time is certainly less. 4. Reverse-recovery time has been assumed equal to T2, but if T1 is not negligible, circuit resistance then becomes much more important. 5 The back bias Eta also affects back-recovery time, but to a much lesser extent than would be expected. Considering all -the above, I = f(If, prf, Eb Re) (7) The factors affecting diode back-recovery are covered in detail in Section 2,2.21 2.l i4 Barrier capacitance. -.At the junction of the P- and NTtype regions there is a very than layer in which no mobile carriers exist, The width of thi.s regiorn is a function of the back bias. That is, as the external C.Las is increased. holes arid electrons withdraw respectively from the fixed ac,'Leptor and donor atoms. The resulting increase in barrier charge is responsible for the increase in barrier potential. A solution for the barrier capacitance of a step junction diode is of interest) L0 Assume that the concentration of Prtype impurity is much greater than that of the p-type impurity, The width of the depletion layer in the P region is negligible coxmpared to the width in the N region as P >> N. If p is equal to charge density, then. p = qgNd, where q = charge of an electron, and

The University of Michigan ~ Engineering Research Institute p = charge density P type N type -- Junction X 0 X = =X1 Nd = density of donor impurities. Solving Poisson's equation for the region, V2V = P (1) V(x) -K (2) where qNd K =, and e = the dielectric constant of the depletion layer. Integrating Equation (2) once: dV dx =- Kx - Ki (3) which is equal to: E = K, (4) as + dV E 7 — V = - - dx Integrating (2) a second time we have: V = qNd x2 - Kx - K. (5)'C The boundary conditions are: E = V = O when x = O 13

The University of Michigan ~ Engineering Research Institute Therefore: K1 = K2 = 0, V =_ -- x2, (6) The junction capacitance Cj is equal to: C = (7) V1 where Q = Ac E = total charge, (8) 2 at X = X1 V1 = the potential at x = xl, and A = effective area of the junction, Substituting Equation (4) into Equation (8), Q _ A q Nd xl. (9) 2 Solving Equation (6) for xl in terms of V1, V X (10) Substituting Equation (10) into Equation (9), Q = A- eVlqN, (11) Substituting Equation (11) into Equation (7), cj A=. q (12) J 2 V1 The capacitance of the junction Cj requires a charging current Ij to flow into the diode when the depletion layer increases. Consider the "or" diodes on the grid of the lower tube of Fig. 352-1. The nonconducting "or"' diode would contribute to the total effective grid capacitance because as the grid rises in a positive direction the depletion layer becomes wider, requiring electrons to leave the N region. Test results have shown that the contribution of barrier capacitance 141

The University of Michigan * Engineering Research Institute c lamp "or" clip O t tort "orl tl -1.5 v of a point-contact diode to the total grid capacitance may be neglected if the grid noise clipping (back bias on the grid "or" d4ode) is equal to or greater than one volt, Since the barrier capacitance decreases with increased back bias, the contribution of barrier capacitance is even further reduced as the noise clipping is increased. The preceding material will serve as a guide or basis for the remainder of the report. The point-contact diode, because of its grometry and method of manufacture, does not readily lend itself to mathematical analysis, and thus work with point-contact diodes has tended to be experimental in nature The analogy between the two diode types is valid as the difference in transient behavior is only in magnitude and not in character. 202 DIODE CHARACTERISTICS In this section the factors which affect diode transients for low current are discussed, Back and forward transient measurements, static characteristics, and experimental results of testing are included. 2.2.1 Back transients. —The recovery time as specified by diode manufacturers in their literature is not applicable to the problem at hand. In general, the manufacturers have specified reverse-recovery time as the time required to reach a particular back resistance for steady-state currents of the order of 30 ma. This is approximately three times larger than the current required in the typical gate circuit considered by this project. It has not been found feasible to extrapolate-the recovery time at low currents from the data supplied by the manufacturer. Therefore, during the early phase of this project, a quantity of data was taken to supplement the manufacturers' datao The purpose of this work was first to compare diodes and second to gain insight into diode transient effects. A summary of these tests is included at the end A,~~~ ~15

The University of Michigan ~ Engineering Research Institute of this section. For the purpose of this report, however, the following transient tests have been based upon biases and currents encountered in the proposed logic circuit of Fig. 3.1-la. The gate circuit itself has been used as a test circuit whenever possible. Equation (7) of Section 2.1.3 indicates those factors affecting reverse recovery of point-contact diodes. IB = f(If, Eb, Rc, prf), (7) (Section 2.1.3) where If = steady-state forward current, Eb = back bias, Rc = circuit resistance in series with the diode, and prf = pulse repetition rate. (a) Effect of Forward Current (If) on Recovery Time. The reverse current in a point-contact diode is primarily a function of the forward current previous to switching. That is, the magnitude of the carrier gradient in the N region determines the amplitude and duration of the reverse current after switching. The importance of the effect of diode reverse-transient currents can be verified by the following experiment. The test consists of observing the current flow in a pulsed diode. A 100-ohm resistance is inserted in the diode circuit between the anode and ground. Normally, a current If is allowed to flow in the diode. The diode is then pulsed and the transient current is observed by the voltage which is developed across the 100-ohm resistor. The data and circuit are shown in Table 2.2-I. The included photographs are the voltage wave-shapes at point (2' ) and can be calibrated directly in ma. Before the positive biasing pulse was applied, the voltage drop across the 100-ohmswas negative. The shaded area is then the integral of the reverse current or, as defined here, the "lost" charge.. The amplitude of the input pulse was adjusted so that the back bias was equal to approximately -1.5 volts at the end of the 50 mprsec pulse. These reverse currents are of major concern in high-frequency switching as they represent losses not present in the ideal diode. For example, in the ideal diode the gate current I must supply charge to the capacitance C1 at the "and" pull-up resistor, the capacitance Cg at the tube grid, and current to the grid pull-down resistor. In the nonideal case the gate current must supply an additional amount of charge which is lost to the grid-clamp diode. The input gate current I' to a particular pulsed "and" gate input must also be increased by an amount e(I" = I' + c) to supply the reverse current taken by the pulsed input clamp diode. Obviously, the number of gate drives from a package output is directly dependent upon the current required per gate input. Therefore, it is particularly important that the lost charge be a minimum. 16 16

The University of Michigan ~ Engineering Research Institute Since the reverse current is dependent to a large extent on the previous forward current, the magnitude of the noise at the "and" gate output is intimately related to the gate current I. To increase the frequency of operation of a package by a factor of two (or to increase the grid swing by a factor of two), all currents are increased by a factor slightly larger than two. Therefore, noise resulting from the reverse current of the pulsed "and" diode* is a function of frequency of operation. The advantage, then, in the small grid signal approach to the over-all problem, as far as diode transients are concerned, is that the diode currents are comparatively small, thus minimizing the effect of diode back-current. The lost charge is of sufficient importance to use this measurement as a basis for the diode comparison. The following table is a ranking of the diodes tested, The lost charge has been taken as indicative of the transient properties. The remainder of this report will substantiate the superiority of the Hughes 2109, Therefore, other diodes have been rated as inferior to the 2109 if they have poorer forward conduction or a larger lost charge. The Hughes 2182 and Clevite 309 have been taken as representative of diodes with high forward conduction but inferior back-transient properties. DIODES TESTED Diode' Inferior to Hughes 2109 - Statically Transient Raytheon IN295 x Hughes IN191 x Hughes EED2108 x Transitron SSG x x Transitron IN251 x x Hughes 1N629 x x Hughes silicon junction x x Hughes ID2191 x Radio Receptor type W x PSI silicon diffusion computor diode x x Hughes IN117 x x Clevite CTP309 x Hughes IN118 x Raytheon IN306 x HEughes 2182 x - _,. -, A,,. i..... * -, *The mechanism by which the "and" contributes to the noise at the "and" gate is considered in detail in Section 2.2,3~ 17

The University of Michigan * Engineering Research Institute (b) Effect of Back Bias on Reverse Recovery. The simple model assumed for back-transient studies has no electric field in the end regions.* It can be seen that a reverse field would contribute to the removel of hole storage charge. That is, the initial reversecurrent spike is higher for increased back bias, If the duration of the switching pulse were much longer than the 50:rnsec pulse used here, the areas under the reverse-current curves would be constant and the only effect of increased back bias would be to increase the initial reverse current IBOa Ebl > Eb2 IB01 > IB02 IB01 IB02 t In Fig,2.2-l the initial back current and the current at 20 mw~sec after switching has been plotted for one of the Hughes 2182 diodes where the reverse current is significant and for the Hughes 2109 where it is not. Note that when the transient is significant, the initial back current increases as expected while the back current at 20 Wisec becomes constant for Eo > 6 volts. The implication for gate operation is that the back-biased diode becomes approximately a constant current device. That is, regardless of the back bias the reverse current is essentially constant. One definition frequently used for the recovery time of a diode is: that time required to obtain a specified back resistance for a given back-bias condition. This definition is somewhat ambiguous since the, back resistance is more a function of the back blias specified than an indication of the true transient behavior,. A measure of the time required for the diode to reach a back current of, say, 1 ma would perhaps be a more adequate definition of recovery time, The following tabulation for the Hughes 2182 illustrates this point. *The end regions of a junction diode are shown in Fig. 2Q1-lo 18

The University of Michigan * Engineering Research Institute Eb RB(t'),- TB(ti) 1/2 83 3 273 6 500 10 835 15 1250 RB(t2) and IB(t') are the resistance and back currents respectively at 20 *mlsec. (See Fig. 2.1-1. ) Gate design and performance is intimately connected with the transmission of charge and therefore the most appropriate criterion of diode performance is the measurement of the "lost charge" that was discussed in connection with Table 2.2-I. (c) Effect of Circuit Resistance in Series with a Back-Biased Diode Another factor which can alter diode transient performance is the amount of impedance in series with the diode. In the previous sections resistance was added in series with the test diode to monitor diode currents. In some cases where relatively poor transient diodes were used (IN17), this small resistance coupled with a low back bias and large forward currents limited the reverse-current spike. The reason for this can be explained with the aid of the following circuit: I IBOR' Unless IBOR << E, the series resistance may be sufficiently large to limit the reverse current. This limitation on the reverse current is quite common for junction diodes (see Section 2.1.3). The four photographs of Fig. 2.2-2 illustrate the contribution of series resistance. Note that when the back bias was increased to 4 volts, the 200-ohm resistance no longer limited the initial back current. In fact, if the scope did not mask the leading edge of the transient, the initial transient would be very large when the series resistance is zero. Certainly the series resistance then sets an upper limit on the initial transient spike~ 19

The University of Michigan * Engineering Research Institute Note that in the logic circuit of Fig. 3.2-1 series resistance of the input and grid-clamp diode is zero. The series resistance of the back-biased "and" diode is to a first approximation the dynamic resistance of the unpulsed input-clamp and "and" diode in series.* If now the diode has little or no lost charge, as is the case of the Hughes 2109, the effect of series resistance is certainly negligible. Therefore, it is reasonable to conclude for this application that the reverse current of good transient diodes is independent of series resistance even at small back-'bias voltages. (d) Back Recovery as a Function of Pulse-Repetition Rate. The back transient is independent of the pulse-repetition frequency if the diode under test has had sufficient time to establish the steady-state minority-carrier gradient before being back-biased. If the pulse-repetition rate is such that the above condition is not satisfied, the magnitude of the reverse transient will be affected. This fact is illustrated in Fig. 2.2-3. The test circuit was pulsed with successive 50 mpasec pulses at a 10 Mc repetition rate. The voltage developed across the 100-ohm resistance is indicative of the diode reverse current. Since the forward transient duration is 10 Wmsec or less for most diodes considered, it is possible to conduct gate tests using pulse-repetition rates lower than the basic clock frequency. This procedure is justified up to a frequency of 10 Mc. In the preceding section the reverse transient was investigated using a 50 mnisec pulse. During the initial phase of this project, the reverse transient measurements were taken on the circuit shown below. These test results have been included to augment data in the preceding section. For some diodes, the reverse transient persists for times greater than 50 mjisec. Therefore, testing with a 25 Kc square wave allowed observation of the complete back transient. Test diode Tektronix type Tektronix 545 CR0 1,05 Square wave R Rl Cin = 8 Itf A 25 Kc square wavRe was used as the input signal and the back bias Gen. PRF = 25 Kcl. *The justification of this statement is included in Appendix Co 20

The University of Michigan ~ Engineering Research Institute was varied by changing Eb. The forward current through the diode was varied by changing the amplitude of the input signal. An approximation of the forward current was read on an average current-reading meter. The current read on the meter is a good approximation of the forward current because the average of the reverse current through the diode over half a period is negligible compared to the average forward current. The data taken were as follows: (a) Reverse current at t =.05 pseco (b) Time for reverse current to reach 5 mils. (c) Ratio of initial reverse current to forward current (called the a/b ratio). (d) Initial back current. These tests were run using two different values for the back bias, namely, -1o5 and -3.0 volts, and different forward currents. The back transient test circuit, wave shape, and results are shown graphically in Figs. 2.2-8 to 2.2-16. There is good agreement between the data in these figures and that in Table 2.2-I, with -one exception. There is an apparently gross disagreement on the characteristics of the HD2182 diode. Actually this disagreement is the result of testing two different groups of HD2182 diodes. One group consistently exhibited poor transient characteristics while the other group exhibited characteristics comparable to those of the good HD2109 diode. This is a good arguing point for user tests. 2.o22 Forward transients.-For diodes of the quality used in typical gating circuits, the forward transients have a negligible effect, To investigate the characteristics of the forward transient, a Textronix 545 oscilloscope with a rise time of 12, pasec was modified by bypassing the furnished vertical amplifier and using instead two cascaded distributed amplifier (Hewlett Packard 460A and 460B), each with a band-width of 140 Mc. The overall rise time of the probe, amplifiers, and 545 CRT plates is approximately 6 m4sec. The forward transient test circuit and the resulting data are shown in Fig. 2.o217. The voltage developed across the load resistor is an indication of the forward current0 Notice that the significant portion of the forward transient is over in less than 10 musec for the ED2182, CTP309, Ray 295, and HD2109. A poor forward transient diode, the Hughes 117, has been included to illustrate the contrast between good and poor transient diodes. It follows from Fig, 2,2-17 that the HD2109 and Ray 295 will function well as grid-clip diodeso Clip, clamp, and limiter are words used interchangeably in connection with a pulsed circuito Here (Fig. 3.20la) Diode F is used to clamp the grid at - 1/2 volt and Diode G clips the positive swing of the grid signal to + 1/2 volto Figure 2.2-18 shows the various diodes used as clips (Diode G) in the package of Fig. 3.2-la. Note the consistency of re21

The University of Michigan ~ Engineering Research Institute sults of Figs. 2.2-17 and -18. A somewhat different situation is encountered when a diode is being used to clip a sine wave. It is observed that a good forward transient diode will not clip a sine wave but will only reduce the amplitude of the input signal. In Fig. 2.2-19 the dependence of the clipped wave-shape on the diode static-characteristic is shown. A sample computation for the case when the input voltage is equal to 3.24 volts is shown below. It is the nonlinear portion of the 2109 characteristic that is responsible for the rounded response. Improvement of output wave shape could be obtained by increasing either ein or the series resistance or both. IkQ ~i (t) if t if- 2109 Vd e1(t) = irf +Vd t = 15 mnsec, ej = 3.24 HUGHES 2109 5 E -4 4 z 3.24 ) 3 Load line 02.408 0 oU1_5 1.0 1.5 2.5 3.0 DIODE VOLTAGE DROP Vd (VOLTS) e -3.24v 22

The University of Michigan * Engineering Research Institute 2.2,3 Static forward characteristics.-The two major problems associated with gating structure are (1) noise when all but one of the "and" inputs are pulsed and (2) the availability of grid-capacitance charging current when all inputs are pulsed. It is necessary to consider both static and dynami diode characteristics if noise is to be minimized. In this section the importance of static characteristics as related to static noise will be pointed out. Static noise is defined as the d-c level change in the quiescent condition at the "and' output and the dynamic noise is the component of noise resulting from the reverse-current surge from the pulsed "and" diodes. Total noise = Dynamic noise + Static noise Two examples, (a) and (b), will illustrate the importance of diode static characteristic to gate noise. E< i E2 Quasi ideal diode Es I Cd -I f~ c>-X -1.5 v dc.| 0_h 0I B C 1* It 0 Voltage drop across diode El (a) Consider an "and" gate for which (n - 1) of the n inputs have been pulsed. The input clamp diodes have been assumed to be quasi-ideal (the quasi-ideal diode characteristic is shown above) while the "and" diodes (C) have realistic characteristics. The current through the input clamp is a minimum when all but one of the inputs are pulsed0 If I? - I > I*, the voltage drop across the input clamp will be constant. The voltage supply E6 necessary for point (2) to be at -1.5 volts is E6 = -1.5 + Vt. If (n - 1) gates are pulsed, the drop across the "and" diode will be VF + AVe as the nonpulsed "and" diode is now passing the entire gate current I. The new d-c level at point (2) E2 is given by E2 = E6 VC E2 = E6 -(vc + AVc) 23

The University of Michigan ~ Engineering Research Institute VC = - = voltage drop across the "and" diode when passing a current I/n. The static noise is then the difference between E2t and -1.5 volts. Static Noise = -1.5 - E2 Static Noise = -1.5 - [Ea6 (VT + AVc)] Static Noise = -1.5 - (-15 + VU) + vzU + AVc Static Noise = AVc AVc is the difference in the voltage drop across the unpulsed "and" diode when the current through it changes from I to I/n. As the number of gates approach infinity, Vc approaches zero and AVc then is the voltage drop across the diodes when passing the gate current I. This then establishes a lower limit for the noise cli pping needed for an infinite number of "and" gate inputs o A tabulation of this minimum noise for four diodes is included below. Minimum Noise for an n Input and Gate (n = o) and gate current I(ma) Diode 4 ma 8 ma 12 ma 309.35TV 39V.415V 2182.36V.40vw.44V 2109 44v.545V.625V 295.5V.66V. 85 (b) Now consider the case where the clamp diodes also have realistic characteristics. It can be shown that, Static Noise = AVB + AVc l AVB = the incremental potential drop due to the finite slope of the input clamp characteristics, If the minimum current I* (Fig, 2.2-5) is above the knee of the static curve, AVB will be much less than AVc when I/n is small (1 ma) even when Diodes B and C are identical, Two conclusions can be drawn regarding the effect of static characteristics on gate operation, First, the static characteristics of particularly the l'and~? diode contribute appreciably to the total noise when n is large, Second, it may not necessarily be desirable to reduce 24

The University of Michigan * Engineering Research Institute the gate current I in an effort to reduce transient effects. Figure 2,2-4 illustrates the agreement between actual gate performance and calculations made from the diode static characteristics. An estimate of the total noise was made by assuming each of the pulsed "and" diodes supplied an additional current IBO to the unpulsed "and" diode. The total current to the unpulsed "and" diode during the first instant is equal to I + (n - l)IBO where IB0 is a function of the forward current If = I/n. The requirement for the minimum input clamp current of the unpulsed "and" diode, if capacitance is neglected, is given by: I' - I - (n - 1)IBo _> I However, capacitance is certainly not negligible and a large portion of the initial back current goes into the capacitance at points (2) and (3). In fact, dynamic noise is to a certain extent reduced by capacitance at point (2). A sample computation for a five input "and" gate using 2109's as input clamps and "'and" diodes is shown on the next page. The values used for IBO = f(If) were obtained from Fig. 2.2-15. A number of diodes have been tested for static forward characteristics. Figures 2.2-5 and 2.2-7 are plots of the average characteristics. The diodes of Fig. 2.2-5 have been taken as representative of those tested both with regard to transient and static characteristics, Figure 2.2-6 gives an indication of the consistency of static characteristics within a batch. 2 3 DIODE SPECIFICATION The information of the preceding sections provides a basis for predicting diode performance in any particular logical circuit. The following sections emphasize the relationship between diode characteristics and operational details of a diode gating circuit. The experimental results of testing a clocked and unclocked package are included. Finally, an experimental correlation between static and dynamic characteristics is drawn to show their close relationship 2o3,1 Diode requirements.-In general, the two major considerations in gate design are noise and the effective use of available gate current, Bot factors depend primarily on the diode back-transient characteristics. A typical "or-l"and"-"or" gating configuration is shown on page 27. The previous material on diode transients provides a theoretical basis for diode assignment to the various positions A to F, The experimental testing in the following Sections 2.3.2 and 2.3.3 substantiates these diode requirements. 25

The University of Michigan * Engineering Research Institute E2 IBO -- (m-l)iBO 6 1 BO I+(m-) IBO E2 -I1.23v E If: n: 1.6 ma -1.84v c 1 c-1.5v.34v STEADY STATE -I.23v Itt If=I=8ma -I1.68 v I -1.12v.56v N-I PULSED FOR STATIC NOISE -I1.23v E }.37v I If= I + (N -I) IBO: Oma -1.60v e ~ I -I.OOv.6v N-l PULSED FOR DYNAMIC NOISE 26

The University of Michigan ~ Engineering Research Institute BE R2 E4 A (1) The "or" Diodes A and D require high forward conduction. For frequencies below 10 Me forward transient are of negligible importance. One would anticipate that the back transient of the "or" diodes would not be objectionable. However, experimental results will show later that the grid "or" Diode D must have the best possible back-transient properties while the back transient of Di)ode A is not critical. (2) It is desirable that the input-clamp Diode B and the "and" Diode C have a minimum back transient "lost charge." The importance of the static characteristics of this diode pair has already been pointed out. (3) The grid-clamp Diode 6 is required to have good back-transient pro-perties as current lost through this diode represents a loss of gridcapacitance charging current, (4) Diode F is required to clip the grid signal. In Section 2.2.2 it was shown that Diode F may be a good clip in this situation despite poor transient properties, In fact, the forward drop across this diode may be used to advantage to eliminate the use of the E5 supply, What is actually desired in all cases is a diode which is as nearly ideal as possible. The following tests will outline the criteria for choosing diodes, They will point up the fact that because of the nonideal characteristics it is best in all cases to use diodes with good transient properties with high forward-conduction as a secondary consideration. Of those diodes tested the Hughes 2109 stands out as best fitting th is criteria, 203.2 Experimental testing, unclocked.-The diode requirements outlined in the previous section may be verified by comparative testing of diode types at various positions in the package. The gate in Fig. 5.2-la has been designed for 10 Me operation. Fifty muLsec pulses havebeenapplied to this circuit at a 60(-cycle repetition rate. The results and conclusions of comparative diode testing are summnarized below. It is desirable that the input clamp diode have both good transient and static characteristics The Hughes 2109 best fulfills this requirement. The capacitane chargin cu r r e 27

The University of Michigan * Engineering Research Institute best "and" diode is considered to be the one which contributes the least noise. The total noise has been defined as the additive combination of the static and dynamic noise. The results of comparative tests are shown in Table 2.2-II. Note that in the case of the 309 and 2182 diodes the experimental and computed static-noise levels differ widely. This is not surprising as these relatively poor transient diodes have considerable reverse transient current flowing at the end of a 50 mrsec pulse even for small forward currents (see Figs. 22-9 and -10). It is possible to have the same total noise for a number of combinations of reverse current and static characteristics as shown below. Of the diodes tested, the Hughes 2109 gives the best performance. 2182.9 015 +.9 295.6 6 Noise composition Experimental results have shown that it is necessary to increase the input gate current I when inferior transient diodes are used in the "and" position. The surge of reverse current to the unpulsed input clamp may be sufficient to cut the nth input off. There are no situations in which a poor transient diode would intentionally be used as an "'and" diode. However, the presence of the reverse current does assist in charging the grid capacitance when all the n inputs are pulsed The experimental measurements pertaining to the performance of the grid-clamp diode G are shown in Fig, 2,3-1, As previously stated, this diode must have excellent back recovery characteristics, The forward conduction is of minor importance, as the supply voltage may be adjusted to give the desired tube bias. In this particular application (Fig. 3,2-la), it is desirable to use the steady-state drop of the 2109 to establish the grid bias of -.45 to -.5 volt by tying the diode plate to ground and thereby eliminating the E4 supply 28

The University of Michigan ~* Engineering Research Institute The experimental results pertaining to the grid-clip Diode F were dis cussed in Section 2.2.2 under forward transients (Fig. 2.2-18). In the 10 Mc gate of Fig. 2.2-1a a grid swing of 1 volt was specified. The desired bias condition of -~5 to +.5 volt may be obtaineidby tying the cathode of the clip diode and plate of the clamp diode to ground. The 2109 has been chosen for both these diode positions because of its transient properties and not on the basis of its forward conduction for a particular application. 2,3~3 Experimental testing, clocked.Pt. 3 _F7t0 v ~~ —Noise _~it~P5 pulsed - pulsed pulsed not pulsed clock 0v e The introduction of a clock signal into the gate circuitry has the following additional features. Since a clocked system is always multiple phase, the first level logic (input "or ") always reaches maximumn amplitude prior to the clock-pulse'rise. Noise resulting from the reverse current of the pulsed "and"' diodes is therefore completelyeliminated because the pulsed "and" diodes have not experienced a' forward current just prior to the pulse. The reason for this is that point (3) in the above figure has been pulled negative by the clock and has back-biased the "'and" diodes. The noise phenomenon is now a function of the static properties of the unpulsed "and" diode and the reverse transient current of the clock diode,. Noise at point (5), resulting from the addition of the static noise (AVB + AVC) and the back-transient noise of the clocked diode) is the factor limiting high-frequency gate operation. At present the tube and transformer have placed the upper limit for practical operation at about 7 Me, thus making a legitimate test using high pulse-repetition rates imipossible above 7 Me. 29

The University of Michigan ~ Engineering Research Institute To circumvent this frequency limitation a simulated gate has been used and operated at clock frequencies from 5 to 20 megacycles. The circuit is shown below. E2 E6 10K ls~ > 10 K' (-1L. c - Ivc)v v + I________ 5~~-1.5 v L' 10K E1 The clock (the voltage source shown) is an electron-coupled oscillator, operating class C. The wave shape of the clock signal with reference to the signal pulses is important for effective gating. Notice in the figure below that the steepest portion of the sine wave or clock signal is used for wave-shaping. The information pulse is required to rise and fall to amplitude A in T/10 where T is the clock period. Clock -1>>t*- t, -20 10 T 2 The amplitude of the clock pulse is given by Ac sin20 = A/2 3o

The University of Michigan ~ Engineering Research Institute A 1 c 2 sin 180 Ac = 1.618A. The voltage about which the clock is centered is given by: Clock center voltage = -1.5 - Vc + A/2 Taking the 10 Me gate of Fig. 3.2-la as an illustrative example, the clock centering voltage is: Vc =.34 volt A = 3.5 volts Clock centering = -1,5 -.34 + 1.75 volts = -.09 volt. There is little error in centering the clock voltage about ground as is done in the test circuit. The amplitude of the clock is then given by: Ac 5 1618A = 5.67 volts. (6.oo00 v used in test) As the frequency of operation increases, the gate current I must increase to charge the circuit capacitance in the manner prescribed by Equation (2) of Section 1.3. The circuit of Fig. 3.2-la is taken as a typical 10 Mc gate and is used as the basis for the following formulation. Let Is = I + 4 ma. Then based on the conditions given above: 5 f = clock frequency in Mc, and I = gate current in ma. Test results at 5 Mc (Fig. 2.2-4) show a noise voltage of.54 as compared to.55 volt (Fig. 3.2-2a) for the unclocked case at 10 Mc. The clock diode has had a forward current history (8 ma) which is roughly equivalent to the sum of the forward currents of the 4 pulsed diodes of Fig. 3.2-2a. It is anticipated then that the total resulting noise voltage will be equal for the two cases. The dynamic noise C resulting from the back transient of the clock diode has been added to the computed static noise for the case where 4 or 5 inputs are pulsed. The data for the 295 show the dependence of total noise on diode static characteristics as the 2109 and 295 have equivalent back-transient properties with the 295 having inferior static characteristics.! 31

The University of Michigan ~ Engineering Research Institute Test results at 5 Mc (Fig, 3.2-2b) show the noise at point (3) to be approximately equal to the static drop across the unpulsed diode if the information pulse leads the clock by T/10 seconds. It is still necessary that "and" diodes have good reverse-transient characteristics but for a slightly different reason than in the unpulsed case. Consider a situation where none of the inputs has been pulsed. Each "Sand" diode will then send a surge of reverse current to point (3) at the termination of the clock pulse. Noise at any time during the clock cycle is objectionable. However, it is the back-transient properties of the clock diode that are particularly critical. 2.304 Experimentally observed correlation between static characteristics and back-transient properties.-The previous discussion has been concerned with diode characteristics* the forward conduction is measured statically and the back transients are measured dynamically. The back transient has been characterized by the amount of lost charge. It is known from manufacturing techniques that these characteristics are basically opposed. To obtain a high conduction it is necessary to use either a large junction area or high impurity concentration. Both of these factors contribute heavily to diode reverse-current. Figure 3.2-2 indicates the relationship between conduction and the reverse transient lost charge. The dynamic forward resistance aVd/6If vs the lost charge (for If = 9 ma) has been plotted for those diodes which have been tested. It should be pointed out that the number of diodes constitutes a small sample and the diodes obtained tended to represent the best available products of the manufacturers contacted. It is obvious that the most desirable diode is that one which comes closest to realizing ideal diode properties. However, due to the aforementioned qualities of commercially available diodes, it is evident that a choice must be made between good forward conduction and good transient properties. It is the opinion of the authors that it is necessary to have back-transient properties equivalent to those shown for the Hughes 2109, giving diode static characteristics secondary consideration. The Hughes 2109 represents the best compromise of the diodes tested to date. 3. GATE STRUCTURE PERFORMANCE In this section, the performance of two experimental packages is considered. The first is designed for 10 Me operation and the second is an operational package for 5 Mc operation. The 10 Mc circuit of Fig. 3.2-1la has been tested on a single-pulse basis. Although a more complete test with a continuous chain of 50 mLsec and a clock would have been desirable, tube and transformer studies have shown operation at a 10 Me repetition rate to be impractical. Figure 2~2-3 verifies the assumption that diode transients are unaltered by a 10 Me pulse repetition rate. Therefore, the single-pulse test results are indicative of actual operation at 10 Mc, 32

The University of Michigan ~ Engineering Research Institute A 5 Me package (Fig. 3.2-lb) has been tested under legitimate operating conditions. The specification of voltage and current magnitudes and a summary of the gate performance is covered in the two succeeding sections. The remaining sections discuss the effect of tube grid characteristics upon the grid signal wave-shape and finally the upper limit of gate performance. 3.1 SPECIFICATION OF LEVELS AND CURRENTS In this section the design specifications for a 10 Mc gate (Fig. 3.2-la) and 5 Mc gate (Fig. 3.2-lb) are discussed. (a) Currents - Fig. 3.2-la. A discussion of the input logic stage is dependent upon the tubetransformer configuration only to the extent that the bias levels and grid capacitance must be known. In this particular example, a grid swing of 1 volt and an effective total grid capacitance of 30,tuff has been used as the basis of computation. Assuming a value of 5,iIf for Cl, the gate current I can be computed from Equation (2) of Section 1.3. (Eg + EN)C1+ E + C g At At where Eg = grid swing = 1 volt, EN = noise clipping - 1 volt, Cg = 30 l4Lf, C1 =5 ~WfA EC I3 = grid pull-down resistor current, and At At = T = 10 msec; 10 I = 7 ma, An estimate of the average current lost in the grid-clamp diode may be made from Fig. 2.3-1 (about 1 ma). Therefore, to insure sufficient current to swing the grid, 8 ma has been used. An input gate current of 12 ma has been found satisfactory. Levels: o 3.2-1a If "and" diode limiting is to be avoided, the level at which "and" limiting would take place must be greater than the grid clipping level by some factor of safety. Since the drop across the'or"' diodes can be expected to be from.4 to.5 volt, the minimum amplitude of the gate input Eo can be established. To insure no "and" limiting of the grid signal, a.5 volt safety factor is assumed. The following sketch shows the composition of the informa33

The University of Michigan ~ Engineering Research Institute +2 +1.52 +1.5 1 - C-.84 -1. -.5. -2.5 Safety margin Noise clipping Minimum signal tion pulse at the various points in the circuit. The noise clipping levels on the input and grid "or" diodes can be increased or decreased as justified by environmental tests. The levels shown have been found satisfactory in the work to date. (b) Currents - Fig. 3.2-lb. Figure 3.2-lb is illustrative of gate performance at 5 Mc. The 436A requires a grid swing of -2.0 to 2.0 for optimum tube-transformer performance. The effective grid input capacitance is 20 pi~f. The gate current I is given by: Eg = 4 volts EN = 2 volts Cg = 20 pLf C1 = 5 Aif EgCg I3 At = grid pull-down resistance current At = T = 20 nAsec 10 (Eg + EN)C1 + 13

The University of Michigan ~ Engineering Research Institute I = 9.5 = lO ma I' = 14 ma Levels: Fig. 3.2-lb Notice that a grid-clip diode has not been included; the 436A grid is an effective clip as the grid characteristics limit the signal at the desired level (+ 2.0 volts). It is therefore necessary that "and" diode limiting below + 2.0 be avoided. The noise clipping levels indicated are conservative and may later be reduced. Eo =8.55 I0 ma 9 2.5 4 -4.45 -4. -._.6 Cg 43.6 1z/ 3.1 ~ 3.1 2.6 -2 -2____ -3 -4 -4 -4.45 -5 - 4.95 35

The University of Michigan ~ Engineering Research Institute 3,2 GATE PERFORMANCE In this section the performance of a 10 Me gate (Fig. 3.2-2a) and a 5 Mc gate (Fig, 3,2-2b) is discussed. It is desirable to assign a figure of merit or efficiency to a circuit. Let gate efficiency E be defined as the product of current efficiency A and voltage efficiency B. E A B 100 Eg B - -- x 100 voltage efficiency A - I_ I x 100 current efficiency I" I, + IB (Diode B) The voltage efficiency B is the ratio of the grid swing Eg to the amplitude of the input signal required Xfor satisfactory gate operation. The current efficiency A is defined as the ratio of current required to charge the grid capacitance Cg to the gate current necessary to drive one "and" input. The current needed to drive a gate is the "and" pull-down current IP plus the reverse current of the input clamp diode. Figure 3.2-la Computation of Gate Efficiency. Eo = 4.5 volts E = 1 volt I - 8 8ma I - I, + T1B(average) = 12 + 2 = 14 ma Then A = 22,2 B - 33,3 E = 704% The term gate efficiency should be used with caution, as the same gate with different values of grid swing and capacitance will have a different efficiencyo For example, consider the same circuit with a grid swing of 2 volts. Eo = 5.5 volts Eg = 2 volts I = 16 ma IV = I- + 1B = 20 + 3 = 23 ma Then A = 36 4I B = 34o8 E = 12o65%

The University of Michigan ~ Engineering Research Institute Gate efficiency is improved by decreasing grid capacitance, noise clipping, and the input current I". Wave Shaes. The first four photographs in Fig. 3.2-2a show the wave shape of the signal as it progresses through the unclocked package when all inputs are pulsed. The delay (4 nmsec) of the pulse from the input to the "'and" [point (2)] to the grid [point (4)] as shown in the next photograph. The time delay is due to the finite time required to charge the circuit capacitance. The noise resulting at the "and" output [point (3)]when different combinations of i"and" inputs are pulsed is shown in the last four photographs. The negative undershoot at the termination of the noise pulse is primarily the result of the back transient from the input "or" diode. A high conduction "or" has been used to minimize the drop across the input "or" diode with little regard given to its transient properties, It is felt that the resulting negative undershoot is not objectionable and therefore the relatively poor back-transient properties of this diode can be tolerated. The effect of small variations of the inputpulse amplitude Eo and the gate current I on the noise is shown in Table 3.2-I. It is observed that the total noise is only slightly affected by an increase of Eo and I. Fie 3,2-02lb Computation of Gate Efficiency. Eo = 9.0 volts Eg = 4.0 volts I = lO ma Iv' = I' + IB(average) = 14 + 2 = 16 ma A 311.3% B = 44o5% E = 135.8% Wave Shapes. Typical pulse wave-shapes and levels are shown in Fig. 3.2-2b. The events indicated in the time sequence can be quickly summarized as follows: (1) The output of the previous package (No. 2) arrives before the clock (No. 1) by 20 bmsec. (2) If all inputs are pulsed, point (3) rises with the clock and falls with the earliest input (No. 4). The negative swing results from the back transient of the input "or" diodes. A CTP309 has been used as the input "or" diode for its high conduction property (despite its poor back-transient characteristics). If the undershoot is undesirable, the CTP309 diode can be replaced with a Hughes 2109. The portion "A" of (No. 4) is the level of point 37

The University of Michigan ~ Engineering Research Institute (3) when the clock is positive and none of the "and" diodes is pulsed. (3) The grid signal (No. 6) rises with point (3) (a slight delay results from the 2 volts of noise clipping) and falls when the clock pulls the regenerative gate down. Notice that the grid signal did not reach + 2.0 volts because point (3) was about +1 volt during the latter portion of the pulse. "And"' limiting has taken place, thus emphasizing the importance of the trailing edge of the input pulse. (4) When point (3) falls, the "and" gate grid "lor" diode experiences a back transient which pulls the grid signal slightly negative despite the effort of the regenerative gate to hold the grid up (No. 6). The back transient of an "ort" diode at this time is particularly undesirable, Therefore, the 309 diode was dropped in favor of the Hughes 2109 for use as the grid "or"' diode. The delay b8 from the grid to output is 28 m~seco This may be reduced by approximately lO 1msec, if the grid is driven to + 2.0 volts. The package delay 8 measured under this condition is 34 mW sec. All measurements were taken with a Tektronix 545. The noise indicated in No. 9 has been obtained using Hughes 2109 diodes of the quality shown in Table 2.2-I (IBo = 1 ma). A recent order of one hundred 2109's has the following distribution of initial back currents: IBO (ma) | 1 2 3 4 5 6 Number of Diodes 8 37 13 5 0 at If = 9 ma EB = 1o5 volts. The diodes used for tests in this report have been taken from the initial shipment of 2109's received, An increase in noise of about o.0 to 1.3 volts can be expected with inferior 2109's. It is essential that all "and" diodes and grid "or" diodes be tested with a circuit of the type used in Table 2.2-T before use in a package if the noise level is to be maintained at.5 to.8 volt, 353 EFFECT OF GRID CURRENT ON GRID WAVE-SHAPE Under certain operating conditions, the tube grid can be used to clamp the grid signal. This can be brought about by driving the grid positive and drawing grid current, For example, the cascoded 437A's of Fig. 3.2-la will clip the grid signal at +2 volts, thus eliminating the need for Diode F if it were desirable to push the grid that much positive. In Fig, 352-lb the gridclip diode has been eliminated as the clip function is performed by grid to Q8

The University of Michigan * Engineering Research Institute cathode "diode" of the 436A. In any case, the gate current lost to the tube grid should be considered. In this particular case, if the grid is swung from -1/2 to + 1-1/2 volts, the grid characteristics will contribute to the clipping action. However, for a grid swing of -1/2 to +1/2 volt, grid characteristics have no effect on the grid wave-shape. Grid characteristics for cascode 437A's 1.6 IC Eb = 66 volts on 8 lower tube.4.2.5.75 1.00 1.25 -3 4 UPPER LIMIT OF PERFORMANCE Results to date indicate that the tube-transformer combination and/or delay lines will be the factors limiting high-speed operation. Therefore, it is desirable to divorce the input logic stage from the remainder of the package and outline those factors that would limit the operation of the input circuitry Gate performance is directly related to the diodes employed and therefore any remarks must be necessarily restricted to current diode development. The factors limiting gate operation are (a) noise and (b) input gate current I". In Section 2i.532 noise has been measured as a function of clock frequencya It was assumed that the grid swing and noise clipping level was maintained constant as frequency of operation was increased. That is, the gate current doubled for an increase in frequency by a factor of two. The above assumptions are unrealistic for two reasons. (.1) The noise clipping levels must increase as the frequency (gate current) increases due to the increased reverse current of the gate diodes, and (2) the grid swing will not necessarily remain constant. Both of these factors will result in larger gate currents than have been assumed here~ It is difficult, however, to anticipate the contribution of these factors from data taken at 10 Mc, Therefore, the data in Fig. 3.2-1 represent the lower limit of noi se voltage, since it has been assumed that the grid swing and the noise clip level remained at 1 volt for all frequencies, 39

The University of Michigan ~ Engineering Research Institute Gate noise has been measured under two conditions at 10 Mc. In Section 2,3.2 (unclocked) the source of dynamic noise was the reverse current of the pulsed "and" diodes. In Section 2.3.2 (clocked) the dynamic noise was the result of the clock diode reverse-transient. The noise as a function of clock frequency has been replotted in Fig. 3.4-1. It is possible to compute total gate noise from a knowledge of the diode static characteristics and measurements of the initial back current as a function of forward current. This has been done for the unclocked gate using Hughes 2109 diodes. The instantaneous input-clamp current ib and unpulsed "an current ic have been derived from the following equations. The total noise has been computed from the static curves for the 2109 by the method that was used for Fig. 2 2-4, If the 10 Me gate is taken as a basis for computation, an equation relating gate current to clock frequency can be written [Equation (1)]. Assuming a five input "and" gate with 4 of 5 inputs pulsed, the normal steadystate current through any "and" diode is given by Equation (2), I = f ma (1) f = clock frequency in Mc If = o (2) An equation relating IBO to the forward current can be obtained from Fig. 2,o215 [Equation (3)]. Substituting Equation (2) in (3), IBO as a function of gate current I is given by Equation (4). The initial current to the unpulsed "and" diode is given by Equation (5). IB0 =.18 If +.24 ma (3) IBO = o036 I +.24 ma (4) ic = + (m - 1) IBO m= 5 ic = 1o144 I +.96 ma (5) Let I' = I + 6 ma. A 6 ma minimum clamp current is much larger than is necessary for low frequency operation but it is necessary to avoid input clamp cutoff at 40 Mc. The current through the unpulsed input clamp is given by Equation (6)a.A comparison of the computed results with the experimental noise measurement at 10 Mc(Fig, 3.2-2a) shows that.1 volt should be added to the conmputed values to adjust the experimental results to computed data, The normalized results are plotted in Fig. 304-1. 40

The University of Michigan ~ Engineering Research Institute ib = I' -ic ib= 5 04 -.144 I (6) The magnitude of t'he input gate current is a factor which will set a practical limit on the frequency of operation. For example, the input current to a pulsed "and" gate input at 40 Mc is equal to 38 ma plus the reverse current lost to the back=biased input clamp and pulsed "and" diode. In practice, it will be the restricted number of gate drives that will limit the frequency of operation rather than gate noise resulting from diode transients. 4o SLUMARY The purpose of this contract was to investigate experimentally and theoretically the possibility of increasing the speed of operation of the dynamic circuitry of SEAC type computer components by at least an order of magnitude0 This particular report has dealt with the design limitations of the diode gating structure. The more important conclusions are summarized below. The speed of operation of a diode logic circuit is limited by the amount of noise whichk can be tolerated in the circuit and the magnitude of current required per gate input. As frequency of operation is increased, all gate currents must necessarily increase if a given grid swing is to be maintained. It is the increased gate current that is primarily responsible for the decadent performance as frequency is increased0 Noise has been shown to'be the result of diode reverse-transient currents and the static characteristics of the unpulsed input clamp and "and" diodes, The reverse-transient properties have been given priority over the statiu characteristicso It is true that the static characteristics of the p>:iulsed "ands" diode contribute to the static noises but this additional.2 to.3 volt of nolse is a small price to pay for a diode with really good backtransient properties~ The aim of diode choice has been to obtain the best possiL'ble forward conduction without sacrificing backtransient properties. This has been the criterion for diodes in all positions in the gate with the except ion of the inpuLt "or" diode Not only are the reverse transients important for the reduction of noise but also the reverse current of the input clamp,'"and" diodes, and gridclamp diodes represent a charge loss not present in the gate using ideal diodes. The reverse transients of two diodes, the clock diode and the "or" diodes on the tube grid, are particularly critical. The forward transients have been shown to be negligible by comparison to the reverse transient. It is recommended that all diodes be checked for forward conduction and back-transient properties befo use in the gate circuit, Of the diodes tested to date, the Hughes 2109 represents the best compromise of diode characteristics~ 41

The University of Michigan * Engineering Research Institute Idealized junction diode P @ +II + N o + + e Equilibrium 0 DEPLETION LAYER 0 INCREASED WITH END R~EGIONS --- If o. BACK BIAS Forward-biased Fixed donor ions Mobi le holes a) co 00 Eo. Cd Fig. 2.-.MH q O Mobile electrons f 0 9 Fig. 2.1-1. Mechanism of diode conduction. Mobile holes r_4c

The University of Michigan * Engineering Research Institute Steady-state hole concentration P N Lo lI Hole concentration for reverse Hole concentration for reverse bias bias condition during T1 condition during T2 p p tI te t4 X -_ P=Oat X=O P=O at X=Lo Reverse transient for a Junction diode If t Dode T - T2 Fig. 2.1-2. Theoretical junction diode. 43

The University of Michigan * Engineering Research Institute 24 22 BO Li 20 LLI 18 r2~~~~~ I/~~~ HD 2182 16 E 14 z.|. I. Bat 20musec 12- z 01 8 6 lat 20 m/asec IBO HD 2109 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BACK VOLTAGE Fig. 2.2-1. Effect of back bias on back recovery. 44

The University of Michigan * Engineering Research Institute Rs HD2182 ( If- 9MILLIAMPS 3.3K SUPPLY R' = 50o R' = 100 2 Eb = -1. v Eb = -1.5 v R' = 200. n R' = 200 a Eb = -1.5 v Eb = -4.o v Current = 10 ma/div Time =.02,sec/div Fig. 2.2-2. Effect of circuit series resistance R' on back recovery.

The University of Michigan * Engineering Research Institute loon If = 15 MILLIAMPS Eb -1.5 VOLTS 3.3K SUPPLY Input voltage 1 v/div 02 tsec/div HD 2109 Ray 295 5 ma/div 5 ma/div.02 1sec/div.02 Lsec/div Fig. 2.2-3. Back recovery at a 10 Mc repetition rate. _* _;c _~~~~~4

The University of Michigan ~ Engineering Research Institute.5 L A' Total noise > X i ww=Xo Static noise z.3 z).2. I Iof 2 2 of3 3of 4 4of5 n-I Circuit: see Fig. 3.2-la Specifications: I a 8 ma I' - 12 ma Symbols: A - actual case X - ceputed case Fig. 2.2-4. Noise as a function of the number of gates pulsed. 47

The University of Michigan * Engineering Research Institute 1 I CTP 309 Hd 2109 - I 0 RAY 295 Hd 2182 r)4 Q. IN 117 z 7 Z LU o 4i 0..2.3.4.5.6.7.8 VOLTAGE DROP ACROSS DIODE (Vd) Fig. 2.2-5. Static characteristics of representative diodes. 48

The University of Michigan Engineering Research Institute 12 2109's, I I 309's 10 7 2182's (Shaded 9 j area) C) ~._1 e 8 Iz w C) r0 n.<1: 117's (Shaded area) 2 0 I1.2.3.4.5.6.7.8 VOLTAGE DROP ACROSS DIODE (Vd) Fig. 2.2-6. Deviation of static characteristics. 49

The University of Michigan Engineering Research Institute 12 118 II 306's (Shaded 2191's area) I0 9 CL 8 Q. (I 7 6 -J._J z _, D 0: 0 Cr_ ~~~~~~~~~RR-W's Li.J r 4 0 uL 191 2108 3 2 Si- J IN251 ~~~~~~0.1.2.3.4.5.6.7.8 VOLTAGE DROP ACROSS DIODE (Vd) Fig. 2.2-7. Static characteristics of additional diodes tested.

The University of Michigan ~ Engineering Research Institute TEST DIODE RTER RLOAD EBACK BACK CURRENT a |. Ol/5'.5M/u.05 IU SEC ts T IM E FORWAlRD I CURRENT Forward and reverse current at Rload Fig. 2.2-8. Back transient test circuit at 25 Kc. 51

The University of Michigan ~ Engineering Research Institute 4.4 4.0Current at t =.05 iLsec vs forward current 3.6 /ab 1-1/2 v 3.2 _ * IN 295 2.8 /LN CTP 309 0 HD 2109 En 1O- HD 2182 -' IX IN 191 E 8.4 0 2 4 6 8 10 12 14 16 If IN MILS Fig. 2.2-9. Current at t =.05,sec vs forward current, Eb = -1.5 v. - 52

The University of Michigan * Engineering Research Institute 4.4 4.0 Current at t =.05 tsec vs forward current Db = -3=. v 3.63.2 * IN 295 A CTP 309 0 HD 2109 2.8/ 01 HD 2182 X IN 191 2.4 2.0 1.6 / 1.2.8.4 - l.......... l l... II 0 2 4 6 8 10 12 14 16 ]f IN MILS Fig. 2.2-10. Current at t =.05,sec vs forward current, Eb = -3.0 v. 55

The University of Michigan ~ Engineering Research Institute 2.2 Time at Ib =.5 mil vs forward current Eb -1-1/2 v 2.0 -- 1.8 * IN 295 A CTP 309 1.6 0 HD 2109 I O HD 2182 X IN 191 1.4 1.2 I.I 1.0 /.8 A /.6.4 X.00? b.2 0 2 4 6 8 I0 12 1416 If IN MILS Fig. 2.2-11. Time at Ib. -5 mil vs forward current, Eb = -1.5 v.

The University of Michigan ~ Engineering Research Institute 2.2 Time at Ib =.5 mil 2.0 vs forward current Eb = -3.0 v 1.8 - 1.6 z 1.4 o FO.8 * IN295 A a CTP 309 0 HD 2109.6- 0 HD 2182 X IN 191.4.2 A -, 0 2 4 6 8 10 12 14 16 If IN MILS Fig. 2.2-12. Time at Ib =.5 mil vs forward current, Eb = -3.0 v.

The University of Michigan * Engineering Research Institute I.I 1.0 IN 295 A CTP 309.9 0 HD 2109 \ HD 2182 X IN 191.8.7 0o.6.5.4.3 HF2182 ~ to A_ 0 BD2109.2 - c IN191 I I.... I. I 0 2 4 6 8 10 12 14 16 If IN MILS Fib. 2.2-13. a/b ratio vs forward current, Eb = -1.5 v. 56

The University of Michigan * Engineering Research Institute 1.0.9.8.7 0 <.6 o * IN 295 A CTP 309.5 0 HD 2109 O HD 2182 X IN 191.4 IN295.3 LI -- IOI E, RD2109 0-" — ~.x "'0 ~~~~~.21 I~-N191l.1 2 I I I I 0 2 4 6 8 10 12 14 16 If IN MILS Fig. 2.2-14. a/b ratio vs forward current, Eb = -3.0 v.

The University of Michigan * Engineering Research Institute 5.5 5.0 4)0. 4.5 1n 4.0 z 3.5 Z: o 3.0 2.5 1 2.0o 1.5 IAI * IN 295 FA CTP 309 1.0 0 HD 2109 El HD 2182 X IN 191.5 0 2 4 6 8 10 12 14 16 If IN MILS Fig. 2.2-15. Initial back current vs forward current, Eb = -1-1 5 v.

The University of Michigan ~ Engineering Research Institute 5.5 5.0 4.5 4.0 _J z *N 295 o a CTP 309 CD //tZ 0 HD2109 2.5 o HD 2182 - 2.0 Rio X IN 191 1.5 / /0 3.5 o 3.0 0 2 4 6 8 10 12 14 16 If IN MILS Fig. 2.2-16. Initial back current vs forward current, 1b = 8-32 v..5 c5

The University of Michigan ~ Engineering Research Institute TEST DIODE VN ~2.4 V 3) (EPIC) R< RLOAD R TER Current wave forms IN 117 HD2182 CTP 309 Ray 295 HD2109 Time scale:.008 psecJcm Amplitude scale:.85 volts/cm Fig. 2.2-17. Forward transients 60

The University of Michigan ~ Engineering Research Institute Grid signal with no attempt at clipping 117 309 2182 295 2109 _ __ Time scale: 0.020 isec/div Amplitude scale: 0.5 volt/div Fig. o2.2-18. Determination of the best clip diode (G).* *See Fig. 3.2-la for the circuit used. 61

The University of Michigan * Engineering Research Institute Output voltage - test results Output voltage -computed 4.0.40 3.5.35 Input voltage 3.0.30 Lii < 2.5.205 J 0 > i ~~~~.5 /. ~~~ ~-.05 I I I.5.0 5 0 5 10 15 20 25 30 TIME IN MILLIMICROSECONDS Fig. 2.2-19. Effect of static characteristics on wave shape. - 62

The University of Michigan ~ Engineering Research Institute Circuit: TEST DIODE T CIN I= 8ma 10 IOK E3 CTP 309 HD2182 Ray 295 KD2109 Time scale: 20 Wmnsec/div Amplitude scale: 5 ma/div Fig. 2.3-1. Experimental determination of the best grid-clamp diode.

The University of Michigan Engineering Research Institute 300 306 270 N 240 cm T:) 309 0 -x210~ I l () 117~~~~9 0 120HMS 30 40 50 60708090100 adAT NINE MILS FROM STATIC CHARACTERISTICS Z! 20 ~re-~, Fig. 2.5-2. Experimental correlation between static characteristics and lost charge. <0 26 30 91 F- ~ ~ ~ ~~~~T3 T 5 c~ +IIo 02 HS3 05 07 000 _d~~~ ATNN60L RMSATCCAACEITC ar,~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Fi.232 xeieta0orlto ewe sai hrceitc ana lost charge.7

The University of Michigan ~ Engineering Research Institute E, 6 HD 2109 CLOCK AMPLITUDE: 6 VOLTS I |IOK TEST DIODES El Frequency I I' Static Noise Clock Noise Total Noise Test Diodes 5 Mc 4 8.26.15.41 10 8 12.36.18.54 15 12 16.44.20.64 20 16 20.51.30.81 5 4 8.44.2.64 10 8 12.49.30.79 Ray IN295 15 12 16 o67.33 1.00 Total noise = Static noise + Clock noise 1.6 1.4 c) _ 1.2 0 >.8 j.6 <s~~~~ H ~HD 2109 0.4.2 FREQUENCY IN MEGACYCLES Fig. 2.3-3. Noise variation with frequency.

The university of Michigan E* ngineering Research Institute CLOCK INPUTS NOT SHOWN pt I. 3.3K p t3 E7 p46 A A C E| E4 E5 A C-.0437A CTP 309 3.3K CTP 309 K A2 - 91.5 volts E3 Esa 39-.5 volts E~ ~~~~7 B CT. E C- -4l.5 volts CTP 309 CL OC 0 ground CLOCK = ground EL:8FC Es -1.5 B ~~~~~~~C D I~~RL - to load tube ]~~~~~~~ ~. ~Eclock 14.5 volts,3K6 All diodes Hughes 2109's unless otherwise indicated. Fig. 3.2-la. 10 Me experimental package. 66

The University of Michigan ~ Engineering Research Institute 200 M/1 SEC. L/ INPUT L/ CLOCK INPUTS NOT SHOWN 5 INPUT AND CBo B+ B — 9 VOLT OUTPUT 1 E2 E6 E4 20 E7J I | 5K,CTP 309 I W E7 18 VOLT OUTPUT Es 3.3 10K 436A E3 El = -52 volts Ez = 47 volts E3 -52 volts E4= -1.5 volts E= -3.80 volts T6 S~~~~e~~ E?= -4.95 volts I CLOCK 3+ 120 volts Es = 75 volts Ac 14.5 volts'OFT' — c RL - to load tube 3.3K All diodes are Hughes 2109's unless otherwise indicated. Fig. 3.2-lb. 5 Mc experimental package.

The University of Michigan * Engineering Research Institute +125V +125V CIRCUIT: 39.5v -2.5v 120 K.O0 309 309 RTER 3.3K oK -1.43V -41.5V -41.5V __ Note: All diodes 2109's unless otherwise indicated. CONDUCTION Pt 1 Pt 3 2 v/div 1 v/div.020 klsec/div.020 jisec/div Pt 2 Pt 4 1 v/div.5 v/div.020 k sec/div.020 uisec/div Fig. 3.2-2a. 10 Mc gate performance. 68

The University of Michigan ~ Engineering Research Institute DELAY Pt 2 to Pt 4 at Pt 2 2 v/div at Pt 4.5 v/div Time =.020,isec/div NOISE 1 of 5 pulsed 2 of 5 pulsed 3 of 5 pulsed 4 of 5 pulsed.5 v/div.020 pusec/div Fig. 3.2-2a (Cont.). 69

The University of Michigan ~ Engineering Research Institute 120V 47V C 3.8 L RLo_4.95v ~3.8 -I.5V R 95V Eo = 9.0 volts 5K _ ioo I = 10 ma 4.95V I' = 14.4 ma 2 ~3.3K 1O3 0K _ As= 14.5 VOLTS -52V -52V PT I =PT A OF PREVIOUS PACKAGE No. 1 No. 2 Clock phase 2 Input-point 1 5 v/div 5 v/div No. 3 No. 4 Point 2 Point 3 5 v/div 5 v/div No. 5 No. 6 Regen. gate Point 4 5 v/div 2 v/div Time scale: 40 millimicroseconds/div Fig. 3.2-2b. 5 Me gate performance. 70

The University of Michigan ~ Engineering Research Institute No. 7 Output 10 v/div Noise Noise* No. 8 No. 9 O of 5 pulsed 4 of 5 pulsed 2 v/div 2 v/div Time scale: 40 millimicroseconds/div Pulse Time Sequence in Millimicroseconds -22 Pt. IOutput Starts -10 Pt. 2Starts 40 Regen. Starts OClock a Pt.3Starts 50 Pt I Falls 100 Clock Falls 6 Grid Storts ///54 Pt 3 Falls 20 10 10 20 30 40 50 70 80 90 100 10 120 30 / 3 52 Pt 2 Falls 124 Output Falls 104 Grid a Regen. Fal I Note: Pulse "starts" when it goes through zero. Pulse "falls" when it goes through zero. Fig. j.2-2b. (Cont. ). *Computed static noise is equal to.418 volt. 71

The University of Michigan ~ Engineering Research Institute C locked 1.2 1.0 z.8 0.6.2 1.2 Unclocked >.8 W.2 0 5 10 15 20 25 30 35 40 45 CLOCK FREQUENCY-Mc Fig. I5.4-1. Upper limit of performance. 72

The University of Michigan ~ Engineering Research Institute TABLE 2.2-I BACK RECOVERY AS A FUNCTION OF FORWARD CURRENT IOoS TEST DIODE Single pulse.05 Lsec E2 - Adjust for desired forward current Diode If IBO QL Eb Forward Current Initial Reverse Current Lost Charge Back Bias -12 CTP 309 3 ma 4 ma 110 x 10 - 1.5 volts 9 8 202 x 10l2 - 1.5 15 12 378 x 10'2 - 1.5 Ray 295 3 1.0 18 x 10-l 2 - 1.5 9 2.0 45 x 1012 -1.5 15 3o0 77 x 10-12 - 1.5 HD2182 3 4 104 x 10-12 - 1.5 9 i0 252 x 10'12 - 1.5 15 13 402 x 10-12 - 1.5 HD2109 3 0.5 6.5 x 10-12 - 1.5 9 1.5 21 x 10-12 -1.5 15 2.0 36 x 10-l1 - 1.5 73

The University of Michigan ~ Engineering Research Institute TABLE 2.2-I (Cont.) Forward Current of 9 mils in All Cases CTP 309 HD2182 10 ma/div 10 ma/div.02 isec/div.02 ~sec/div Ray 295 HD2109 5 ma/div 5 ma/div.02 psec/div.02 isec/div

The University of Michigan * Engineering Research Institute TABLE 2.3-II EXPERIMENTAL DETERMINATION OF THE BEST "AND" DIODE Input Clamp Static Noise "And" Diode Total Noise Meas. Coi.E Diode %.Mes.. Comp. 2109 309.7. 35.16 2109 2182.9.4.25 2109 295.9.6.61 *2109 2109.55.32.38 *Best diode 75

The University of Michigan ~ Engineering Research Institute TABLE 3.2-I SECONDARY FACTORS AFFECTING NOISE E6:er-O E2 f- -I 91 - F I _ I _ - ~ LI 1E, 3.0.60.40 I = 12 ma NOISE MEASURED HERE I n E0 Total Noise Static Noise Currents 5 3.0.48.32 I = 8 ma 5 4.8.52.32 I' = 12 ma 5 3.0.60.40 I = 12 ma 5 4.8.65.40 I' = 16 ma n = number of inputs to "and" gate n-l inputs pulsed in all cases All diodes are Hughes 2109's.

APPENDICES

The University of Michigan ~ Engineering Research Institute APPENDIX A OTHER LOGIC CIRCUIT CONFIGURATIONS Two other gate configurations were considered in addition to that used in Fig. 3.2-la. The salient features of these two gate configurations and the reasons for discarding them in favor of the one of Fig. 3.2-la will be outlined below. The first gate configuration is derived by placing the input clamps at the junction of the "and-or" rather than at the input of the "and." The circuit is shown in the following figure. E2 W 1~ _I I~ _~ s~to tube E3 E El The advantage of this circuit is that it reduces the noise due to direct clamping of point (3)at point (3) rather than at point (2) as done in the circuit of Fig. 3.2-la. The reason the noise is reduced is that the static noise due to the change in the steady-state conduction across the "and" diode is eliminated completely. The main disadvantage with this method of clamping is that there is a loss of gate current I to the clamp diodes when conduction through the gate is desired. The second gate configuration considered could be called a "simplified secondary gate" where the need for the input clamp is eliminated completely. The circuit of this "simplified secondary gate" is shown in the following figure. One of the theoretical advantages of this circuit is the elinination of the clamp at point (2 In addition, the current required to drive a particular gate in this circuit is I/n initially, as it is necessary to replace the 78

The University of Michigan * Engineering Research Institute n Input "'and" gate X Transformer to tube secondaryn I/n Damping E3 diode I current flowing through the "and" diode before the pulse. After the diode has been back-biased, the only load current is the current necessary to charge the capacitance at the input. The current required to drive the particular gate shown in Fig. 532-la is 12 ma as against I/n for this case where n is -the number of "and" inputs. Thus a substantial reduction in gate drive current can be realized The disadvantage of this circuit is that there is a large amount of noise developed across the transformer secondary when all the "and" gates that the unpulsed secondary would normally pulse (x,y,z.,,) experience the worst noise situation (n-1 gates are pulsed on a particular "and" gate) The situation can be analyzed, assuming that a current of amplitude nI is impressed on the unpulsed secondary. A simplified representation of the impedance seen looking into the secondaryvof the unpulsed transformer is: L = 10 pyh C = 10 ELlf....-L R C e R = 5 K2 nI damping diode Using operational mathematics to solve for eo(t) it is found that 79

The University of Michigan ~ Engineering Research Institute 2ifK To eo(t) = - exp sin ot, CLo where K 1 and 2R aC 2Q To = 2c JLC. If the above equation is plotted, it is found that the maximum voltage developed across the equivalent R, L, C is.96 nI.96 nI noise =' = r volts n x 2 volts for I = 8 ma Experimental results show that the noise is of this order of magnitude thus justifying the abandonment of this configuration. In summarizing the disadvantages of theseconfigurations, the poor conduction of the first and noise of the second justifies the use of the gating circuit shown in Fig. 3-2-la. 80o

The University of Michigan ~ Engineering Research Institute APPENDIX B "OR-AND-OR" CIRCUIT ANALYSIS As mentioned in an earlier report, an analytical study of an "or-andor" gating structure has been made. The circuit that was studied is shown in the following figure. It was hoped that once a solution could be found that would define the operation of the circuit, it would be possible to vary the different parameters of the circuit to give optimum operation. E 1 R2 To tube RI IR3 OEl 6 E3 An approximate equivalent circuit of the above follows: rd I RD2 rd2 MAEiI RMAR3 3{RD3 iDI The analysis of the above circuit can best be done using a nodal analysis technique. The nodal equations follow.

The University of Michigan ~ Engineering Research Institute Ii(t) - I1 = (G1 + 2GD) E1 + C1 dt- GD Ez; (1) I2 - I3 = - GD E1 + (G4 + 2GD) E2 + C4 dEz (2) dt where the following assumptions and substitutions are made: (a) RD1 = RD2 = RD 1/D (b) rDl = rD2 = 0 (C) iDl = o (d) G1 = parallel combination of R1 and Rsource (e) G4 = G2 + G3 (f) C4 = C2 + C3 Now let I4 = 12- I3 Iin(t): Iin(t) -I Using the above substitutions it is found that Iin(t) = [K1 + f(t)] E2 + [K2 + g(t)] t2 + h(t)E2, where K, and K2 are constants to be evaluated. The solution for this type of equation is rather difficult to come by. Therefore, to solve the equation the assumption is made that C1 is small enough to be neglected. The new equations are now as follows: I (t) = (G + 2GD) E1 - GD E2 (3) I4 = -GD E1 + (G4 + 2%) E2 + C4 d. (4) Solving these for E2, dGE_ + 2G1 +(t)4 + D (t) (G + 2D) I4 + % F2 =E2 In Ct + 2G4 C4G1 + Ct2C4%G 82

The University of Michigan ~ Engineering Research Institute or dE (t) E f2(t) E (5) dt where G'G4 + 2G1 + 2G4 + 3GD f1(t) = (6) _~ + 2C4 GD f2(t) = Iin(t) GD + (G + 2GD4 ()I7) C4G, + 2C4GD There are several ways of solving this linear equation of the first order. The first is a solution of the following type: dy + f1(x)y = f2(x) dx y = e-fl (x)dx fE fl(x)dx f2(x)d + ce. (8 Another method for getting a solution is a numerical integration of the differential equation. The results of the two means of solution mentioned and the output from an ideal diode circuit and actual diode circuit are shown in the following figure. Due to the amount of calculations necessary for a solution the initial objective of this phase of the work was never realized, i.e., no variance of the circuit parameters was tried.

The University of Michigan Engineering Research Institute 2.4 -- 2.2 OUTPUT VOLTAGE FROM OR-ANDOR GATING PACKAGE vs TIME 2.0 I. 8 ~~ 1.6 41.8 -, I-.J 1.2 _ I-L o 1.0 v, ~~~~~~~~~~~~~~~~~~~~~~L~~~~C.8, 08 1 2 34 56 7 89 1 1 12 13 14 5 16 17 ~-.6..4.2 0 I 2 3 4 5 6 7 8 9 I0 II 12 I$ 14 15 16 17 TIME IN MILLIMICROSECONDS 84

The University of Michigan ~ Engineering Research Institute APPENDIX C SERIES RES RESISTANCE SEEN BY THE PULSED "'AND" DIODE The series resistance seen by the pulsed "'and"' diode is approximately the forward resistance of the input clamp diode. Let IBO be the reverse current of a pulsed "and" diode of an "or" input gate where all but one of the inputs are pulsed. E2 501K I 5i5K~2 [(xl l )IBo The voltage sources E1 and E2 in series with the large resistances may be replaced by current generators IS and I as the voltage at points (1) and () changes very little The reverse currents IBO of the pulsed "and" diodes can then be simulated by a current generator (m - l)IBoO If a linear approximation is made for the diode static characteristic, a complete analysis of this circuit can be performed with the aid of superposition. Assume then that the input clamp is simulated by a battery and a conductance equal to the slope of the static characteristics If we confine our interest to the step in the process of superposition associated with the (m - 1) IBO current generator, we find that it sees an impedance 2rd.. It is assumed that the internal impedance of the other current -- generators is infinite.

The University of Michigan ~ Engineering Research Institute 10 Hughes 2109 rd = 30 a 1 H / rd ~ 25 volts o4 o6 Vd The current and voltage generator are replaced by their internal impedance, and neglecting capacitance the following equivalent circuit is obtainedo rd (m-:l)IBo

The University of Michigan ~ Engineering Research Institute APPENDIX D IMPEDANCE OF THE GRID-CLAMP DIODE A detailed look at the grid-clamp diode (or input clamp) produces some conclusions about diode behavior in the circuit. As a first approximation the grid "or" diode and "and" pull-up can be replaced by a current source during the pulse. Also, it is reasonable to assume that a diode under pulse conditions can be described by its forward characteristics when going from two states of forward conduction. Consider a diode with a very poor static characteristic. If a current input I(t) is applied, the output will rise by one volt. Note the clamp diode has not been back-biased by this input. The disadvantage of a diode with the type of static characteristic shown in the figure below is that the output must be developed across the low impedance of the diode. Diode Static Characteristics id 4 ma 2 1 2 Vd volts ma eo(t) 2 volts ~t I~1(t) Po(t) -2.0 l pulsed. Consider a ramp input of current to the grid-clamp diode. The diode 87

The University of Michigan * Engineering Research Institute current and voltage wave-form are shown below. As the forward diode current is reduced, the dynamic resistance of the diode approaches infinity. This is certainly reasonable as low resistance about tl would short all input current to ground. At times tl(+) the initial reverse current is considerably greater than those measured with the Tektronics 545 (due to the limit bandwidth). The impedance after the discontinuity will be the diode end-region resistance and will increase to values in the megohm range for times much greater than tl. ma! (t) id 8 4!i1 1(t) tVd tl t2 -40.5 DIODE CURRENT AND VOLTAGE DIODE IMPEDANCE +s — -5 4 rd -Ov L-i- - V e-e + O 100 -4 -.5 t.It Vd ti tl id pedWhen across a low impedane beforhas switched ant time a, the output voltage is devel-important property of a good back-transient diode is that this impedance becomes large after a comparatively short time (15 m~sec). An equivalent circuit can be obtained for the above clamp circuit at times of low impedance. The 40.5 volt supply and 10 K resistor can be replaced by a 4 ma current source. A diode can be replaced by an equivalent nonlinear resistance 2rd. 88

The University of Michigan * Engineering Research Institute I (t) -4ma I(t) Rjt I R3 j7 r d r 4mo 69

The University of Michigan ~ Engineering Research Institute BIBLIOGRAPHY 1. We Shockley, Electrons and Holes in Semiconductors, D. Van Nostrand Co., Inc., New York, 1954. 20 W. Shockley, "Transistor Electronics," Proc. IRE, 40 (Nov., 1952), pp. 1289-1313o 3. M. Co Waltz, "On Some Transients in the Pulse Response of Point-Contact Germanium Diodes," Proc, IRE, 40 (Nov., 1952), pp. 1483-1487, 4. Ro H. Kingston, "Switching Time in Junction Diodes and Junction Transistors," Proc. IRE, 42 (Dec,, 1954), pp. 829-834. 5. Eo Lo Steele, "Charge Storage in Junction Diodes," J, Appl. Phys., 25, 7 (July, 1954), p. 916. 6. R. F. Shea, Principles of Transistor Circuitry, John Wiley and Sons, Inc., New York, 1954. 7o To Eo Firle, Recovery Time Measurements of Point-Contact Germanium Diodes, Hughes Aircraft Co. Publication, Culver City, Calif. 8. Ro G. Shulman, "Recovery Currents in Germanium p-n Junction Diodes," Jo Applo Phys., 24, 10 (Oct o, 1953), pp. 1267-1272. 9. C. G. Dorn, Back Transients in Semiconductor Diodes, NAVORD Report 4573 (NOLC Report 325), April, 1956. 10. C. B, Sharpe, "Fundamental Physical Properties of Transistors, and Pulse and Switching Applications," Summer Transistor Applicational Symposium, The University of Michigan, Ann Arbor, 1955. 11. J. LO Moll, "Large-Signal Transient Response of Junction Transistors," Proc. IRE, 42 (Dec., 1954), pp. 1773-17830 90

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