I April 1968 CONCOM'P PROJECT,IEM(ORANDUMi TO: Whom it May Concern FROMI: W. Scott GerstenbergecSIUBJECT: Corrections to Conconmp tMtemorrandum 9, "Engineering Design Report: TPDP-8/CR0iiJ Card Reafder Tnterface." Because of a conflict in I/O device addresses between thle CR0113B Card Reader and the DF-32 Dis(: on the DEC-33S, the Card Reader devi.c e addresses havee iee, n changed (as of 1 Pebruary 1968), T!he IOT assignments are now as given in the table 3bel ow. The meannings of the TOTts have not been clanged. Mn emonic New TOT 01ld TOT CRRS 01 66 31 CRRB 6702 o-r. 6742 6632. or 6672 CRSF 6741 6671 CRSA 6704 6634 CRSB 744 4 667l These clhan ges slhould be I!nar ed on Ipage 2 of your report for future referernce. On.e, ( ie: si:ld rt -a, "withi n. msec.,. O)n page 4 th.e' inputs to t.E iO ~?01. (PB24) are now M TB4(i), M;t13S )) t F'B7() (, an) d ''f, 8 (l)

THE UNIVERSITY OF MICHIGAN Memorandum 9 ENGINEERING DESIGN REPORT: PDP-8/CRO1B CARD READER INTERFACE Stephen F. Ltundstrom CONCOMP: Research in Conversational Use of Computers F.H. Westervelt, Director ORA Project 07449 supported by DEPARTMENT OF DEFENSE ADVANCED RESEARCH PROJECTS AGENCY WASHINGTON, D.C. CONTRACT NO. DA-49-083 OSA-3050 ARPA ORDER NO. 716 administered through: OFFICE OF RESEARCH ADMINISTRATION ANN ARBOR August 1967

ENGINEERING DESIGN REPORT: PDP-8/CRO1B CARD READER INTERFACE Stephen F. Lundstrom INTRODUCTION The CRO1B card reader is a standard interface option available on the Digital Equipment Corporation PDP-7 computer. This report describes the necessary additions to the standard PDP-7/CRO1B card reader interface to allow it be used as a PDP-8/CRO1B card reader interface in addition. The description of the additions is preceded by a discussion of the CRO1B characteristics of concern to a programmer. Before beginning the main discussion, a word about the origin of this project is in order. The PDP-7 in the Logic of Computers Group was originally purchased with a CRO1B card reader. After a short while, it was observed that the card reader could be used to the best advantage if it was available as an input device on the PDP-8(338). The reasons for this were threefold. First, the PDP-7 has, as standard equipment, high speed paper tape handling equipment while the PDP-8(338) does not. Nor does the PDP-8(338) configuration currently have high speed paper tape handling equipment. Second, the necessary programming support for generation of PDP-8 binary card decks was complete, while plans for corresponding PDP-7 facilities were not yet defined. Third, the plans to interface the PDP-7 to an IBM 1800, which had a card reader, were well under way. It was for these reasons that it seemed practical to consider the interface additions described below. PROGRAMMING CHARACTERISTICS The CRO1B card reader, with the interface additions, operates under the programmed I/O control on the PDP-8. The instructions available to the PDP-8 programmer and their uses are described below. -1 -

-2 -Mnemonic Symbol Operation Executed CRRS (6631) Skip on card reader ready flag. When a card is present in the card reader read station and power is on at the card reader, the next instruction is skipped. The flag is turned off during the card feed cycle before column one is read and turned back on after column 80. CRRB (6632 or Read data. This instruction ORs data from the 6672) card reader into the AC in a format specified by the previous select instruction (see below), and clears the data ready flag. CRSF (6671) Skip on card reader data flag. When the card reader data flag is set, indicating that a card column is present and ready to be read, the next instruction is skipped. This flag is connected to the program interrupt facility. CRSA (6634) Select alphanumeric. This instruction enables the reader logic to code punched data in BCD form, so that it can be presented to bits 12-17 of the AC (6-11 in PDP-8) during a CRRB command. CRSB (6674) Select binary. This instruction enables the reader logic to present the bits read from the card in binary form so that it can be transferred into the AC bits 6-17 (0-11 in PDP-8) during a CRRB command, Each column is read as a 12-bit binary number.

-3 -The execution of CRSA or CRSB also moves a new card into position at the read station. Note that CRRB must be given within 1.5 psec following setting of the data ready flag. This is because once a card has moved into the read station, it moves completely through with no delays enroute. The reader ready status can be read into the AC as part of the I/O status in the PDP-7. On the PDP-8 interface this is a flag that can be skipped on, INTERFACE ADDITIONS The standard CRO1B interface was modified through the addition of the logic required to operate the interface from the PDP-8, This consisted of the cables for the signals to and from the PDP-8 and logic for input-output transfer (IOT) address decoding and accumulator loading. The control signals were wired to the corresponding points at the PDP-7 connector points. The logic diagrams for these additions are on the following pages. The comments to the side of the logic diagrams summarize their various functions.

-4 -DEVICE rJ t[m~ R107 iDEVICE SELECTION MB4(0o E R00 MB 15 W 14 B 24 M B7(o >L K ISKSKIPIP RPRYE DT RD0 SKIP IEC PDING _ B 23 _ IpRIO7DREAD DATA a0P2_T RMIC DEVIC" E B 2R Bt 26 () SELECT TYPE82 RB4RDY A BDTRDY2 I SKIPO Bus 24 B24 RDATA IoPZ-K R it INTO Ace. MIR~b g O( 0EAD B u~ Cr 2.~ V RA9P

-5 -SELECT \/ ww R 07 SELECT CA.RD IOP4 R R1I OINT REQ 1 NT REQ INTERRUPT DATA, R,t, REQUEST READY B o26 AccuMULArO R INPUTS - -,P AC >1 J" R 2C E R123 ~CR6 {221 CR7 j- i RDAAAC3 cRs R123 C 92R R~ _3i CR 13 1CR9 R DATA _ _ ~AC 6 It~, PACft AC8 '*-AC9 CRA4 RB23 CR15 8 Ra23 RDATA

-6-, VACiO ACCUMULATOR ~CRI~6 @ 1 Ri23 C a RR123 INPUTS CDiA' 82 2 ~Ri? B22 A23 A24 A~it w021 wo02 W02o1 _2_ D DA 22 C V -- ACO 0 4 I Ac4 e.. |.4E _AC-.....-,,, AC3-iX S SkIP F AcQ, "'~t v M AC4 - INTREQ 0 P~ P q 'V/2A25.~iwO~. W02o wo2i.... 2i _ D D D ME eMil E E ___MB()N H ___ - MB3() >- - _ P P 10P4 - (06 --,,MB4(1)- -.4 -v r i T W02i WOZ1i MBe(O).' MB7(l)-~>- K YPDP- 8 M17(I) —~. ( SIGNALS MBI(o) P V V ~~t~~iQQI\PtB~f4.

19 20.2a l 24 25 27 2~ 29 30 31 3 -A o kAc AC i M M 8 p C |or r[ %- s9-L|- IN|1 i 10P Os l 0-5 |-5 / C {P N IN i IN I0Psj10FK I I -E i | f 1/0 I /0..f I.. \ 7 C (PE 2) (PE5) jCNThFL CNThL (MFr34) (MF34) (ME35) (Mt.45) P P C i MB M i N gD N R1230 Ri?8 R1o7 RoWl k 11 Rill 6-(1.60 1 1 1 / I i 8 II IIIi N P N ' r A c cc,,M ' WI)~

-8 -The connectors shown below are the standard PDP-7 interface connectors. The signals from the interface addition described above are connected to these pins. A20 WOZI W02 E P CRqf-1) CR (40 (1) CR R7(i) 820 Bt9 wazl..iELEC" EB 2 (BIR1) PF CiCi) K _ CR ) R 1 () U1 ^ CR443 (1) CRi5 (l) V _ CF; rA7 (i) C fR 17 ' B19 0 E K SELECT M Mfie2 (B1INARY) V _49b RrR RL A