T E E U N I V E R S I T Y O F M I C H I G A N Memorandum PDP-8/103A DATAPHONE INTERFACE Stephen F. Lundstrom CONCOMP: Research in Conversational Use of Computers ORA Project 07449 F. H. Westervelt, Director supported by: DEPARTMENT OF DEFENSE ADVANCED RESEARCH PROJECTS AGENCY WASHINGTON, D.C. CONTRACT NO. DA-49-083 OSA-3050 ARPA ORDER NO. 716 administered through: OFFICE OF RESEARCH ADMINISTRATION ANN ARBOR November 1966

ABSTRACT The Concomp Project's DEC 338 Display system is now interfaced to two Bell System 103A Dataphones. This memorandum describes the use of the system as well as the interface construction. ii

I o GENERAL DISCUSSION The interface to the 103A Dataphones required only minimum hardware additions. It involved the use of the teletype control built into the PDP-8, Figure 1 shows the standard system configuration. C 0 ASR 33 W70 TN PDP-8 T T TTY!J Y R TTY CONNECTOR L Figure 1. Standard PDP-8 TTY I/O Configuration. Figure 2, below, shows the additions to the above basic system. 103A --- EIA I EIA 103A Dataphone INTERFACE INTERFACE Dataphone 0 TTY ' = |aW070 _ 1 ASR 33 W070... 021 T TTY Y Figure 2. Modified PDP-8 TTY I/O Configuration.

Notice that the console typewriter is now essentially an independent console since it is connected to its own dataphone. In particular, it may be connected to the PDP-8 to operate as a normal online teletype with one exception: the tape reader on the ASR 33 will advance as long as there is tape in the reader (similar to handling tape in the reader during interrupt control of the normal online configuriati,;!o II. PROGRAMMING CONSIDERATIONS The new system is programmed using the standard PDP-8 IOT Instructions for teletype I/O (see the PDP-8 User's Handbook). The programmer should note the comment above concerning the independence of tape advance from the TTY reader flago Also, the programmer should note that many standard Bell System teletypes automatically generat._ a parity bit which appears as the high order bit of the 8-bit character code. In such cases, there will be no guarantee that the high order bit is set during input from the keyboard as is the case with the ASR 33 supplied with the PDP-8. IIIo SYSTEMS CONSIDERATIONS The new PDP-8 I/O configuration allows a wider degree of flexibility in the integration of the 338 Display into The University of Michigam timeshared system. Both the teletype and the PDP-8 may be connected to the U of M Computing Center's IBM System 360 through standard teletype input ports. Thus, both the teletype and the PDP-8 may take direct advantage of System 360 programming support of typewriter terminals such

as device control, symbolic file storage and editing, assembly or compilation of symbolic file, or data transmission control, and may be particularly useful when the additional interface to the Bell System 201A Dataphone is provided. This device is a higher speed device than the 103A Dataphoneo However, the 201A Dataphone can communicate in only one direction at a time (half-duplex) rather than two directions at a time (full-duplex) as can the 103A Dataphone. Thus, if the slow speed 103A Dataphone lines are used only for control communication, the 201A Dataphone line would handle only data, resulting in a higher effective data transmission rate. IV. INTERFACE HARDWARE The interface used in the modification described here was developed by David L. Mills and will be described in forthcoming publications on the data concentrator. It is included herein for completeness. The interface was wired onto a spare section of the 338 Display's Rand Tablet interface Figure 3 is the logic diagram of the PDP-8 TTY I/O modifications. The module marked "E1A RCVR" in Figure 3 was made by modifying a standard R111 Diode Gate as shown in Figure 4. The modified module is less expensive than either of the special purpose Input Converter modules (W510, W511) and is more resistant to overloads. Figure 5 is the actual module layout used. Table 1 is the wire listo 3

TELETYPE INTERFACE W070 TELETYPE DATA CONNECTOR- r SET 1 H W0o5'.-TPrint Mag. Lamp PIN Driver DriverA-E E1A BB 3 R _llIRCVR DAT -'/E1A D-AT El BA 2 - 6V +1OV CD 20 IC SIGAB 7 GND 'O AA 1 GND W021 MAINFRAME DATA CONNECTOR l MAINFRAME INTERFACE SET 2 ASSOCII2AT2ED Dl M-Rll E RCV IBB iu JAT E S '- — t --- — - --— <-~' E1A t | 3DATA -doo H; I-Wb~z0TD XMT Lamp --- E1A _ _ BA 2 Driver DRIVER DATA K +- 6V +O 1V — CD 20 C S A R AB 7 GND GNL Figure 3. PDP-8 Mainframe and Teletype Interfaces for 103A Data SetsF

STANDARD Rll -15V 7. 5K IN3606 (2)IN645 2N3639 H EE => OUT IN3606 IN3606 - 15K +3V +10V -15V This schematic, copyright 1965, is provided by Digital Equipment Corpora-ion only for test and maintenance pur~-.:cs, The circuits are proprietary in nature and should be treated accordingly. -15V MODIFIED Rill 7.5K (2)IN645 2N3639 E 3 3K O -.UT IN j IN3606 107 lOK l00K D IN3606 -15V +10V -3V Figure 4o Rlll Modifications for Use as E1A Receiver. 5

29 30 31 32 W070 W050 M-Rill W021 To LAMP Data TTY EA Set DRIVER A CONN. RCVR 1 W021 W602 Rill W021 To NNFRM> ElA Data MNFRM. E1A Set CONN. DRVR 2 Figure 5. 103A Dataphone Interface Module Layout.

Table 1. Wire List From To A32E A31E A31H A31J A31J B31D B31H B31J B31H A30E A30F A29H A29D B30D B3OF A32D A32K A32A B30S B30P B30V B30R B29D A31P A31N A31P A31L B32E B32K B32A A31D A31C A31K A32C A29M A29C B29H B30H B31V B30H B30K B32D