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Analysis of multiple-bus interconnection networks

dc.contributor.authorMudge, Trevor N.en_US
dc.contributor.authorHayes, John P. (John Patrick)en_US
dc.contributor.authorBuzzard, Gregory D.en_US
dc.contributor.authorWinsor, Donald Charles.en_US
dc.date.accessioned2006-04-07T19:39:15Z
dc.date.available2006-04-07T19:39:15Z
dc.date.issued1986-09en_US
dc.identifier.citationMudge, T. N., Hayes, J. P., Buzzard, G. D., Winsor, D. C. (1986/09)."Analysis of multiple-bus interconnection networks." Journal of Parallel and Distributed Computing 3(3): 328-343. <http://hdl.handle.net/2027.42/26398>en_US
dc.identifier.urihttp://www.sciencedirect.com/science/article/B6WKJ-4BRJJHD-91/2/c4c3ab8915ba16cdcbf5b15f1489e06ben_US
dc.identifier.urihttps://hdl.handle.net/2027.42/26398
dc.description.abstractThe performance of multiple-bus interconnection networks for multiprocessor systems is analyzed, taking into account conflict arising from memory and bus interference. A discrete stochastic model of bandwidth is presented for systems in which each memory is connected either to all the buses or to a subset of the available buses. The effects of the assumptions made concerning independence among requests for different memories (spatial independence) and resubmission of blocked requests (temporal independence) are investigated systematically. The basic bandwidth model is extended to account for spatial dependence, and compared to previously proposed models. Finally, the various analytic models are shown to be in close agreement with simulation results.en_US
dc.format.extent755247 bytes
dc.format.extent3118 bytes
dc.format.mimetypeapplication/pdf
dc.format.mimetypetext/plain
dc.language.isoen_US
dc.publisherElsevieren_US
dc.titleAnalysis of multiple-bus interconnection networksen_US
dc.typeArticleen_US
dc.rights.robotsIndexNoFollowen_US
dc.subject.hlbsecondlevelPhilosophyen_US
dc.subject.hlbsecondlevelComputer Scienceen_US
dc.subject.hlbtoplevelHumanitiesen_US
dc.subject.hlbtoplevelEngineeringen_US
dc.description.peerreviewedPeer Revieweden_US
dc.contributor.affiliationumAdvanced Computer Architecture Laboratory, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan 48109-1109, USAen_US
dc.contributor.affiliationumAdvanced Computer Architecture Laboratory, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan 48109-1109, USAen_US
dc.contributor.affiliationumAdvanced Computer Architecture Laboratory, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan 48109-1109, USAen_US
dc.contributor.affiliationumAdvanced Computer Architecture Laboratory, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan 48109-1109, USAen_US
dc.description.bitstreamurlhttp://deepblue.lib.umich.edu/bitstream/2027.42/26398/1/0000485.pdfen_US
dc.identifier.doihttp://dx.doi.org/10.1016/0743-7315(86)90019-5en_US
dc.identifier.sourceJournal of Parallel and Distributed Computingen_US
dc.owningcollnameInterdisciplinary and Peer-Reviewed


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