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A survey of DA techniques for PLD and FPGA based systems

dc.contributor.authorVenkateswaran, R.en_US
dc.contributor.authorMazumder, Pinakien_US
dc.date.accessioned2006-04-10T17:46:31Z
dc.date.available2006-04-10T17:46:31Z
dc.date.issued1994-11en_US
dc.identifier.citationVenkateswaran, R., Mazumder, P. (1994/11)."A survey of DA techniques for PLD and FPGA based systems." Integration, the VLSI Journal 17(3): 191-240. <http://hdl.handle.net/2027.42/31206>en_US
dc.identifier.urihttp://www.sciencedirect.com/science/article/B6V1M-47XG93C-25/2/1187dad41be8e2336e3053014a4004c9en_US
dc.identifier.urihttps://hdl.handle.net/2027.42/31206
dc.description.abstractProgrammable logic devices (PLDs) are gaining in acceptance, of late, for designing systems of all complexities ranging from glue logic to special purpose parallel machines. Higher densities and integration levels are made possible by the new breed of complex PLDs and FPGAs. The added complexities of these devices make automatic computer aided tools indispensable for achieving good performance and a high usable gate-count. In this article, we attempt to present in an unified manner, the different tools and their underlying algorithms using an example of a vending machine controller as an illustrative example. Topics covered include logic synthesis for PLDs and FPGAs along with an in-depth survey of important technology mapping, partitioning and place and route algorithms for different FPGA architectures.en_US
dc.format.extent3147285 bytes
dc.format.extent3118 bytes
dc.format.mimetypeapplication/pdf
dc.format.mimetypetext/plain
dc.language.isoen_US
dc.publisherElsevieren_US
dc.titleA survey of DA techniques for PLD and FPGA based systemsen_US
dc.typeArticleen_US
dc.rights.robotsIndexNoFollowen_US
dc.subject.hlbsecondlevelElectrical Engineeringen_US
dc.subject.hlbtoplevelEngineeringen_US
dc.description.peerreviewedPeer Revieweden_US
dc.contributor.affiliationumDepartment of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI 48109-2122, USAen_US
dc.contributor.affiliationumDepartment of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI 48109-2122, USAen_US
dc.description.bitstreamurlhttp://deepblue.lib.umich.edu/bitstream/2027.42/31206/1/0000108.pdfen_US
dc.identifier.doihttp://dx.doi.org/10.1016/0167-9260(94)90001-9en_US
dc.identifier.sourceIntegration, the VLSI Journalen_US
dc.owningcollnameInterdisciplinary and Peer-Reviewed


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