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On-Line Monitor Design of Finite-State Machines

dc.contributor.authorGao, Fengen_US
dc.contributor.authorHayes, John P. (John Patrick)en_US
dc.date.accessioned2006-09-08T20:58:13Z
dc.date.available2006-09-08T20:58:13Z
dc.date.issued2003-10en_US
dc.identifier.citationGao, Feng; Hayes, John P.; (2003). "On-Line Monitor Design of Finite-State Machines." Journal of Electronic Testing 19(5): 537-548. <http://hdl.handle.net/2027.42/43011>en_US
dc.identifier.issn0923-8174en_US
dc.identifier.issn1573-0727en_US
dc.identifier.urihttps://hdl.handle.net/2027.42/43011
dc.description.abstractOn-line monitoring is a useful technique for ensuring system reliability. By continuously supervising the system's operation, a wide range of problems, such as physical defects, transient faults and design errors, can be detected. A monitor M *'s behavior can be viewed as an abstraction of the target system M 's behavior, and can be represented by a homomorphic mapping from M to M *. We present a systematic procedure to select homomorphisms for monitor design and measure their costs based on a behavioral fault model. Analysis of the method shows that monitors with very few states and low area can provide high fault coverage. Experimental results are presented which quantify the basic trade-off between area overhead and fault coverage. Simulation results under the industry-standard single stuck-at fault model are also reported.en_US
dc.format.extent182221 bytes
dc.format.extent3115 bytes
dc.format.mimetypeapplication/pdf
dc.format.mimetypetext/plain
dc.language.isoen_US
dc.publisherKluwer Academic Publishers; Springer Science+Business Mediaen_US
dc.subject.otherEngineeringen_US
dc.subject.otherComputer-Aided Engineering (CAD, CAE) and Designen_US
dc.subject.otherElectronic and Computer Engineeringen_US
dc.subject.otherCircuits and Systemsen_US
dc.subject.otherOn-line Monitoringen_US
dc.subject.otherHomomorphismen_US
dc.subject.otherFinite-state Machineen_US
dc.titleOn-Line Monitor Design of Finite-State Machinesen_US
dc.typeArticleen_US
dc.subject.hlbsecondlevelElectrical Engineeringen_US
dc.subject.hlbtoplevelEngineeringen_US
dc.description.peerreviewedPeer Revieweden_US
dc.contributor.affiliationumAdvanced Computer Architecture Lab., University of Michigan, Ann Arbor, MI, 48109, USAen_US
dc.contributor.affiliationumAdvanced Computer Architecture Lab., University of Michigan, Ann Arbor, MI, 48109, USAen_US
dc.contributor.affiliationumcampusAnn Arboren_US
dc.description.bitstreamurlhttp://deepblue.lib.umich.edu/bitstream/2027.42/43011/1/10836_2004_Article_5142580.pdfen_US
dc.identifier.doihttp://dx.doi.org/10.1023/A:1025173913889en_US
dc.identifier.sourceJournal of Electronic Testingen_US
dc.owningcollnameInterdisciplinary and Peer-Reviewed


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