?:L- TI/ Distributed MEMS Transmission Lines by Nicolas Scott Barker A dissertation submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy (Electrical Engineering) in The University of Michigan 1999 Doctoral Committee: Professor Gabriel M. Rebeiz, Chair Professor John W. Halloran Professor Linda P. B. Katehi Assistant Professor Clark T. C. Nguyen Associate Professor Kamal Sarabandi RL-991 = RL-991

~ Nicolas Scott Barker 1999 All Rights Reserved

To my family. ii

ACKNOWLEDGEMENTS I would like to thank my advisor, Professor Gabriel Rebeiz, for allowing me to continue with this thesis topic, even after 6 months of nearly no progress. His encouragement and insight were extremely valuable throughout my graduate career. I would also like to thank Professors John Halloran, Linda Katehi, Clark Nguyen, and Kamal Sarabandi for taking the time to serve on my dissertation committee. I would like to thank Frank Rucky, formerly at the Naval Surface Warfare Center, and Dr. Jim Harvey, at; the Army Research Office, for their support of this research and of graduate education which is not always the most efficient means of conducting research. This research would not have been possible without the support of numerous graduate students. I am indebted to former TICS students Dr. Thomas Budka, Dr. Stephen Robertson, Dr. Chen-Yu Chi and Professor Sanjay Raman for introducing me to microwave circuit fabrication, measurement, and tribal knowledge some of which I hope I have been able to pass on. I am deeply indebted to Dr. Andrew Brown for introducing me to an alternative fabrication process which led to a breakthrough in my research:; in addition to his constant support and friendship. I also enjoyed the friendship of former TICS students Dr. Rashaunda Henderson, Professor John Papapolymerou, and Dr. Gildas Gauthier. I would like to thank current TICS students Thomas Ellis, Sergio Pacheco, J. D. Shumpert, Leo DiDomenico, and Katherine Herrick for their invaluable support and friendship. I have also enjoyed getting to know the newer TICS students Jeremy Muldavin, Joe Hayden, Guan-Leng Tan, Lee Harle, Tom Schwartz, and Bill Chappell. There are many many more people that helped along the way in numerous ways but there are a few who are essential for maintaining the day to day operation of the lab. Thus, I would like to express my sincere thanks to the Radiation Laboratory staff, specifically iii

Carol Truszkowski and Sharon Ryder, as well as the Solid State Electronics Laboratory staff. Finally, I would like to thank my family. My parents, Bill Barker and Dorothy Barker, encouraged me at every step and never doubted my ability to complete the task I had set for myself. All of my brothers and sisters provided much needed support even though they could not be right here with me. In addition, my church family at First United Methodist Church was a tremendous support week in and week out throughout my entire stay in Ann Arbor. But most importantly, I would like to express my deepest gratitude for my wife Susan who provided understanding and loving support when I needed it most. iv

TABLE OF CONTENTS DEDICATION...................................... ii ACKNOWLEDGEMENTS.............................. iii LIST OF TABLES................................... vii LIST OF FIGU RES.................................. viii LIST OF APPENDICES................................xiv CHAPTERS 1 Introduction.................................. 1 2 Mechanical Properties of Fixed-Fixed Beams................. 7 2.1 Spring Constant............................. 7 2.2 Electrostatic Actuation......................... 14 2.3 Stabilization of Electrostatically Actuated Bridges.......... 19 2.4 Frequency Response........................... 23 2.5 Brownian Noise Analysis........................ 24 3 Distributed MEMS Transmission Lines.................... 27 3.1 Fabrication of the DMTL.............................. 28 3.2 Analytic Modeling of Distributed Lines.................... 30 3.3 Loss on Distributed Lines.............................. 33 3.4 DMTL Circuit Modeling.............................. 36 3.5 DMTL Measurements..................................... 37 3.6 Comparison of Analytic and Circuit Model................. 45 3.7 C onclusion................................ 47 4 Distributed MEMS Transmission Line Phase Shifters................ 49 4.1 D esign.................................. 50 4.2 O ptim ization.............................. 55 4.2.1 T heory.............................. 55 4.2.2 Experim ent........................... 64 4.3 W-Band DMTL Phase Shifter..................... 69 4.4 Stabilized DMTL Phase Shifter.................... 78 v

5 Applications of Distributed MEMS Transmission Lines............. 81 5.1 Reflective Switches................................ 81 5.1.1 Design and Measurements..................... 83 5.1.2 Switching Speed.......................... 87 5.2 Phase Modulators................................... 94 5.3 Phase Verniers.............................. 103 5.4 Power Handling Measurement..................... 103 6 Conclusions and Future Work......................... 105 6.1 Very Low Loss Phase Shifters..................... 105 6.2 Wideband Switches........................... 106 6.3 Modulators.............................. 107 6.4 Development of High-Q Varactors.................. 108 A PPEN D ICES...................................... 109 BIBLIOGRAPHY...........................128 vi

LIST OF TABLES Table 2.1 Dimensions of bridges used in Figure 2.7........................ 15 2.2 Quality factors for bridges in Figure 2.16....................... 24 2.3 Low-frequency rms Brownian-noise position values for the bridges used in Figure 2.16 in A/X/Hz.................................... 26 3.1 Bragg Frequency Calculations from (3.8) and (3.12)................ 33 3.2 Fitted Model Parameters for DMTL with w/'s = 30/306 /m.......... 40 3.3 Fitted Model Parameters for DMTL with w/'s = 60/640 pm............. 43 3.4 DMTL parameters for Figure 3.14.................................. 47 3.5 DMTL parameters for Figure 3.15.................................. 47 4.1 Modeling parameters for DMTL in Figure 4.1.................... 51 4.2 Specifications for examples in Figures 4.3-4.7.......................... 55 4.3 Specifications of the DMTLs used to verify the optimization procedure... 64 4.4 Dimensions of the DMTLs used to verify the optimization. The Bragg frequency is calculated using Lb = 20 pH. Rb = 0.15 Q at 30 GHz........... 64 4.5 Circuit model parameters for the optimal DMTL (W = 100 Atm)......... 66 4.6 Calculated design of an optimized W-band DMTL phase shifter on quartz. 74 4.7 Dimensions for the optimized W-band DMTL phase shifter.......... 74 4.8 Circuit model parameters for the W-band DMTL phase shifter....... 74 4.9 Circuit model parameters for the optimal DMTL with integrated capacitors. 80 5.1 Parameters of the gold bridge used in the calculation of Figure 5.9..... 91 5.2 Measured and modeled switching speed in /Is (Q = 2.3)............... 94 5.3 Calculated switching speeds, in /is, from the numerical solution for varying Q values............................................... 94 5.4 Measured, theoretical, and modeled RF spectrum of the BPSK signal in dBc. 99 5.5 Parameters of the gold bridge used in the calculation of Figure 5.15. 99 5.6 Parameters of the gold bridge used in the calculation of Figure 5.17.. 101 D.1 PECVD SixNy recipe [42]............................ 124 D.2 PECVD SiXNy reactive ion etching (RIE) recipe...................... 125 vii

LIST OF FIGURES Figure 1.1 Cantilever MEMS bridge in a series configuration along a microstrip or CPW transmission line........................................ 2 1.2 Circuit model for a series capacitive MEMS switch with the capacitance switching from 20 fF to 2 pF.................................. 2 1.3 Circuit simulation of series switch using the model in Figure 1.2....... 2 1.4 Fixed-fixed beam MEMS bridge in shunt configuration over a CPW transmission line..................................... 3 1.5 Circuit model for a shunt capacitive MEMS switch with the capacitance switching from 35 fF to 3.5 pF............................. 3 1.6 Circuit simulation of a shunt switch using the model in Figure 1.5...... 3 1.7 Top view of a CPW line periodically loaded by shunt MEMS bridges... 5 2.1 Fixed-fixed beam with concentrated vertical load P............. 7 2.2 Fixed-fixed beam over a CPW line with the force, P = /l/3, evenly distributed above the CPW center conductor.................... 9 2.3 Beam modeled as a stretched wire with concentrated vertical load P..... 10 2.4 Spring constant of a gold bridge (E = 80 GPa, v = 0.42) with lengths of 200,m ( —) and 400 p/m (- -). For each bridge length the spring constant is evaluated for biaxial residual stresses of 0, 50, and 100 MPa. The spring constant scales linearly with the bridge width which is held constant at 35,m. 12 2.5 Spring constant of an aluminum bridge (E = 69 GPa, v = 0.33) with lengths of 200 unm (-) and 400 /,m (- -). For each bridge length the spring constant is evaluated for biaxial residual stresses of 0, 50, and 100 MPa. The spring constant scales linearly with the bridge width which is held constant at 35 /tm. 12 2.6 Critical stress of a (a) gold (E = 80 GPa, v = 0.42) and (b) aluminum (E = 69 GPa, vL = 0.33) bridge vs. thickness for 200 /tm (-) and 400 /zm (-) long bridges..................................... 13 2.7 Bridge height versus applied voltage with a zero-bias bridge height of 1.2 /Im and 3 /zm. The bridge parameters, given in Table 2.1, are chosen to result in a pull-down voltage of 22 V............................ 14 viii

2.8 Pull-down voltage of a (a) gold (E = 80 GPa, v = 0.42) and (b) aluminum (E = 69 MPa, v = 0.33) bridge vs. bridge thickness for 200 pm (-) and 400 /pm (- -) long bridges. For each bridge length the pull-down voltage is calculated for biaxial residual stresses of 0, 50, and 100 MPa. The pull-down voltage depends on the bridge height as3/2 and go is 1.5 /mn......... 17 2.9 Pull-down voltage of a (a) gold (E = 80 GPa, iv = 0.42) and (b) aluminum (E = 69 MPa, v = 0.33) bridge vs. bridge height for 200 pzm (-) and 400 pm (- -) long bridges. For each bridge length the pull-down voltage is calculated for biaxial residual stresses of 0, 50, and 100 MPa. The pull-down voltage 3/2 depends on the bridge height as go and go is 1.5 p/m............. 17 2.10 Variation of bridge capacitance and gap height with applied voltage. The bridge parameters have been adjusted to result in a pull-down voltage of 22 V, a zero-bias bridge capacitance of 20 fF, and a zero-bias height of 1.2 Pm. 18 2.11 Derivative of the bridge capacitance (-) and bridge height (- -), with respect to the applied voltage, vs. the applied voltage. The bridge parameters have been adjusted to result in a pull-down voltage of 22 V.............. 18 2.12 Stabilization of an electrostatically actuated MEMS bridge through the use of a series feedback capacitor................................. 19 2.13 Plot of change in bridge height versus applied voltage as the series feedback capacitor is varied from 0.5Cbo to oo. The zero-bias bridge height is 1.2 P/m. 20 2.14 Stabilization of an electrostatically actuated MEMS bridge, in the presence of significant fringing capacitance, through the use of a series feedback capacitor. 21 2.15 Plot of the change in bridge height versus applied voltage as the series feedback capacitor is varied from 0.5Cbo to oc with a fringing capacitance of Cf = Cb(/3. The zero-bias bridge height is 1.2 m...................... 22 2.16 Frequency response of a (a) gold (E = 80 GPa, v = 0.42, p = 19320 kg/m3) and (b) aluminum (E = 69 MPa, i = 0.33, p = 2700 kg/mn3) bridge for 200 pm ( —) and 400 pm (- -) long bridges over a CPW line with W = 1/3. For each bridge length the response is calculated for bridge heights of 1, 2, and 3 p/m. The width is 35 p/m, the thickness is 1.5 pm, and the residual stress is 50 MPa................................................ 25 3.1 Layout of a DMTL constructed of a CPW line with center conductor width W and total CPW width W+2G, and MEMS bridges with width w and spacing s. The DMTL is connected to 50 Q feedlines and probe pads for testing....................................................... 28 3.2 Details of the fabrication process for the MEMS bridges. The illustrations show a cross-sectional view of a DMTL......................... 29 3.3 General model for a periodically loaded transmission line with series impedance Zs and shunt admittance Yp.......................................30 3.4 Lumped element transmission-line model of the DMTL assuming the MEMS bridge can be represented by a capacitor Cb. Lt and Ct are the per unit length inductance and capacitance, respectively, of the unloaded transmission line, and s is the spacing between the MEMS bridges................... 32 ix

3.5 Circuit model used for a section in the DMTL simulation where Zo is the unloaded line impedance, s is the periodic spacing of the MEMS bridges, A is the attenuation in dB/cm of the unloaded line, 6eff is the effective dielectric constant of the unloaded line, Cb is the MEMS bridge capacitance, and Lb is the bridge inductance............................................ 37 3.6 Measured loss of a 96 Q CPW line (with a 5000 A thick center conductor) and a 61 Q distributed MEMS transmission line. The loss is backed out of TRL calibration data. The estimated loss is computed from the CPW line loss by multiplying it by a factor of 96/60 = 1.6...................... 38 3.7 Measured effective dielectric constant of a 96 Q CPW line and a 61 Q DMTL. 38 3.8 Measured and simulated S-parameters of a DMTL with 16 30-pm wide MEMS bridges spaced at 306 pm (total length = 5.2 mm, Z = 61 Q, fB = 129 GHz). 40 3.9 Measured Sll from 0-60 GHz for a DMTL with 16 30-pm wide bridges spaced at 306 pm.............................................. 41 3.10 Measured Sll from 0-60 GHz for a DMTL with 16 30-pm wide bridges spaced at 306 /m with the 138 pm long high-impedance lines de-embedded..... 41 3.11 Measured and simulated S-parameters of a DMTL with 16 60-/Lm wide MEMS bridges spaced at 640 /pm (total length = 10.8 mm, Z = 62 Q, fB:= 62 GHz). 43 3.12 Measured Sll from 0-60 GHz for a DMTL with 16 60-pm wide bridges spaced at 640 pm.............................................. 44 3.13 Measured Sll from 0-60 GHz for a DMTL with 16-60 pm wide bridges spaced at 640 pm with the 290 pm high impedance lines de-embedded........... 44 3.14 Comparison between the circuit model and analytical model for the DMTL with parameters listed in Table 3.4.................................. 46 3.15 Comparison between the circuit model and analytical model for the DMTL with parameters listed in Table 3.5.................................. 48 4.1 Measured,(a) phase shift and (b) S-parameters for a DMTL with 32 30-pmwide bridges spaced at 306 /pm (total length = 10.1 mm) for varying bias voltage. The phase shift at 22 V is modeled with the circuit parameters given in Table 4.1..................................... 52 4.2 Capacitance ratio versus maximum reflection coefficient for unloaded-line impedances of 80, 100, and 120 Q.............................. 54 4.3 Calculated phase shift per centimeter vs. the CPW center conductor width at 40 GHz for (a) silicon, (b) quartz, and (c) air with a capacitance ratio of Cr = 1.2. The total CPW width is Ad/8 and Ad/5, at 60 GHz, for each substrate, and the Bragg frequency is set to 120 GHz. The impedance for the corresponding center conductor width is given at the top of each plot.. 57 4.4 Measured and calculated loss vs. frequency for a 300 pm total width unloaded CPW line on quartz with a 100 pm wide center conductor (Zo = 100 Q)... 58 4.5 Calculated loss for the unloaded and loaded transmission lines at 40 GHz vs. CPW center conductor width for (a) silicon, (b) quartz, and (c) air substrates. The total CPW width is Ad/8 and Ad/5, at 60 GHz, for each substrate, and the Bragg frequency is set to 120 GHz................ 59 x

4.6 Loaded transmission line loss and loss due to bridge resistance vs. frequency. The line loss is calculated from Hoffmann's equation for a 300,m total width CPW line with a 100 pm width center conductor. The Bragg frequency is 120 GHz, the bridge spacing is 197 um and the bridge capacitance is 34.6 fF. 61 4.7 Calculated phase shift per dB loss at 40 GHz vs. CPW center conductor width for (a) silicon, (b) quartz, and (c) air substrates with a capacitance ratio of Cr = 1.2. The total CPW width is A/,/8 and Ad/5 for each substrate and the Bragg frequency is set to 120 GHz........................ 62 4.8 Calculated phase shift per dB loss at 40 GHz versus center conductor width for a 300 p/m total width CPW line on quartz. The capacitance ratio is varied from 1.2 to 1.5 with a loaded impedance of 48 Q and a Bragg frequency of 120 G Hz........................................ 63 4.9 Unloaded (-) and loaded ( — -) line loss at 40 GHz. The calculated loaded line loss has been increased by a factor of 1.4 and 1.8, however, it is seen that the factor of 1.8 fits the measured loss best. The impedances for the labeled widths are included for reference........................... 65 4.10 Calculated phase shift per dB loss at 40 GHz with capacitance ratios of 1.17, 1.3, and 1.5. Measured data points (x) are included for CPW center conductor widths of 50, 100, and 150 m............................. 65 4.11 Measured and modeled S-parameters of the W = 100 /um DMTL with 38 bridges (total length= 7.6 mm) at (a) 0 V and (b) a maximum applied bias of 13 V........................................ 67 4.12 Measured and modeled phase shift of the W = 100 /tm DMTL at 13 V... 68 4.13 Measured and modeled phase shift per dB loss for the W = 100,/m DMTL showing 90~/dB at 60 GHz or 4 dB loss for 360~ phase shift............... 68 4.14 Loaded transmission line loss and loss due to bridge resistance vs. frequency. The line loss is calculated from Hoffmann's equation for a 300 /Lm total width CPW line with a 100 p/m width center conductor. The Bragg frequency is 180 GHz, the bridge spacing is 110 im and the bridge capacitance is 20.7 fF. 70 4.15 Phase shift per dB loss calculated from a Libra circuit simulation of a 32 bridge DMTL on quartz with a capacitance ratio of 1.17 and different bridge resistances specified at 30 GHz and varying as...................... 70 4.16 Calculated phase shift per dB loss versus center conductor width at 100 GHz for a bridge resistances of (a) 0.15 Q at 30 GHz and (b) 0 Q. The total CPW width is Ad/5 at 100 GHz for each substrate which is 180 /im, 300 p/m, and 600 mrn for silicon, quartz, and air, respectively. The loaded impedance is 48 Q, the capacitance ratio is 1.2, and the Bragg frequency is 240 GHz... 72 4.17 Calculated effective dielectric constant for W-band DMTL's versus center conductor width. The relative dielectric constant of silicon (11.9) and quartz (3.78) are shown for reference.............................. 73 4.18 Calculated loss at 100 GHz versus center conductor width. The CPW line loss (-) includes radiation loss while the DMTL line neglects radiation but includes loss due to a 0.15 Q bridge resistance at 30 GHz (0.27 Q at 100 GHz). 73 xi

4.19 Measured (2-40 GHz and 75-110 GHz) and modeled S-parameters at (a) 0 V bias and (b) a maximum bias of 26 V for a W-band DMTL phase shifter. The dimensions are listed in Table 4.7 and the circuit parameters are listed in Table 4.8.................................... 75 4.20 Measured and modeled phase shift per dB loss at a maximum bias of 26 V for a W-band DMTL phase shifter. The dimensions are listed in Table 4.7 and the circuit parameters are listed in Table 4.8.................... 76 4.21 Calculated phase shift per dB loss at 100 GHz with a capacitance ratio of 1.15, 1.3, and 1.5. The measured data point is shown for a center conductor width of 100,m........................................ 76 4.22 Measured loss of a 96 Q CPW (W = 100 /nm) and DMTL line. The estimated loss, calculated from (3.20) uses the measured CPW loss to calculate R,. A bridge resistance of 0.15 Q at 30 GHz is also included in the estimate..... 77 4.23 Optimized DMTL design with integrated capacitors for stabilization of MEMS bridges....................................... 79 4.24 Reduced DC circuit of Figure 4.23 with integrated capacitors, Cs, at both ends of the DMTL..................................... 79 4.25 Optimized 16 bridge DMTL with 1.9 pF integrated series capacitors for stabilization with (a) 0 V and (b) 40 V applied bias................. 80 5.1 Measured results of distributed MEMS switches with 8 and 16 30 —/um wide bridges spaced at 306,m in the (a) open position (bridge up) and (b) closed position. The S-parameters for the open position are only shown for the case of the 8 bridge design............................. 82 5.2 Measured and modeled results for a distributed MEMS switch with 16 60-/Lm wide bridges spaced at 400 um in the (a) open position (bridge up) and (b) closed position........................................... 84 5.3 SEM image of the remains of a DMTL after the breakdown voltage of the SixNy was exceeded............................85 5.4 Variation of lower cutoff frequency with different number of sections used in the distributed switch design.................................. 86 5.5 Driver circuit used to provide a 0 to 33 V step to the bias line of the DMTL. 87 5.6 Experimental setup of the switching speed measurement................ 88 5.7 Switching speed measurement of a 16 bridge DMTL with a bridge width and spacing of 25 /im and 110,um, respectively. The bridge height is approximately 0.9,um and the pull-down voltage is 6 V................... 89 5.8 Switching speed measurements of a 16 bridge DMTL with a bridge width and spacing of 25 /,m and 110 /im, respectively. The bridge height is 1.5 /im and the pull-down voltage is 21 V.............................. 90 5.9 Numerical solution of the switching speed for step voltages of (a) 33 V, (b) 28 V, and (c) 23 V for a gold bridge with parameters given in Table 5.1... 92 5.10 Measured S-parameters of the 96 bridge DMTL at a maximum bias voltage of 6 V. The DMTL is based on the optimized design of Section 4.2.2, although the bridge height is approximately 0.9 /im, rather than 1.2,/m, due to excessive residual stress within the bridges.................. 96 5.11 Measured phase shift of the 96 bridge DMTL based on the optimized design of Section 4..2............................... 96 xii

5.12 Experimental setup for the heterodyne measurement of the DMTL as a BPSK m odulator............................................ 97 5.13 Measured output of the DMTL as a BPSK modulator with a modulation rate of 1 kHz. The RF is at 35 GHz and is mixed down to 10 kHz as shown here. Phase changes can be observed at 0.32 p/s and 0.87 /s................ 98 5.14 Measured RF spectrum of the DMTL as a BPSK modulator with a modulation rate of 1 kHz. The carrier, with no modulation, was measured to be -14.7 dBm............................................ 99 5.15 Numerical simulation of bridge movement under 6 V 1 kHz square wave m odulation..................................... 1..... 00 5.16 Numerical simulation of bridge movement under 6 V 10 kHz square wave modulation............................................ 100 5.17 Numerical simulation of bridge movement under 60 V 50 kHz square wave modulation for a bridge with dimensions listed in Table 5.17......... 101 5.18 DMTL lines measured as phase verniers at 40 GHz. All three lines have 30 pm wide bridges spaced at 306 p/m with the number of bridges shown in the plot. The insertion loss is 0.51/0.75/1.57 dB for the 8/16/32 bridge DM TLs..................................................... 103 B.1 (a) Monopulse radar receiver with (b) a standard monopulse processor using 0~/90~ 3 dB couplers....................................113 B.2 Example of a planar RF monopulse processor using using 0~/90~ 3 dB couplers with 90~ delay lines. The output labeled T is terminated in a matched lo ad......................................... 114 B.3 0 dB coupler used in the Monopulse processor; (a) block diagram. and (b) simulation using Lange couplers.............................. 114 B.4 Monopulse processor using Lange couplers; (a) layout and (b) simulation. 115 B.5 Simulated group delay from the input ports to (a) Al and (b) A3.......116 B.6 (a) Picture of assembled Lange coupler based monopulse processor and (b) m easured response................................ 117 C.1 Architecture of (a) Current Polarimetric Systems and (b) Proposed IF-Based Polarim etric System............................... 118 C.2 Schematic of the Passive IF Polarimetric Receiver............... 119 C.3 Response of Polarimetric Receiver for (a) Horizontally Polarized Wave and (b) Left-hand Circularly Polarized Wave.................... 120 C.4 Measured Phase Error for X-band Receiver.................. 122 xiii

LIST OF APPENDICES APPENDIX A Forces on a Capacitor.............................. 110 B An Octave Bandwidth Monopulse Processor.....................112 C IF-Based Polarimetric Receivers.................................. 118 D Detailed Fabrication Process.......................... 123 xiv

CHAPTER 1 Introduction The field of microelectromechanical systems (MEMS) as applied to microwave and millimeter wave circuits has been expanding rapidly during the 1990's. At first this was driven, to a large extent, by the success of low-frequency MEMS devices and their advantage of low-power operation and integrability with CMOS circuitry. However, the bulk of these low frequency devices are based on polysilicon structures. Unfortunately, polysilicon is a poor microwave material due to its relatively high resistivity which, at microwave frequencies, causes excessive loss. Because of this, most researchers in the field of microwave MEMS devices have used metal structures driven by electrostatic actuation. Most of the research in microwave MEMS devices, to date, has focused on the developinent of low-loss low-power control circuits such as single-pole single-throw (SPST) switches and switched-line phase shifters [30, 18, 60]. The advantage of using MEM\S devices over FETs or PIN diodes is their extremely low series resistance, on the order of 0.1 to 0.3 Q as compared to 2 to 6 Q, and their extremely low drive power requirements, on the order of psW as compared with mW. In addition to this, due to the fact that MEMS devices do not contain a semiconductor junction, with the associated non-linearity, they lack any measurable intermodulation distortion [19]. MEMS switches have been fabricated in fixed-fixed beam, cantilever, and diaphragm configurations with the bridge height typically 3 to 4 1um above the transmission line, resulting in an actuation voltage of 25 to 100 V. Pacheco et al. have shown that low voltage actuation of 14 to 16 V can be achieved with a gap height of 3,pm by using serpentine 1

MEMS bridge bridge height Substrate Figure 1.1: Cantilever MEMS bridge in a series configuration along a microstrip or CPW transmission line. C= 20fF,2pF Zo L= 7pH Zo R = 0.3 Q Figure 1.2: Circuit model for a series capacitive MEMS switch with the capacitance switching from 20 fF to 2 pF. -10 1< (Switch Down) -10 ctZ -30 S w1 Switch Up) -20 -40...... 0 2 4 6 8 10 Frequency (GHz) Figure 1.3: Circuit simulation of series switch using the model in Figure 1.2. cantilever springs at the ends of the beam [38]. The 3 to 4,Im height is necessary in order to reduce the parasitic capacitance of the bridge in the OFF-state (bridge up), and results in a capacitance ratio of 50 to 100 for capacitive switches. MEMS switches have been demonstrated reliably up to 40 GHz with low insertion loss (0.2 to 0.5 dB) and high linearity [30, 19]. The achievable isolation with these switches is typically 20 to 40 dB, depending on the size of the MEMS bridge, with an associated reflection coefficient from -15 to -20 dB. Current microwave MEMS switches have been designed in both series and shunt configurations with both cantilever and fixed-fixed beams. In the series configuration, shown 2

MEMS bridge bridge height I GI Substrate Figure 1.4: Fixed-fixed beam MEMS bridge in shunt configuration over a CPW transmission line. 0 -C= 35 fF, 3.5 pF Zo Z L=7pH zo R = 0.3 Q o Io Figure 1.5: Circuit model for a shunt capacitive MEMS switch with the capacitance switching from 35 fF to 3.5 pF. m -10 SlI (Switch Up) I -20 E S21 (Switch Down) -30 -40 0 10 20 30 40 50 60 Frequency (GHz) Figure 1.6: Circuit simulation of a shunt switch using the model in Figure 1.5. in Figure 1.1 with a cantilever beam, the isolation is limited by the parasitic capacitance which allows coupling at high frequencies. This can bIe seen with a simulation in which the MEMS bridge is represented by a series capacitor-inductor-resistor combination as shown in Figure 1.2. Figure 1.3 shows the circuit simulation for the isolation when the switch is up and the return loss when the switch is clown. As can be seen, for the capacitance values used, the performance at low frequencies is limited by the return loss rising to -10 dB around 2 GHz and at high frequencies by the isolation rising above -20 dB around 8 GHz. One of the main problems of series capacitive switches is the high return loss, with the 3

switch down, in the frequency range where the isolation is greatest, with the switch up. In Figure 1.3, this occurs at 0.1-2 GHz. It is for this reason that metal-to-metal series MEMS switches are used. Yao et al. presented a series metal-to-metal MEMS switch for use in systems up to 6 GHz with better than 50 dB isolation up to 4 GHz [60]. The shunt switch configuration is shown in Figure 1.4 with a fixed-fixed beam over a CPW line. In this case, the parasitic capacitance limits the high frequency response when the switch is up by producing unwanted reflections. Again, the MEMS bridge can be modeled by a series capacitor-inductor-resistor combination as shown in Figure 1.5. The circuit simulation of this model is shown in Figure 1.6 where the return loss, when the switch is up, and the isolation, when the switch is down, is shown. As can be seen, the low frequency limit is set by low isolation while the high frequency limit is set by high return loss. Because of the high frequency of operation of the shunt configuration, the inductance in the MEMS bridge resonates with the capacitance as seen in the isolation curve in Figure 1.6. Goldsmith et al. [19], have developed a shunt capacitive MEMS switch with 40 dB isolation, with the switch down, and -15 dB return loss, with the switch up, at 40 GHz. Muldavin et al. have demonstrated that by using several shunt capacitive MEMS switches, the reflections can be tuned out and higher isolation can be achieved as compared to a single switch. The measured results demonstrate a return loss below -15 dB from DC-40 GHz with an isolation of better than 40 dB from 16-40 GHz [33]. MEMS switch designs have been very similar to standard PIN diode or FET switch networks, with the active device replaced by the MEMS switch. This thesis presents a (leparture from the traditional approach by incorporating the MEMS switches in distributed transmission line designs. In this approach, a CPW transmission line is loaded periodically with MEMS bridges, as shown in Figure 1.7, which act as shunt capacitors/varactors. T'he impedance and propagation velocity of the resulting slow-wave transmission line are determined by the size of the MEMS bridges and their periodic spacing. The shunt capacitance associated with the MEMS bridges is in parallel with the distributed capacitance of the transmission line and is included as a design parameter of the loaded line. Thus, the height of the MEMS bridge can be lowered from 3-4 um to 1-1.5 /,m. An immediate advantage of the lowered height is that the pull-down voltage of the MEMS bridge is reduced to 10 - 4

Shunt MEMS Bridge w w,1W Figure 1.7: Top view of a CPW line periodically loaded by shunt MEMS bridges. 20 V. By using a single analog control voltage to vary the height of the MEMS bridges, the distributed capacitive loading on the transmission line, and therefore its propagation characteristics, can be varied. This results in analog control of the transmission line phase velocity and therefore in a true-time delay phase shifter. Furthermore, if the MEMS bridges are pulled down (to form a very large capacitor), the distributed transmission line results in a wideband switch. The concept of periodically loaded lines has been researched for use as nonlinear transmission lines since about 1960 [29]. In this case, a CPW transmission line is loaded with millimeter-wave Schottky diodes and is used in voltage-level pulse shaping, picosecond-level sampling, and harmonic multipliers [44, 45]. More recently, the periodically loaded line concept has been used in developing microwave phase shifters using varactor diodes as the capacitive loading [35, 36]. However, diode-based periodically loaded lines are quite lossy at millimeter wave frequencies, due to the series resistance of the Schottky diodes, and cannot be used in low-loss phase shifters and wideband switches above 26 GHz. For these frequencies, MEMS bridges offer excellent performance with very low additional transmission-line losses. This thesis consists of 5 chapters. Chapter 2 starts off with a basic description of the mechanical properties of fixed-fixed beams as they are used in the distributed MEMS transmission lines (DMTLs). The cantilever bridge is not used in this work, and therefore is not discussed. Chapter 3 covers the theory of periodically loaded lines with extensions for the case of using MEMS bridges as the varactors. Both analytic and circuit models are found which provide for both the design and accurate simulation of the distributed lines. Chapter 4 discusses the application of the distributed MEMS transmission line as a 5

phase shifter. The design and optimization of the DMTL phase shifter for both 60 GHz and 100 GHz designs is presented. In Chapter 5, additional applications of the DMTL as a switch, phase modulator, and phase vernier are presented. In addition, topics such as the switching speed of the bridges and the power handling of the DMTL is discussed. Chapter 6 concludes the thesis with a discussion of the future directions of research for microwave MEMS devices and the distributed MEMS transmission line. Several appendices are included for completeness. The first appendix covers the derivation of the electrostatic force on a capacitor. The next two appendices cover work related to a monopulse radar receiver where the indirect motivation for investigating MEMS based millimeter wave phase shifters came from. The last appendix is the detailed process used for the fabrication of the distributed MEMS transmission lines. 6

CHAPTER 2 Mechanical Properties of Fixed-Fixed Beams The fixed-fixed beam bridge is used quite often in RF MEMS applications. For this reason, it is important to develop a model for understanding the mechanical operation of the bridge. In this chapter, a first-order model will be developed for the operation of a fixed-fixed beam under electrostatic actuation as well as the effect of Brownian noise. 2.1 Spring Constant If the operation of the fixed-fixed beam is limited to small deflections, the mechanical behavior can be modeled using a linear spring constant, k (N/m). This spring constant is composed of two parts. One part, k', is due to the stiffness of the bridge which accounts for the material characteristics such as Young's modulus, E (Pa), and the moment of inertia, I (m4). The other part of the spring constant, k", is due to the biaxial residual stress, a (Pa), within the beam which is typically a result of the fabrication process used to define -IMA A RA RA a | m " 4 X B MB RB Figure 2.1: Fixed-fixed beam with concentrated vertical load P. 7

the beam. The expression for the spring constant of a fixed-fixed beam with a concentrated vertical load, P (N) in Figure 2.1, is found from the deflection versus load position given by [43|: d2y El = MA + RAX for x < a dx2 MAX2 RAX 3 2E + EI forx < a (2.1) Pa 2 MA = a MA 12 (I -a) RA = (- a)2 (I + 2a) where I is the length of the beam, MA (N-m) is the reaction moment at the left end, and RA (N) is the vertical reaction at the left end. The moment of inertia, I, for a rectangular cross-section is given by wt3/12 where w is the width of the beam and t is the thickness of the beam. In MEMS applications, the load is typically distributed across the beam and the deflection of the beam at the center is used to determine the spring constant. By substituting x = 1/2 into (2.1), the deflection at the center is found for a concentrated load at point a. To find the deflection for a distributed load, the principle of superposition is used. For instance, in the case where the load is distributed across the entire beam, the deflection is found by evaluating the integral: y = / (13- 612a + 91a2 - 4a2) da (2.2) 1/2 where ~ is the load per unit length so that the total load is P = (l, and the expressions for MA and RA have been substituted into (2.1). Since the structure is symmetric, the integral is evaluated from 1/2 to I and multiplied by 2. When this integral is evaluated the spring constant is found to be: kP P.l 32Ewt3 k'= — - (2.3) For the case of a fixed-fixed beam over a CPW line, the force is approximated as being evenly distributed above the CPW center conductor as shown in Figure 2.2. For this case, the integral in (2.2) would have to be revaluated with new limits. In this work, the center 8

Center Conductor Figure 2.2: Fixed-fixed beam over a CPW line with the force, P = l1/3, evenly distributed above the CPW center conductor. conductor is typically a third of the length of the bridge (or beam) which gives a spring constant of: k' _ 32Ewt3 (27 (2.4) This spring constant is smaller since the same total load is concentrated more towards the center of the beam where it is less stiff than at the ends. The part of the spring constant due to the biaxial residual stress within the beam is derived from modeling the beam as a stretched wire as shown in Figure 2.3. It should be noted that this model only applies for tensile stress. The biaxial residual stress, o, results in a force, S, [15]: S = O(l - t)tw (2.5) pulling on both ends of the beam, where v is Poisson's ratio. When a vertical force (P) is applied, the beam is deflected by an amount u at the location of the applied force. This deflection stretches the beam which increases the stress in the beam and thus the force pulling on the ends increases to [57]: AEA1 AEA2 S+ - AA and S+- (l- (2.6) a (1 - a) ( where Al and A2 are the lengths by which the beam is stretched on either side of the vertical load, P, and are given by: A1 = a2 + u2 - a (2.7) A2 = /(1 -a)2 + u2 -- (- a) By equating the applied force, P, with the forces in the beam, projected onto the vertical direction, and assuming a small deflection, the following equation can be found for u: Pa(l - a) S 9

,y P a --------------- ------- S+(AEA1)/a S+(AEA2)/(l-a) Figure 2.3: Beam modeled as a stretched wire with concentrated vertical load P. in which the additional force due to A1 and A2 has been neglected. From this equation, the deflection at the center of the beam (x = 1/2) is found to be: P Y =- (Il- a) (2.9) 2S The deflection for a load distributed across the entire beam (P= l1) can now be found by evaluating the integral: =-2 (l - a)da (2.10) 1/2 where symmetry has been used in setting up the integral. The spring constant is found to be: k"= _ 8S 8(1 - v)wt (2.11) y I I Once again for the case of a fixed-fixed beam over a CPW line, the distributed force is only located over the center conductor. The spring constant for a center conductor width equal to a third of the length of the bridge is: k" 8(1- )wt (3) (2.12) Again, the spring constant is smaller due to the load being more concentrated at the center where the beam is more easily moved. The total spring constant is the sum of the contributions from the beam stiffness and the biaxial residual stress, and for a load distributed across the entire beam is: k k' + k" 32E 81 -)wt (2.13) 13 1 10

which is the same model reported in [37]. For a beam over a CPW line with the center conductor a third of the length of the beam, the spring constant is given by: =32Ewt3 (27) 8(1 ) ) (2 14) [3 4-9 1 5 A more general expression for the spring constant of a bridge over a CPW line is given by: 32Ewt3 ( 1 ) 8cr(l - )wt ( (2.15) k = -- (2-(2-) ) + 2-) (2.15) where x = W/l and W is the width of the CPW center conductor. Thus the spring constant for a concentrated load at the center of the beam is found when x = 0, and for a centered load distributed over a third of the beam when x = 1/3 which results in (2.14). Figures 2.4 and 2.5 demonstrate the variation in the spring constant using (2.14), for gold and aluminum bridges respectively, as the thickness, t, is varied for lengths of 200 and 400 /tm and residual stresses of 0, 50, and 100 MPa. For the case where the residual stress within the beam is compressive, the model for k" is no longer valid. The primary concern with compressive stress is the tendency for the beam to buckle. Due to the stiffness of the beam, a certain amount of compressive stress can be withstood before buckling occurs. This stress, known as the critical stress, is given for a fixed-fixed beam by [15]: 7r2Et2 (cr 3 2(1 - ) (2.16) 312 (1 - v) The variation in the critical stress with thickness for 200 and 400 Ptm long bridges made of gold and aluminum is shown in Figures 2.6(a) and 2.6(b), respectively. It is seen that for a bridge thickness of 1 to 2 ftm and a length of 400 tim, a compressive stress of 4 to 12 MPa for gold and 2 to 8 MIPa for aluminum can be tolerated. For a shorter length of 200,Lm and a thickness of 2 pnm, a gold bridge can withstand 45 MPa while an aluminum bridge can withstand 34 MPa. However, the shorter length bridge results in a much higher pull-down voltage as discussed in section 2.2. 11

350 300 300 OMPa -E 50 50 MPa -o- 100 MPa / c 'I -200 o/ / 50 '0 -. 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Thickness (inn) Figure 2.4: Spring constant of a gold bridge (E = 80 GPa, v = 0.42) with lengths of 200 pm (-) and 400,um (- -). For each bridge length the spring constant is evaluated for biaxial residual stresses of 0, 50, and 100 MPa. The spring constant scales linearly with the bridge width which is held constant at 35 inm. 350 300 - 250 = 200 c/ 150 ~ c 100 v: 50 0 L0.0 0.5 1.0 1.5 2.0 2.5 3.0 Thickness (gin) Figure 2.5: Spring constant of an aluminum bridge (E = 69 GPa, v = 0.33) with lengths of 200 pm (-) and 400 ILm (- -). For each bridge length the spring constant is evaluated for biaxial residual stresses of 0, 50, and 100 MPa. The spring constant scales linearly with the bridge width which is held constant at 35 am. 12

120 100 C 80 60 Ct4 20 - c".' 40 20 0. 0.0 80, 60 40 20 0.0 0.0 0.5 1.0 1.5 2.0 Thickness (arm) 2.5 3.0 (a) 0.5 1.0 1.5 2.0 Thickness (tm) 2.5 3.0 (b) Figure 2.6: Critical stress of a (a) gold (E = 80 GPa, M = 0.42) and (b) aluminum (E = 69 GPa, - = 0.33) bridge vs. thickness for 200 pm ( —) and 400,m (- -) long bridges. 13

3.0 - 2.7 2.4 2.1 1.8 ' 1.5 b3 1.2 09 0.6 0.3 (.0 ';..... 0.0 0 5 10 15 20 25 Applied Voltage (V) Figure 2.7: Bridge height versus applied voltage with a zero-bias bridge height of 1.2,Lm and 3 pnm. The bridge parameters, given in Table 2.1, are chosen to result in a pull-down voltage of 22 V. 2.2 Electrostatic Actuation When a voltage is applied between the bridge and center conductor of a CPW line, an electrostatic force is induced on the bridge. This is the well known electrostatic force which exists on the plates of a capacitor under an applied voltage [28]. In order to approximate this force, the bridge over the center conductor is modeled as a parallel plate capacitor. Although the actual capacitance is about 20-30% larger due to fringing fields, the model will provide an understanding of how electrostatic actuation works. If the width of the bridge is w and the width of the CPW center conductor is W, then the parallel plate capacitance is: CoWw C =- (2.17) 9 where g is the height of the bridge above the center conductor. The force applied to the bridge is found by considering the power delivered to a time-dependent capacitance and is given by [61]: F = 1 V2 dC(g) = 1WwV28) 2 dg 2 92 where V is the voltage applied between the bridge and center conductor. This electrostatic force is distributed across the section of bridge above the center con 14

Table 2.1: Dimensions of bridges used in Figure 2.7. go( m) 1.2 3.01 M (m) 300 600 w(/zm) 35 70 t(jm) 2.5 2.5 cr(MPa) 1.0 0.50 The bridges are both made of gold with E= 80 MPa, v = 0.42, and p = 19320 kg/m3. ductor and therefore we can use the spring constant given by (2.14) to determine the distance which the bridge moves with the applied force given by (2.18). Equating the applied electrostatic force with the mechanical restoring force, due to the stiffness of the bridge, it is found that: 1 2 k(g — g) (2.19) where go is the zero-bias bridge height. Solving this equation for the voltage results in: 2k V= e 92k (go -9g) (2.20) The graph of bridge height versus applied voltage, shown in Figure 2.7, shows two possible bridge heights for every applied voltage. This is a result of the bridge becoming unstable at 3go. This instability is due to positive feedback in the electrostatic actuation which can be understood by considering the electrostatic force in terms of the electric field applied to the charge on the bridge [14, 61]: F= QE (2.21) where Q is the charge on the bridge and E = V/g is the electric field due to the applied voltage. When the constant voltage source (infinite charge pump) is increased, the force is increased due to an increase in the charge. Simultaneously the increased force decreases the bridge height which increases the capacitance, and thus the charge, as well as the electric field. At 2g0, the increase in the electrostatic force is much greater than the increase in the restoring force resulting in the bridge becoming unstable. The electrostatic force necessary to pull the bridge down is given by F = kgo/3. For the examples given in Figure 2.7, with dimensions given in Table 2.1, the spring constants 15

are 29 N/m and 7.5 N/m for the 1.2 tm and 3,um high bridge, respectively. Thus, the electrostatic force necessary to pull these bridges down is 12 PN for the 1.2 jLm high bridge and 7.5 A/N for the 3,um high bridge. This can be compared with the acceleration needed to pull the bridges down completely given by: kgo a = k (2.22) m where the spring constant should be calculated using (2.13) since the force due to acceleration is evenly distributed across the bridge. For the examples given in Figure 2.7, with a mass of 0.51 /,g arid 2.0 pg, the accelerations are 13000x and 2100x the Earth's gravitational acceleration, respectively. By taking the derivative of (2.20) with respect to the bridge height and setting that to zero, the height at which the instability occurs is found to be exactly two-thirds the zero-bias bridge height. Substituting this value back into (2.20), the "pull-down" voltage is found to be: p - V(2g9/3) = 27 (2.23) 27c WwY Figure 2.8 shows the variation in pull-down voltage with bridge thickness for gold and aluminum bridges with lengths of 200 lm and 400 Aim and residual stresses of 0, 50, and 100 MPa, calculated using (2.23) and (2.14). It can be seen that the variation of the pull-down voltage with thickness is much greater for a shorter bridge. Figure 2.9 shows the variation in pull-down voltage with bridge height from which it can be seen that the variation is higher for higher residual stress. It should be noted that although (2.23) shows a dependence on the bridge width, w, the pull-down voltage is independent of the bridge width since the spring constant, k, varies linearly with w (see (2.14)). By using (2.20) and varying g from go to 2go, the bridge height versus applied voltage characteristics can be found. From this calculation, the parallel-plate capacitance versus bridge height is determined and is plotted in Figure 2.10. It is seen that as the applied voltage approaches the pull-down voltage (22 V), the bridge capacitance changes very rapidly and reaches a value of 1.5Cbo = 30 fF at 22 V, where Cbo = 20 fF is the zero-bias bridge capacitance. This can be seen very clearly in Figure 2.11 which shows the derivative of the capacitance and bridge height with respect to the applied voltage. Due to the bridges 16

140 120.,-, I 80 I 60 0 - 40 20 140 120 5 100 80 60 460 - --- -0'- 'x'"' i. — x —. -. ~ 20 2.0 2.5 3.0 0.0 0 L0.0 0.5 1.0 1.5 Thickness (Ltm ) 0.5 1.0 1.5 2.0 2.5 3.0 Thickness (agm) (a) (b) Figure 2.8: Pull-down voltage of a (a) gold (E = 80 GPa, Iv = 0.42) and (b) aluminum (E = 69 MPa, v = 0.33) bridge vs. bridge thickness for 200 p/m (-) and 400 p/m (- -) long bridges. For each bridge length the pull-down voltage is calculated for biaxial residual stresses of 0, 50, and 100 MPa. The pull-down voltage depends on the bridge height as go and go is 1.5 pm. 200 - 175 > 15() " 125 - g 100 - a 75 I-. -' 50 - 25 0. 0.0 200 - 175 / > 150 ~ 125 100 a 75 25 0 -. 3.0 0.0 0.5 1.0 1.5 2.0 2.5 0.5 1.0 1.5 2.0 2.5 3.0 Bridge Height (gm) Bridge Height (girn) (a) (b) Figure 2.9: Pull-down voltage of a (a) gold (E = 80 GPa, v = 0.42) and (b) aluminum (E = 69 MPa, v = 0.33) bridge vs. bridge height for 200 /zm ( —) and 400 /pm (- -) long bridges. For each bridge length the pull-down voltage is calculated for biaxial residual stresses of 0, 50, and 100 MPa. The pull-down voltage depends on the bridge height as 3/2 and go is 1.5 /lm. 17

32 1.2 30 28 8 26 ct I 24 ct cz u 22 20 18 0.9 E:i. -' 0.6 ':r. O) 0.3 F= 0.0 0 5 10 15 Applied Voltage (V) 20 25 Figure 2.10: Variation of bridge capacitance and gap height with applied voltage. The bridge parameters have been adjusted to result in a pull-down voltage of 22 V, a zero-bias bridge capacitance of 20 fF, and a zero-bias height of 1.2 hm. 10 8 6 4 2 0 0.20 0.15 0.10 0.05 0.00 0 5 10 15 Applied Voltage (V) 20 25 Figure 2.11: Derivative of the bridge capacitance (-) and bridge height (- -), with respect to the applied voltage, vs. the applied voltage. The bridge parameters have been adjusted to result in a pull-down voltage of 22 V. 18

Cs Vs Cb Figure 2.12: Stabilization of an electrostatically actuated MEMS bridge through the use of a series feedback capacitor. instability at 2g9/3, it is not possible in practice to achieve this 50% increase in the bridge capacitance. Instead, the applied voltage must be limited to 20-21 V which gives a capacitance of Cb = 25-26 fF, or a 25-30% increase in the zero-bias bridge capacitance. 2.3 Stabilization of Electrostatically Actuated Bridges It has been demonstrated that by placing a series capacitance in the DC path of the MEMS bridge capacitor, as shown in Figure 2.12, the instability in the electrostatic actuation can be reduced and even eliminated [48]. This can be understood from a feedback point of view. The applied voltage, V,, is divided between the two capacitors such that the voltage across the MEMS capacitor is: Vs = -(2.24) 1 + Cb/Cs where Cb = EoA/g is the MEMS capacitor and Cs is the fixed series capacitor. As Vs is increased, the voltage applied to the MEMS capacitor increases, causing the bridge to pull down and Cb to increase. This results in the positive feedback, discussed in section 2.2, and the resulting instability at g,0. However, in the series (stabilization) configuration shown in Figure 2.12, the increase in Cb results in less voltage across Cb (and more across C,), thereby achieving negative feedback. The position at which the instability now occurs is determined by first finding the force on the MEMS capacitor in terms of V,, solving for Vs, and taking the derivative of Vs with respect to the bridge height. The force on the bridge is found by considering the change in energy of both capacitors with respect to the bridge height, g: F dU = V d( CbCs A 2 (2.25) dg 2 dg Cb + Cs 2 (g + Kgo,2 ()2 19

1.2 1.0 0.8 00 3 0.6 0a 15C p0.4 C 0.2 / 0.7C 0.0" 0 20 40 60 80 100 120 Applied Voltage (V) Figure 2.13: Plot of change in bridge height versus applied voltage as the series feedback capacitor is varied from 0.5Cbo to oo. The zero-bias bridge height is 1.2 pnm. where K = Cbo/C!, and Cbo = EoA/go is the zero-bias bridge capacitance. By equating this force with the force due to the stiffness of the bridge, F = k(go - g), the applied voltage can be solved in terms of the bridge height, g: = 2kg3 g- +K)2 - 9 (2.26) VoA go go By taking the derivative of (2.26) with respect to g and setting it to zero, the position of the instability is found to be: gp (2-K) (2.27) From this equation, it is seen that for K = 0 (ie. no series feedback capacitor), the instability occurs at the expected height of 2go/3. However, if K -= 2 or Cs = Cbo/2, then the instability point is eliminated altogether (gp = 0). This increase in the stable region of an electrostatically actuated bridge does not come without a price. The voltage required to pull the bridge completely down is also increased. The new pull-down voltage can be found by substituting (2.27) back into (2.26) resulting in: -,/8kgo Vs = 27A( K)3 (2.28) which is seen to be the standard pull-down voltage, given by (2.23), increased by a factor of (1 + K)3/2. Thus, if the instability is completely removed by setting K = 2, then the 20

Cs 0-I Vs Gb Cf Figure 2.14: Stabilization of an electrostatically actuated MEMS bridge, in the presence of significant fringing capacitance, through the use of a series feedback capacitor. pull-down voltage is increased by a factor of 5.2. For the example used in section 2.2, this would increase the pull-down voltage from 22 V to 114 V. Figure 2.13 shows the change in bridge height versus applied voltage as the series capacitance is varied from 0.5Cb, to Do (ie. a short circuit). As can be seen, if twice the initial pull-down voltage is acceptable, then a series capacitance of Cs = 1.7Cbo (K = 0.6) can be used, resulting in stable operation up to 0.59,. While in some cases it may be possible to isolate a single capacitor without a large fringing field component, in most cases, and particularly with the distributed MEMS transmission lines, fringing fields can be very large. If a capacitor is placed in parallel with the variable MEMS capacitor as shown in Figure 2.14, it is found that the effect of the series feedback capacitor is reduced, and the instability point must be solved again. The force on the capacitor is again determined from the change in energy with respect to g: - cdU V2 d ( sCb + CsCf _ _OAV2( dg 2 dg Cs + Cf+Cb) (9 (1 + Cf/Cs) + Kgo9)2 where Cf is the fixed capacitance to ground in parallel with the MEMS capacitor. Setting this force equal to the restoring force of the bridge, the applied voltage is found to be: 2kg Cf2( \,sf ol ) + +K - 9 ) (2.30) CV A go Cs) g o It should be noted that this equation reduces to (2.20) when Cs = oo, and to (2.26) when Cf = 0 as expected. By taking the derivative of (2.30) with respect to g and setting it to 21

1.2 1.0 0.82 00 p 0.6 l.5C CbO 0.4 bo 0 5C70 0.0... 0 20 40 60 80 100 120 Applied Voltage (V) Figure 2.15: Plot of the change in bridge height versus applied voltage as the series feedback capacitor is varied from 0.5Cbo to oc with a fringing capacitance of Cf - Cbo/3. The zero-bias bridge height is 1.2 p/m. zero. the modified instability position is: go 2 ( K - 3 1 9pf 3 1 C //Cs (2.31) Setting gpf = 0, it is found that the series capacitance would have to be: Cb0 CS = - Cf (2.32) From this equation it is seen that if the fringing capacitance is larger than half the zero-bias bridge capacitance, it is no longer possible to completely eliminate the instability. The pull-down voltage is also affected by the fringing capacitance and is found to be: 8kg3 (Cs + Cf + Cbo)3 Vsfp \ 27eoA C2 (C + Cf) (2.33) Figure 2.15 shows the change in the bridge height versus applied voltage with a fixed parallel capacitance Cbo/3. The series capacitance is again varied from 0.5C o to oc, however, it can be seen that even at 0.5Cbo, the instability is still present at 0.32,m while the pull-down voltage has been increased to 120 V (from an initial value of 22 V). Since the parallel capacitance is less than 0.5Cbo, it is possible to completely eliminate the instability by setting the series capacitance to Cbo/6. However, according to (2.33), this would increase the pull-down voltage by a factor of 27 or to 594 V making the device unusable. 22

2.4 Frequency Response The frequency response of a fixed-fixed beam is useful for determining the mechanical bandwidth over which the beam can be used as well as the effect which thermal noise will have. The frequency response can be determined by starting with the equation for the dynamic response which according to d'Alembert's principle is given by [57]: d2x dX mr + b + k = feXt (2.34) dt2 dt where x is the bridge height, m is the bridge mass, b is the damping coefficient, and fext is an external force. By using Laplace transforms, the frequency response is found to be: x(jw) _ k-1 (2.35) F(jw) 1-( (/WIW)2 + jj/ (QW)) where wo = /k/n is the resonant frequency and Q = k/(wob) is the quality factor of the resonant beam. For the resonant frequency when the bridge is over a CPW line with a center conductor that is a third of the length of the bridge, the spring constant given in (2.14) can be used. The resulting expression for the case of no residual stress, a = 0, is given by: fo = 0.668- - (2.36) 12 V p where p' is the density of the bridge material. As can be seen, the resonant frequency can be increased by either increasing the thickness or decreasing the length of the beam. However, it must be remembered that these changes will also affect the actuation voltage needed to pull the beam down. If tensile stress is present in the beam, the complete expression for the spring constant, given in (2.14), would have to be used when calculating the resonant frequency. The quality factor of the beams is determined by several different variables such as the pressure, temperature, and intrinsic material dissipation. Since the beams used in this work are operated at atmospheric pressure, the quality factor is dominated by squeeze-film damping [1]. Under this condition, an approximation for the quality factor of the fixed-fixed beam is given by [23]: - / (2.:37) / 2 pt2g3 1The density of gold and aluminum is 19320 kg/m3 and 2700 kg/m3, respectively [58]. 23

where n2 is the viscosity of air. It is seen that the quality factor is strongly dependent upon the bridge bridge height, g3 variation, and the thickness, t2 variation. Figures 2.16(a) and (b) show the variation in the frequency response for gold and aluminum bridges, respectively. The calculation is carried out using (2.14) for the spring constant with 50 MPa residual stress and for bridge lengths of 200 and 400 /pm. For each bridge length, bridge heights of 1. 2, and 3 pin are used. The variation in the quality factor is seen by the amplitude change at the resonant frequency and the values are given in Table 2.2. In addition, it is seen that although the resonant frequency for aluminum is higher than for gold, due to the significant difference in their respective densities, gold has a higher quality factor. Table 2.2: Quality factors for bridges in Figure 2.16. Gold Aluminum go{(mP) 200 _m 40m 20 400 m 20 m 400 Un 1 0.40 0.10 0.14 0.035 2 3.2 0.81 1.1 0.28 3 11 2.7 3.8 0.95 fo(kHz) ft 85 36 230 100 2.5 Brownian Noise Analysis Any time a dissipation mechanism, such as the bx term, is present in a system, there is a corresponding noise source [26]. In the case of the mnass-spring system, this noise source is Brownian noise which can be included by setting fext in (2.34) to represent a noise force (fext = Jf) It is possible to derive an expression for the Brownian noise force by using the principle of equipartition of energy [26]. According to this principle, every mode in a system which is in thermal equilibrium and contributes a quadratic term to the energy such as kinetic, spring potential, or rotational kinetic will have an average energy equal to 1kBT, where kB is Boltzmann's constant (1.38 10-23 J/K). Thus, for the fixed-fixed beam the following equation must be satisfied in thermal equilibrium: kx2 = -kBT (2.38) 2The viscosity of air is 1.79 10-5 Pa-s at atmospheric pressure and 288 K [58]. 24

-10 -20 -30 -40 5 X- 50. * m -60 - m -70 1 Ax 2-m s -70 2 sum -3 3rn -80 -90 1 10 100 1000 Frequency (kHz) (a) -20 - 1 10 100 1000- rn -180 ~~-3 - - -.90 -100 1 10 100 1000 10000 Frequency (kHz) (b) Figure 2.16: Frequency response of a (a) gold (E = 80 GPa, v = 0.42, p =- 19320 kg/m3) and (b) aluminum (E = 69 MPa, v = 0.33, p = 2700 kg/m3) bridge for 200 I-tm (-) and 400 /zm (- -) long bridges over a CPW line with W:= 1/3. For each bridge length the response is calculated for bridge heights of 1L, 2, and 3 t/m. The width is 35 tum, the thickness is 1.5 p/m, and the residual stress is 50 MPa. 25

In order to find an expression for fn the mean-square of the position must be found using the transfer function given by (2.35) and integrating over all frequencies: x2 = f df k2 [- (/wo)2] + 2/ (Qo)2 4k2 (2.39) in which it has been assumed that the noise force is frequency independent over the bandwidth of the vibrational mode of the beam. Upon substituting (2.39) into (2.38), the noise force is found to be: fn = VbkBT (N/v/z) (2.40) which is immediately recognized as being analogous to the equivalent noise voltage of a resistor with the resistance, R, equal to the damping coefficient, b. Referring the Brownian noise force to the beam position using (2.35), the equivalent mean square position is found to be: x 4bkbT 12 (m2/Hz) (2.41) k [ -( /O)2] + / (QW )2 From which it can be seen that bridges with large spring constants and low damping coefficients will result in a low Brownian noise position. For the devices shown in Figure 2.16 the low-frequency rms Brownian noise positions are given in Table 2.3 from which it is seen that there is very little difference between the gold and aluminum bridges. The low equivalent noise position is primarily due to the stiffness of the bridges and thus the Brownian noise, for the applications used in this work, is insignificant. Table 2.3: Low-frequency rms Brownian-noise position values for the bridges used in Figure 2.16 in A/vHz. Gold Aluminum go(um) 200,um 400 /m 200,tm 400 im 1 2.4.10-4 1.2.10-3 2.4.104 1.2.10-3 2 8.5.10-5 4.4 10- 8.5.10- 4.2.10-4 3 4.6.10-5 2.4.10- 4.6 10-5 2.3.10 - I 26

CHAPTER 3 Distributed MEMS Transmission Lines Distributed circuits have been used in many devices including filters [41], traveling-wave amplifiers [44], phase shifters [36], and non-linear transmission lines [44]. The concept is very useful because the parasitics of the discrete components, such as the gate-to-source capacitance of transistors in traveling-wave amplifiers, or the capacitance of Schottky diodes in non-linear transmission lines, are included as part of the periodic transmission line, thereby resulting in very wideband operation. The transmission-line dimensions can also be designed such that the resulting periodic transmission line will have a 50 ', characteristic impedance. The distributed MEMS transmission line (DMTL) consists of a high impedance line (> 50 Q) capacitively loaded by the periodic placement of MEMS bridges. This could be done with many different types of transmission lines, however it is most easily implemented using coplanar waveguide (CPW) transmission lines. Figure 3.1 shows the top view of a typical DMTL used in this work. The MEMS bridges have a width w, a length I = W + 2G, and a thickness t. The periodic spacing between the bridges, s, and the number of bridges vary depending upon the application. The DMTL is connected to probe pads via 50 Q CPW feedlines for the purpose of testing. A result of creating a periodic structure is the existence of a cut-off frequency or Bragg frequency, fB, near the point where the guided wavelength approaches the periodic spacing of the discrete components [47]. In many of the distributed circuits mentioned, this cutoff frequency can be designed such that it will not limit the device perforinance since the discrete components will have a comparable maximum frequency [44]. In the case of the 27

(s-w)/2 'r --- — Reference Planes ---, Probe Pad Figure 3.1: Layout of a DMTL constructed of a CPW line with center conductor width W and total CPW width W+2G, and MEMS bridges with width w and spacing s. The DMTL is connected to 50 Q feedlines and probe pads for testing. distributed MEMS transmission lines used in this work, the self-resonant frequency of the MEMS bridges is not approached and thus the operation is limited by the Bragg frequency of the line. 3.1 Fabrication of the DMTL The distributed MEMS transmission lines used in this work are fabricated on 500 Plm quartz (er = 3.8) using finite-ground CPW [40]. The outline of the fabrication process is shown in Figure 3.2. The CPW lines are defined first by evaporating a 500/8000 A layer of Ti/Au [see Fig. 3.2(a)]. Next a 2000 A plasma-enchanced chemical vapor deposition (PECVD) SixNy layer is deposited over the whole wafer. The silicon nitride is patterned with photoresist and etched in a reactive ion etcher (RIE) such that it is only covering the CPW center conductor [see Fig. 3.2(b)]. Next the sacrificial photoresist layer (MICROPOSIT S1813)1, which determines the height of the MEMS bridge, is patterned [see Fig. 3.2(c)]. The height of the air bridges, above the center conductor, can be varied from 1.2-1.5 /tm by varying the rotational speed of the spinner from 5000-3000 rpm [51]. A 500/2000/500 A Ti/Au/Ti seed layer is evaporated over the entire wafer and then patterned with photoresist to define the width and periodic spacing of the MEMS bridges. The bridges and CPW ground planes are then gold-electroplated to a thickness of 2-2.5 iin, followed by removal of the top photoresist and seed layer [see Fig. 3.2(d)]. The MEMS bridge is a bilayer metal composed of Ti/Au since the titanium is not removed from the bottom of the bridge. The last step is to remove the sacrificial photoresist by soaking the 'MICROPOSIT S1813 is a registered trademark of Shipley Company Inc., Newton, MA. 28

Evaporated Au Quartz (a) Silicon Nitride Quartz (b) Photoresist....... xx ---::-::-::-::: xx:. Qu:-:-:.r:-:.-: Quartz (c) Plated Gold Quartz (d) MEMS Bridge Quartz (e) Figure 3.2: Details of the fabrication process for the MEMS bridges. The illustrations show a cross-sectional view of a DMTL. 29

Figure 3.3: General model for a periodically loaded transmission line with series impedance Zs and shunt admittance Yp. wafer in a solvent. At this point, the wafer cannot be air dried because the surface tension of the liquid will pull the MEMS bridges down, causing them to stick to the substrate. Therefore, the wafer is placed in denatured ethanol and a critical-point drying system is used to release the MEMS bridges [see Fig. 3.2(e)][341. For the purpose of testing, a short section of high impedance line is added at either end of the DMTL. The periodic segments of the DMTL consist of a high impedance line of length s with the MEMS bridge in the center of the section. The extra length of line at either end is (s - w)/2 long, for most of the designs, and contains the transition from the 50 Q feedlines to the DMTL as shown in Figure 3.1. 3.2 Analytic Modeling of Distributed Lines The general model for a periodically loaded transmission line is shown in Figure 3.3 [44]. Assuming a complex propagation constant 7y = ae+j/, where a is the attenuation per section and 3 is the phase per section, a forward traveling wave is represented by: Vn+- = Vne- (3.1) Using Figure 3.3, the voltages and currents are found to be: In- 1-In, Vn = (3.2) Yp Vn-1 - Vn Vn - Vn+1 In-i = and In = Zs Zs Substituting the current equations for In-1 and In into the voltage equation for Vn, the following equation is found [44]: ZYp Vn-I + Vn+l eO + e-= 1 + = cosh (7) (3.3) 2 2V= 2 30

which relates the propagation constant, 7y, to the series impedance and shunt admittance of the line. Using these equations, the characteristic impedance of the line can be found from Z - Vin/Iini or moving to the middle of the line: Vn+l/2 Vn-1 - 2Vn + Vn+1 1 Zs In Vn-Vn+ YP 2 ZseW (34) 2 sinh (7/2) 2 where Vn+l/2 = Vn- I~Z,/2. It is important to define the characteristic impedance at a point of symmetry in order to find the correct impedance value. Using the half-angle formula for the hyperbolic sine in (3.4), the characteristic impedance of the loaded line is found to be [44]: z ~SYP (35) If a section of length s of unloaded transmission line is used with characteristic impedance Zo and effective dielectric constant eeff then Zs = jwsLt and Yp = jws(Ct, where C: = /eff/(cZo) and Lt = CtZ2 are the per unit length capacitance and inductance, respectively, of the unloaded transmission line. Substituting these values into (3.5) will give: [ t - 282CtLt 2~L + c 1- = + C - - (3.6) Ct 4 C t 1 B where wB = 2/(sLWtCt) is the Bragg frequency, or the frequency at which the characteristic impedance goes to zero, indicating that no power transfer can occur at this frequency. Since this example is for an unloaded line, the length of the section s can be made arbitrarily small, and as s - 0 it is found that WB - oo and Z /- = ZO as is expected for an unloaded line. For the distributed MEMS transmission line, the MEMS bridge can be modeled as a shunt capacitor, resulting in a loaded-line model as shown in Figure 3.4 where Cb is the shunt capacitance due to the MEMS bridge, and s is the periodic spacing of the bridges. Using this model the series impedance is jJsLt and the shunt admittance is jw(sCt + Cb). The characteristic impedance found using (3.5) is given by: z = (C- + C) = L 1- (CO) (3.7) VsCt + Cb 4 VCC +W V W3 31

Figure 3.4: Lumped element transmission-line model of the DMTL assuming the MEMS bridge can be represented by a capacitor C(b. Lt and Ct are the per unit length inductance and capacitance, respectively, of the unloaded transmission line, and s is the spacing between the MEMS bridges. By setting this impedance to zero and solving for w, the Bragg frequency is found to be: 2 vsLt (sCt + C(b) (3. 8) It can be seen that well below the Bragg frequency, the impedance of the line is given by V/L/C where L = sLt and C = sCt + Cb. The time delay per section of the loaded-line is determined from (3.3) by assuming a lossless line and using the model in Figure 3.4 [44]: v = -- Ws cos-1 (1 - 2w2/W) - (3.9) ~sLt (sCt + Cb) 1 + +- + '" where T is the time delay per section. At frequencies well below the Bragg frequency, the phase velocity can be approximated as s/ LC. From (3.9) it is seen that by varying the MEMS bridge capacitance, Cb, the phase velocity of the transmission line can be varied resulting in a variable delay line or true-time delay (TTD) phase shifter. In reality, the MEMS bridge cannot be entirely modeled by a single capacitor due to the presence of some inductance and resistance in the bridge. In the circuit modeling of measured DMTLs (see Section 3.5), it is found that the inductance is large enough to have a very noticeable effect on the device performance while the effect of the resistance is almost negligible. When an inductance, Lb, is included in series with the bridge capacitance, the shunt 32

admittance becomes: Y s C 1 - WjCb (3.10) p1 - ujLbCb and the equation for the characteristic impedance becomes: z st 1t - - WLCb (3.11) $Ct+ q-wl2LbCb 4 4(1 Setting this equation to zero and solving for w, the resulting Bragg frequency is found to be: lb- Vb2 -4ac WB - b2a- (3.12) 2a a = s2LtCtLbCb b = s2LtCt + sLtCb + 4LbCb c = 4 For most of the DMTLs designed in this work, the inductance in the bridge has been found to be 10-30 pH. Table 3.1 shows the calculated Bragg frequencies versus several values of bridge inductance for a line with an unloaded impedance of 100 Q, an unloaded effective dielectric constant of 2.5, a periodic spacing of 200 umu, and a bridge capacitance of 40 fF. As can be seen, including the series inductance of the bridge has a significant effect on the position of the Bragg frequency. Table 3.1: Bragg Frequency Calculations from (3.8) and (3.12) Lb (pH) fB (GHz) 0 137.9 10 123.3 20 111.9 30 102.9 Zo = 100 Q, eeff = 2.5, s = 200 rnm, Cb = 40 fF. 3.3 Loss on Distributed Lines Anytime a transmission line is loaded such that the impedance is changed, the loss of the line is also changed due to a change in the amount of current on the line for the same 33

amount of power. For example, if a high impedance line is capacitively loaded to a lower impedance, the current on the lower impedance line will be higher, thus increasing the I2R losses. This can be seen directly by considering the complex propagation constant for a lossy transmission line. If the transmission line is represented by series inductance and resistance per unit length, Lt and Rt, and by a shunt capacitance and admittance per unit length, Ct and Gt, respectively, then the propagation constant is given by [10]: 7 = [(Rt + jwLt)(Gt + jWCt)]1/2 (3.13) For a low loss line were Rt < wLt and Gt < wCt, the propagation constant can be approximated as: yjwv LtCt + LC t +-t + ji (3.14) 2 Lt Ct Assuming the characteristic impedance can be approximated by Z = L'/Ct, the attenuation constant a is: Rt GtZ 2Z + 2 (3.15) impedances. at mission -wlinve frequencies), the conductor loss dominates and the attenuatioen constant can be approximated as cal = Rt/(2Z). Thus, a change in the characteristic impedance fron a high impedance to a low impedance will increase the loss by a factor of the ratio of the impedances. The transmission loss can also be included in the model of the distributed MEMS transmission line (Figure 3.4) by including a resistance Rs in series with the line inductance, sLt. In this case the series impedance becomes Zs = jwsLt + Rs. To find the attenuation constant, (3.3) is expanded to give: W 2LC *wRsC cosh y = cosh a cos p + jsinh a sinl = - + 2 2 = 1-2 ) +j( ) (3.16) UB WBI Z where L = sLt, C = sCt + Cb, and the low frequency approximations have been used for WB and Z. By equating the real parts and assuming a is small (coshoa - 1), the equation 34

for the phase delay per section is found to be 3 = cos-1(l - 2w2/w2) ~ 2w/jWB. To find the attenuation per section, the imaginary parts are equated giving: sinh _ (w/aB)RS/Z Rs siI a- - a - (3.17) sin(2w/WB) 2Z ( where Z is now the impedance of the loaded line. This result matches what was derived earlier in the unloaded case. The only difference is that in the unloaded case, a is the attenuation per unit length (Np/m), while in the distributed case, a is the attenuation per section (Np). The effect of a series resistance in the bridge can be taken into account by placing a resistor Rb in series with the bridge capacitance in Figure 3.4. In this case, (3.3) becomes: jco sLt (. ^, Cb +C Rb\ cosh(a + j/) = 1+ ~ (jwsCt + 1 + 2R2C 1 + bW2R2C ) Cb 1-2(W) J ( )3 4Rb Cl3 + -C + (3.1.8) WB WB- Z sCt +Cb where wB = 2/ sLt(sCt + Cb), Z L= SLt/(sCt + Cb) and a low frequency approximation has been used for 1 + w2RR2Cb2 1. Using w < WB, the propagation constant is found to be: a+j3f cosh1 K2(w )2 K) 4R) (4i2.c-b)2] aWB WB — 2 sCt + Cb[ ' 22w Rb Z bCW. -- +R (3.19) JB 2 Combining this loss with the transmission line loss, the total loss per section for a distributed MEMS transmission line is [44]: - + RbZC2 (3.20) 2Z 2 For a line with an unloaded impedance of 100 Q, an unloaded effective dielectric constant of 2.5, a periodic spacing of 200 pim, a bridge capacitance of 40 fF, a loss of 0.6 dB/cmn at 20 GHz for the unloaded line, and a bridge resistance of 0.1 Q at 30 GHz the loss from the transmission line is 1.6 and 2.5 dB/cm at 30 and 60 GHz respectively, while the loss from the bridge resistance is 0.05 and 0.28 dB/cm at 30 and 60 GHz. Thus, for these typical parameters, the loss is dominated by the transmission line loss. 35

Radiation loss is also present in an unloaded CPWV line on a thick dielectric substrate because the wave velocity of the transmission line is greater than the phase velocity of the waves in the dielectric [46]. This loss is given by: Gad - (3.21) - (7T\5 1 (1- Er) f3S2 arad = 2) iT + r cK(k)K(k') W k = k2 = 1- k2 where S = W + 2(3 is the ground-to-ground spacing of the CPW line and K(k) is -the complete elliptic integral of the first kind. This radiation into the substrate occurs primarily around the angle: cos = kz/kd (3.22) where kz is the propagation constant of the line and kd is the propagation constant in the dielectric. For the DMTLs used in this work, the wave velocity of the transmission line is slower than the phase velocity of the dielectric. Therefore the angle necessary to phase match the wave on the transmission line to the wave in the dielectric, 4', becomes imaginary indicating that radiation, and therefore radiation loss, cannot occur. This will be discussed further in Section 4.3. 3.4 DMTL Circuit Modeling Although the analytic model presented in section 3.2 provides a good general understanding of the operation of distributed lines, it is desirable to have a circuit model as well which can be used in a linear circuit simulator. The simulator used for the modeling of the DMTLs is HP EESof's Libra2. Using the circuit elements available in Libra, the model shown in Figure 3.5 was developed for a single section of the DMTL. The model consists of a section of physical transmission line to represent the unloaded CPW line and a capacitor-inductor series combination shunted across the transmission line to represent -the MEMS bridge. The entire DMTL is modeled in the simulator by cascading the necessary number of sections along with the added lengths of high impedance line at the ends. In 2HP EESof Communications Design Suite v6.0, Hewlett-Packard Company, Santa Clara, CA, 1995. 36

Zo, s, A, Feff Figure 3.5: Circuit model used for a section in the DMTL simulation where Z, is the unloaded line impedance, s is the periodic spacing of the MEMS bridges, A is the attenuation in dB/cm of the unloaded line, Ceff is the effective dielectric constant of the unloaded line, Cb is the MEMS bridge capacitance. and LI) is the bridge inductance. this approach, the unloaded line impedance, ZO, the spacing of the MEMS bridges, s, the number of sections, n, and the effective dielectric constant of the unloaded line, Eeff, are determined from the physical dimensions of the DMTL being modeled. The unloaded line attenuation, A, bridge capacitance, Cb, and bridge inductance, Lb, are all varied to fit the model to the measured data. The attenuation in the physical transmission line model is specified at a particular frequency and then follows a f/f variation. 3.5 DMTL Measurements Measurements of the DMTLs were taken using an HP8510C for 2-40 GHz and an HP8510C with a U-band millimeter-wave test set for 40-60 GHz. The measurements were calibrated using NIST's MultiCal3 TRL calibration routine an(1 TRL standards fabricated on-wafer. MultiCal de-embeds the effective dielectric constant and loss from the measured TRL lines. Therefore, a comparison of the DMTLs with the unloaded CPW lines can be made by constructing the necessary TRL standards in both types of lines, The unloaded CPW lines used for this purpose are 96 Q lines (W = G = 100 tm) with a 5000 A thick center conductor and the DMTLs used these same 96 Q lines with 30 pm wide bridges spaced at 306 Mur, resulting in a Bragg frequency of approximately 124 GHz. Figure 3.6 shows the loss and Figure 3.7 shows the effective dielectric constant for both TRL calibrations. The dashed line in Figure 3.6 is an estimate of the DMTL loss calculated by multiplying 3MultiCal is a registered trademard of NIST, 325 Broadway, Boulder, CO 80303. 37

0 -0 / 2.0 1.5 1.0 0.5 0.0 0 10 20 30 40 Frequency (GlHz) Figure 3.6: Measured loss of a 96 Q CPW line (with a 5000 A thick center conductor) and a 61 Q distributed MEMS transmission line. The loss is backed out of TRL calibration data. The estimated loss is computed from the CPW line loss by multiplying it by a factor of 96/60 = 1.6. 8 71 6 CPW Line (96 Q) -x- Distributed MEMS Line (60 Q) o 5 4 3 2.. I. I. I.... I.... I... I... I.. I i I 0 10 20 30 40 50 60 Frequency (GHz) Figure 3.7: Measured effective dielectric constant of a 96 Q CPW line and a 61 Q DMTL. 38

the measured loss of the 96 Q CPW line by the ratio of the unloaded impedance to the loaded impedance 96/60 = 1.6. As can be seen, this estimate works fairly well at the lower frequencies, but tends to underestimate the loss at higher frequencies. This is most likely due to the added loss in the bridges and the extension lengths (see Fig. 3.1) which are not accounted for in the estimate. The measured effective dielectric constant of the unloaded CPW lines has an average value of 2.37 and is nearly invariant with frequency. This value agrees very closely with the static value of 2.34 computed using the static-field solver, Maxwell4 2D. In comparison, the measured effective dielectric constant of the DMTL with the extension sections (see Fig. 3.1) is 6.7 from 18-33 GHz and slowly rises to 7.3 at 60 GHz. Using a TRL calibration of the CPW feedlines with the reference planes as shown in Figure 3.1, DMTLs with different width bridges and periodic spacing were measured. Figure 3.8 shows the measured S-parameters of a line with 16 30-um wide MEMS bridges spaced at 306 pim (total length = 5.17 mm) with a nominal MEMS bridge height of 1.5,tm and a bridge thickness of 2.5 tm. The loaded line impedance (Z = 61 Q) is calculated from the first peak in Sli, knowing that the line is behaving as a quarter-wave transformer at this frequency. The loading capacitance, Cb, is therefore calculated to be 24 fF from (3.7), using the static values of ZO = 96 Q and ceff = 2.37 (W = G =100 pm) to obtain Lat and Ct. This capacitance agrees very well with the value of Cb = 23.8 fF found by simulating a single MEMS bridge using the static-field solver, Maxwell 3D1). The 23.8 fF bridge capacitance can be broken into a parallel-plate capacitance, C0H = eA/d = 17.7 fF, and a fringing capacitance, Cf = 6.1 fF. Thus, the fringing capacitance is quite high (- 26%) and cannot be neglected in the analysis of the DMTLs. Using the circuit model given in section 3.4 and fitting it to the measured data, the parameters listed in Table 3.2 are found. The simulated S-parameters found using this fitted model are plotted along with the measured data in Figure 3.8 from which it is seen that excellent agreement is obtained from 0 to 60 GHz. Using Cb = 25 fF and Lb = 23 pH, the calculated effective dielectric constant, from (3.9). is 6.0 which underestimates the TRL de-embedded value of 6.7. 4Maxwell is a registered trademark of Ansoft Corp., Pittsburg, PA, 15219 39

0 od- eled -20 -30... 0 10 20 30 40 50 60 Frequency (GHz) Figure 3.8: Measured and simulated S-parameters of a DMTL with 16 30-=m wide MEMS bridges spaced at 306 arm (total length = 5.2 mm, Z = 61 Q, fE? = 129 GHz). Table 3.2: Fitted Model Parameters for DMTL with w/s = 30/306 umr Cb 25 fF Lb 23 pH A(@ 20 GHz) 0.52 dB/cm Set parameters are: Zo=96 Q, eff:=2.37, n=16. The effective dielectric constant can also be calculated using two adjacent nulls in S11 and the total length (I = 5.17 mm) of the distributed line. A value of 6.8-7.1 is obtained up to 40 GHz which agrees well with the TRL measured value of 6.7. The reason for the discrepancy between the measured value and that calculated from (3.9) is due to the added length of high impedance line at either end of the DMDATL, mentioned in section 3.1, which is included in the measured line. The effect of this added length of line can be seen in the reflection coefficient plotted on a Smith chart in Figure 3.9. At low frequencies, the input impedance is seen to circle around 60 Q, as is expected of a 61 Q line bound by two 50 Q ports. However as the frequency increases, the input impedance circles a point in the inductive part of the Smith chart. According to (3.11), the characteristic impedance of a distributed line should remain real as the frequency increases from zero to the Bragg frequency. In order to verify that the characteristic impedance of the DMTL does remain 40

-J I Figure 3.9: Measured Sll from 0-60 GHz for a DMTL with 16 30-pm wide bridges spaced at 306 ptm. -ji Figure 3.10: Measured S11 from 0-60 GHz for a DMTL with 16 30-8/m wide bridges spaced at 306,um with the 138,um long high-irnpedance lines de-embedded. 41

real with frequency and that the imaginary part of the center of the circles seen in Figure 3.9 is a result of the added lengths of line at the input and output of the DMTL, these lines are de-embedded from the measured data using ABCD matrices. If the measured data, with the added line lengths, is given by [M], then the de-embedded data, [S], is given by: [L] [S] [L] [M] [S] = [L]-' [] [L]-' (3.23) where [L] is the ABCD matrix for the length of high impedance line. For the 30/306 pim line, the added length is (s - w)/2 = 138,um. Using Libra to generate the S-parameters for the 138 ym length of 96 Q line with Eeff = 2.37, the de-embedded data is plotted in Figure 3.10. It is now seen that the input impedance does circle the real axis from 2-60 GHz, indicating a real characteristic impedance of the DMT'L. The characteristic impedance also decreases slightly with frequency, as predicted by (3.7). This de-embedded data can now be used to find the effective dielectric constant by using a new total line length of 16 x 306 um = 4.9 mm. The first three adjacent nulls in S11 give 6.06-6.36 which is in much closer agreement with the calculated value of 6.00 from (3.9). The calculated Bragg frequency of this line, using b = 25 fF and Lb = 23 pH, is 114 GHz from (3.12). Using the circuit model with parameters listed in Table 3.2, Libra gives a Bragg frequency of 124 GHz. The added lengths of line at either end of the DMTL have almost no effect on the Bragg frequency. The measurement shown in Figure 3.11 is of a DMTL with 16 60-ytm wide MEMS bridges spaced at 640 /tm (total length = 10.8 mm). The loaded line impedance is 62 Q determined from the first peak in S1 at 2.8 GHz. The calculated MEMS bridge capacitance from (3.7) is Cb = 48 fF, which agrees fairly well with the value obtained from the static-field solver, Maxwell 3D, of Cb = 42.5 fF (C1 = 35.4 fF, Cf = 7.1 fF). The difference could be due to a slight bowing in the MEMS bridge causing the height to be less than 1.5 /hm. Fitting the circuit model to the measured data, the parameters listed in Table 3.3 are found. The simulated results, shown in Figure 3.11, are seen to be in excellent agreement with the measured data and show that the circuit model is valid even when approaching the Bragg frequency of the line. The calculated effective dielectric constant for Ch) = 48 fF and 42

0 -10 c-20 -30....-...... '.. - 0 10 20 30 40 50 60 70 80 Frequency (GHz) Figure 3.11: Measured and simulated S-parameters of a DMTL with 16 60-tm wide MEMS bridges spaced at 640 /imn (total length =: 10.8 mm, Z = 62 Q, fA = 62 GHz). Table 3.3: Fitted Model Parameters for DMTL with w/s = 60/640,/m Cb 48 fF Lb 14 pH A(@ 20 GHz) 0.6 dB/cm Set parameters are: Zo=96 Q, efj,=2.37, n=16. Lb = 14 pH is 5.7 while the measured value obtained from adjacent nulls in S11 is 6.2-6.5. After de-embedding the extension lines at either end of the DMTL, the effective dielectric constant is calculated from the measured data to be 5.7-6.1 (I = 16 x 640 pm= 10.2 mm) which is in agreement with the value calculated from (3.9). According to (3.11), the characteristic impedance of this line should go from 62 Q at low frequencies to 50 Q at 35 GHz and then to 0 Q at 61 GHz. However, the measured results in Figure 3.11 show no indication, in the form of the peak of S11 falling below -30 dB, that the characteristic impedance of the loaded line goes through 50 Q. This is also an effect of the added lengths of line at either end of the DMTL. Figure 3.12 shows that the input-impedance circles are centered on points in the inductive part of the Smith chart and thus the centers never pass through 50 Q on the Smith chart. For this case, the line lengths at either end of the DMTL are 290 pAm long. When these lines are de-embedded from the measured data, using the ABCD matrix approach, the results seen in Figure 3.13 are 43

Figure 3.12: Measured Sll from 0-60 GHz for a DMTL with 16 60-pm wide bridges spaced at 640 /im. -Il Figure 3.13: Measured S11 from 0-60 GHz for a DMTL with 16-60,um wide bridges spaced at 640 Am with the 290 pm high impedance lines de-embedded. 44

found. It is seen that the input impedance is always centered on the real axis, and that the measured loaded-line impedance does indeed pass through the center of the Smith chart. However, the measured loaded-line impedance does not reach 50 Q until 45 GHz rather than the predicted frequency of 35 GHz using (3.11). Although the impedance of this line is approximately the same as the first line (~ 62 Q), this line has a much lower calculated Bragg frequency, 61 GHz according to (3.12), due to the larger loading capacitance and periodic spacing. The Libra circuit model, using the values given in Table 3.3, gives a value of 70 GHz as seen in Figure 3.11. An important observation is that both distributed lines (Figure 3.8 and Figure 3.11) show that the peak of the reflection coefficient approaches -10 (lB at approximately half of the Bragg frequency when the added high impedance lines at either end of the DMTL are (s - w)/2 long. This is important when designing DMTLs for a specific frequency range. 3.6 Comparison of Analytic and Circuit Model In order to quantify the accuracy of the analytic model given in (3.3) and (3.5), the LC equivalent model is used to derive the S-parameters which are given by: 0 e-a S = (3.24) e-a 0 where 7y is the propagation constant per section and n is the number of sections in the DMTL. These S-parameters are referenced to the characteristic impedance of the DMTL given by (3.11). In order to compare these S-parameters with the Libra circuit simulation, they must be referred to 50 Q. This is done by converting the S matrix in (3.24) to a Z matrix and then back to an S matrix with a reference impedance of 50 Q. The DMTL parameters for the first comparison are given in Table 3.4 with the Sparameters shown in Figure 3.14. As can be seen for this DMTL, the analytic model gives a good approximation up to 90 GHz and is reasonable even up to the Bragg frequency. This DMTL has a low-frequency characteristic impedance of 47 Q and an effective dielectric constant of 10. The Bragg frequency calculated from the analytical model is 124 GHz while the circuit model results in a simulated value of 128 GIlz. 45

0 c? r -1 7) q cs E Ad VI v:4 -10 -20 -30 -40 0 30 60 90 120 150 Frequency (GHz) (a) (b) Figure 3.14: Comparison between the circuit model and analytical model for the DMTL with parameters listed in Table 3.4. 46

Table 3.4: DMTL parameters for Table 3.5: DMTL parameters for Figure 3.14. Figure 3.15. Zo 96 Q eeff 2.37 s 197 /m Cb 34 fF Lb 20 pH A(@ 20 GHz) 0.52 dB/cm n 16 Zo 96 Q eeff 2.37 s 640 im Cb 48 fF Lb 14 pH A(@ 20 GHz) 0.6 dB/cm n 16 The parameters for the second comparison are given in Table 3.5 with the S-parameters shown in Figure 3.15. The low frequency impedance of this line is 62 Q and the dip in S11 due to the impedance passing through 50 Q is seen in both models. The effective dielectric constant at low frequencies is 5.7. The analytic model gives a good approximation up to 30 GHz, however, beyond that the models diverge rather quickly. The analytic model gives a calculated Bragg frequency of 61 GHz while the circuit model gives a simulated Bragg frequency of 70 GHz. This cannot be seen on a Smith chart representation since there is no frequency reference for the plotted data. In general, the accuracy of the analytic model improves with both shorter periodic sections and increased loading. The increased accuracy with shorter periodic sections is due to the lumped elements, s Ct and s - Lt, giving a better approximation to the transmission line. The increased accuracy due to the increased loading is a result of the bridge capacitance having a more dominant affect so that the error in the lumped element approximation of the transmission line does not carry as much weight in the analysis. 3.7 Conclusion Distributed MEMS transmission lines have been developed and tested up to 60 GHz. The DMTLs are fabricated using CPW lines on a quartz substrate with MEMS bridges periodically spaced across the line. An analytic model and a circuit model have been developed. The analytic model gives a good approximation of the performance at frequencies well below the Bragg frequency and can provide a reasonable approximation up to the Bragg frequency. This model provides an invaluable tool for designing DMTLs. The circuit model 47

0 -10 - A Analytical Model IY 1 -20 E -30 -40 0 20 40 60 80 Frequency (GHz) (a) 0. Jo. -j0. -jl (b) Figure 3.15: Comparison between the circuit model and analytical model for the DMTL with parameters listed in Table 3.5. has been shown to model the DMTL very well, even at frequencies approaching the Bragg frequency. The circuit model consists of a physical length of transmission line for the CPW line and a capacitor-inductor series combination to model the MEMS bridge. The circuit model has also been used to quantify the accuracy of the analytic model. 48

CHAPTER 4 Distributed MEMS Transmission Line Phase Shifters This chapter presents the design and optimization of distributed MEMS transmission line (DMTL) phase shifters. The development of electronically variable phase shifters has been driven primarily by their usefulness in phased array radars, although they are now used in a wide range of systems including communications and measurement instrumentation [27]. Most phase shifters currently used can be divided into either ferrite phase shifters or semiconductor device phase shifters. The ferrite based phase shifters typically work well from 3 GHz to 60 GHz with switching times on the order of a few microseconds to tens of microseconds [21, 22]. Most ferrite based phase shifters are not monolithic and require large switching energies but can handle kilowatts of RF power [9]. Recently, there has been research into the use of the ferroelectric material barium strontium titanate [Bai-,SrTiO3 (BSTO)] to produce planar phase shifters [12]. The recent results demonstrate 44~/dB insertion loss at 14.3 GHz, however, these devices require very high bias voltages (250 -400 V) and suffer from increased losses above 20 GHz f56]. On the other hand, semiconductor device based phase shifters have been used up to 100 GHz with switching times well under 1 ps [2, 7, 16, 27, 32, 39, 49, 52, 59]. These devices are either hybrid or monolithic with switching powers on the order of milliwatts. The hybrid devices (p-i-n or varactor diodes) can handle up to a kilowatt of RF power, however, the monolithic devices can only handle RF power on the order of milliwatts to one watt [27]. There are many different designs for the semiconductor device based phase shifters. 49

Some of the more prominent designs are switched-line phase shifters [52], loaded-line phase shifters [49, 2], branchline or 3-dB coupler based phase shifters [39, 7, 59], and high-pass/lowpass phase shifters [32]. The loaded-line and high-pass/low-pass type phase shifters are inherently limited to at most 67% bandwidth, were as the switched-line phase shifter is true-time delay with the bandwidth limited by the high-frequency operation of the switches. Typical figures of merit for the semiconductor device based phase shifters are 144~/dB at 1 GHz [32], 2110/dB at 12 GHz [16], 86~/dB from 16-18 GHz [7], 600/dB at 60 GHz [39], and 41"/dB at 94 GHz [59]. Also, Goldsmith has shown 4-bit switched line phase shifters using NMEMS switches with an average performance of 279~/dB at 10 GHz and 138~/dB at 35 GHz [17]. Recently another type of true-time delay phase shifter, known as the distributed phase shifter, has been investigated by Nagra et al. [35, 36]. Another demonstration, albeit with poor performance, is presented in [62]. These devices are very similar to the distributed MEMS transmission lines, but use varactor diodes rather than MEMS bridges for the variable capacitance. The phase shifters developed by Nagra et al. have shown good performance with 86~/dB insertion loss at 20 GHz, or 4.2 dB insertion loss for 360~ phase shift. However, the millimeter wave performance of these devices is severely limited by the series resistance of the diodes which is typically 2-6 Q2, and the integration of the phase shifter on GaAs substrates. 4.1 Design As mentioned in Section 3.2, the DMTL can be used as a true-time delay (TTD) phase shifter since a change in the MEMS bridge capacitance changes the phase velocity of the line (see (3.9)). The change in the bridge capacitance is achieved by applying a single bias voltage to the center conductor of the DMTL with the CPW ground planes acting as a DC ground as well. This application is demonstrated in Figure 4.1(a) which shows the phase shift versus frequency, for varying bias voltages, of a DMTL with 32 30-,um wide bridges spaced at 306 pm. The unloaded line impedance is 96 Q (W = 100 /pm and S = 300 Pm) with an effective dielectric constant of 2.37. As can be seen, the phase shift increases linearly 50

Table 4.1: Modeling parameters for DMTL in Figure 4.1. Cb(O V) 28 fF Cb(22 V) 32.6 fF Lb 18 pH A(@ 20 GHz) 0.6 dB/cm with frequency as expected for a TTD type phase shifter. There is some deviation from this linear increase at the upper end of the frequency range which is a result of approaching the Bragg frequency at 120 GHz. The maximum phase shift is 118~ at 60 GHz with an associated insertion loss of 2.1 dB. The maximum time delay, at a bias voltage of 22 V, is 4.5 ps using the linearly extrapolated value of -98~ at 60 GHz. The change in the phase velocity is also manifested in the spacing of the nulls in the reflection coefficient seen in Figure 4.1(b). The reflection coefficient of the DMTL under 22 V bias has more closely spaced nulls indicating that the line is electrically longer than when the bias is 0 V. Since the physical length of the DMTL has not changed, the phase velocity of the line has decreased, as expected. The effective dielectric constant, calculated from the first three nulls in the reflection coefficient, is found to change from 7.2 at 0 V to 8.3 at 22 V. Using the circuit model presented in Section 3.4, the phase shift can be modeled as shown in Figure 4.1(a) using the parameters given in Table 4.1. It is seen that the match between the measured and modeled phase shift is nearly perfect. In addition to effecting the phase velocity, the change in bridge capacitance also changes the characteristic impedance, as indicated in (3.7). This effect can be seen in Figure 4.1(b) in which the peak in the low-frequency reflection coefficient at 2.7 GHz is seen to change from -15.7 to -18.4 dB. This peak in reflection coefficient occurs at a frequency where the DMTL is a quarter-wave length long and the input impedance, seen from the 50 Q feedline, is at a maximum given by [41]: z2 Zin = ~ (4.1) where Z is the characteristic impedance of the DMTL. Thus, the characteristic impedance of the DMTL in Figure 4.1 changes from 59 Q at 0 V to 56 Q at 22 V. It should be noted that although this is the same DMTL design as shown in Section 3.5, the impedance is calculated 51

0 -20 _ -40 ct X -60 < -80 — 100 -120 0 10 20 30 40 Frequency (GHz) 50 60 (a) 0 -10 -20 -30 0 10 20 30 40 50 60 Frequency (GHz) (b) Figure 4.1: Measured (a) phase shift and (b) S-parameters for a DMTL with 32 30-pm-wide bridges spaced at 306 /m (total length = 10.1 mm) for varying bias voltage. The phase shift at 22 V is modeled with the circuit parameters given in Table 4.1. 52

to be 59 Q rather than 61 Q. In addition, the modeled zero-bias bridge capacitance is 28 fF rather than 25 fF. These differences are most likely due to process variations in the bridge height resulting in a slightly different loading capacitance. The measured DMTL in Figure 4.1 has a capacitance ratio (Cmax/Cmin) of 1.16, so the impedance change is relatively small. However, if this capacitance ratio could be made much larger (5-10), the characteristic impedance of the DMTL would change by significant amounts causing undesirably large reflection coefficients. In this case, the DMTL should be designed such that the variation in characteristic impedance results in the same maximum allowable reflection coefficient in the low and high bridge capacitance states. For example, if it is desired to have the maximum reflection coefficient remain below -15 dB, then the characteristic impedance should be 60 Q in the low capacitance state and 42 Q in the high capacitance state. In general, the upper and lower bounds of the characteristic impedance, for a given reflection coefficient, are given by: 1 + Sl 1/2 I- Si 1/2 Zl= 150 1 and Zd = 50 ( S (4.2) 1 - S1/ 1 + S11 where Z1u and Zid are the DMTL characteristic impedances for the low and high bridge capacitance states, respectively. Using (3.7), the minimum and maximum bridge capacitances are found to be: sLt I - Si, sLt 1 + S,\ Cmin - li sCt and Cmax - sCt (4.3) 502 l+S11 502 1 - Sll From these equations the capacitance ratio, Cr = Cmax/Cmin, is found to be: =C =oz (+ i) - 502 = (4.4) Cmn Z- (-S l)- 502 where Zo =- V/Lt/Ct is the characteristic impedance of the unloaded transmission line. Figure 4.2 shows this capacitance ratio versus the maximum allowable reflection coefficient for different unloaded-line impedances. It should be noted that the capacitance ratio is independent of the substrate dielectric constant. Also, this calculation is based on the low-frequency impedance and does not account for the effects of approaching the Bragg frequency shown in Section 3.5. It is seen that the usable capacitance ratio for a maximum reflection of -13 dB is around 3 for a 100 Q unloaded impedance. 53

12 10 80 Q 8 E U 120 Q - -20 -18 -16 -14 -12 -10 Si (dB) Figure 4.2: Capacitance ratio versus maximum reflection coefficient for unloaded-line impedances of 80, 100, and 120 Q. Of more importance for the DMTL phase shifter is the position of the Bragg frequency. The Bragg frequency, given by (3.8), dictates the upper frequency limit of the phase shifter. In this work, the upper frequency limit is defined to be where the return loss hits -10 dB. As was noted in Section 3.5, the peak reflection coefficient approaches -10 dB at approximately half the Bragg frequency, when the extension lengths at both ends of the DMTL are (s-w)/2 long. In addition, the Bragg frequency is dependent on the bridge capacitance such that the bandwidth should be defined e i using Cma rather than Cmin since Cmax will result in a lower Bragg frequency. A good example is Figure 4.1(b) where it is seen that the reflection coefficient at 22 V starts out below the 0 V case, but gradually rises above the 0 V case to -10 dB near 60 GHz, for a DMTL with a Bragg frequency of 120 GHz at 22 V bias. The design of a DMTL phase shifter requires the specification of the bandwidth or Bragg frequency, substrate or dielectric constant, unloaded impedance, and loaded impedance. From these specifications, the bridge capacitance and spacing can be determined from (3.7) and (3.8), and are given by: s (4.5j 7lfB /Lt (Crt(Cr - )CtZ2) C bO Ct (4.6) where in (3.8) the bridge capacitance and inductance have been set to Cb = Cr, Cb0o and 54

Lb = 0, respectively. The per unit length inductance and capacitance, Lt and (Ct, are given by [41]: Ct eff and Lt = CtZ2 (4.7) cZo in which 6r,eff is the effective dielectric constant of the unloaded transmission line and c is the free-space velocity. For the case where the DMTL is constructed using a CPW line, Zo and 6r,eff can be related to the physical CPW line parameters by a conformal mapping [20]: '9oK(k') z 4 ero K(k') (4.8) er,eff = 2 (4.9) k = W/S k' 1= v-k2 where W and S are the center conductor width and total width of the CPW line, respectively, r70 is the free-space impedance, and K(k) is the complete elliptic integral of the first kind. Using these equations, the DMTL phase shifter can be designed to a set of specifications. This initial design is then simulated using the Libra circuit model as discussed in Section 3.4. The Libra circuit model will give a more accurate value of the Bragg frequency from which the design can be fine tuned, using iterative methods, to the desired specifications. 4.2 Optimization 4.2.1 Theory The optimization method used in this section is based on the work of Rodwell et al. [45, 44] which presented the first known analysis of loss in distributed non-linear CPW lines. The distributed line analysis was significantly extended to optimize for best phase shift by Nagra et al. [36]. In this thesis, we apply a method similar to Nagra to the case of Table 4.2: Specifications for examples in Figures 4.3-4.7. Zlu 48 Q fB 120 GHz Cr 1.2 55

MEMS bridges to obtain the maximum amount of phase shift for the minimum amount of insertion loss in distributed MEMS phase shifers. In order to carry out this optimization, analytic expressions for both the phase shift per unit length and the insertion loss per unit length must be found. In addition, a set of design constraints must be specified which, for this optimization, are listed in Table 4.2. The choice of 48 Q for the zero-bias loaded impedance, Zju, is a compromise between higher phase shift but increased return loss and reduced bandwidth for a lower loaded impedance. The Bragg frequency in Table 4.2 is set to 120 GHz in order to limit the return loss to -10 dB up to 60 GHz as discussed in Section 4.1, while the capacitance ratio was determined to be 1.2 from previous DMTL measurements. The optimization analysis is carried out for silicon, quartz, and air substrates with the total width of the CPW, S, chosen to be approximately Ad/8 and Ad/5 at the maximum operating frequency of 60 GHz. A total width of Ad/8 is typical for CPW designs in order to limit radiation loss, however, as mentioned in Section 3.3, the DMTL should not suffer from radiation loss and therefore a larger total width, Ad/5, is usable. Phase Shift The phase shift is found from the change in the phase constant given by:; (4.10) Vl v2 Using the capacitance ratio, C, and (3.9) for the phase velocity, the phase shift is found to be: k = cov L (0 + 1- o+ (4.11) A wsCt sct (4.11) wZovereff (1 1 i) c Zl1U Zld Using this equation and (4.5)-(4.9), the phase shift per centimeter versus the center conductor width is calculated for DMTLs on silicon, quartz, and air at 40 GHz for the specifications listed in Table 4.2. As can be seen in Figure 4.3, the phase shift is much larger for narrow center conductor widths (high impedance). This is due to the larger loading capacitance per unit length, Cbo/s, needed to load the line to 48 Q and therefore the change in bridge 56

Zo(Q) 103 93 86 80 75 71 90 80 72 66 61 56 O........ 67 64 61 52 49 46 Z,(Q) 162 145 133 123 115 108 102 96 91 140 123 110 100 91 84 77 71 65 I <3 -0 -50 180 im -100 30 -150 -200 -250 20 30 40 50 60 70 80 90 100 W (jm) (a) E -100 - -150 -200 40 60 80 100 120 140 160 180 200 W (Im) (b) Zo(Q) 236 209 190 175 162 151 141 132 124 202 175 154 138 124 111 100 88 77 O0...........,.........,...,....,. E -eou -00 100 -150 -200 -250.......... 100 150 200 250 300 350 W (jim) (c) 400 450 500 Figure 4.3: Calculated phase shift per centimeter vs. the CPW center conductor width at 40 GHz for (a) silicon, (b) quartz, and (c) air with a capacitance ratio of Cr = 1.2. The total CPW width is Ad/8 and Ad/5, at 60 GHz, for each substrate, and the Bragg frequency is set to 120 GHz. The impedance for the corresponding center conductor width is given at the top of each plot. capacitance (from Cb, to 1.2. Cb,) has a larger effect on the phase velocity. In addition, it is observed that for the same substrate, the two different total CPW widths give the same phase shift for the same impedance. For instance, on quartz the 300 Pm total width line with a center conductor width of 100 Urm and the 500,/m total width line with a center conductor width of 167 pum have an impedance of 100 Q and a corresponding phase shift of 57

1.0......... 0.9 Measured Loss (t=0.8 gm) ---- Hoffmann (t=0.8 & 3 gim) 0.8................ 1.4 x Hoffmann (t=0.8 gm) 0.7 0.6 O 0.5, 0.4 gm -- --- - 0.3..... —. - 3 g 0.2.* 0.1 0.0 0 10 20 30 40 50 60 Frequency (GHz) Figure 4.4: Measured and calculated loss vs. frequency for a 300 spm total width unloaded CPW line on quartz with a 100 /tm wide center conductor (Zo == 100 Q). -115~/cm. The curve for silicon with a 180 mrn total width line is seen to hit zero degrees at a center conductor width of 92 /m, which corresponds to an unloaded impedance of 48 Q resulting in Cbo/s = 0 and no phase shift. Loss The transmission line loss for the unloaded CPW line is found from a conformal mapping technique and is given by Hoffmann [20]: 8.686 10-2Rs reff 4r1oSK(k)K(k') (1 - k2) 2S { 1(4W(1- )} t(1 + k) +~{7+in( t(1+ k) )) } (dB/cm) (4.12) where t is the metal thickness, Rs is the surface resistance given by Rs =- -/Jr// ^, and a is the conductivity of the metal. It should be noted that this equation significantly underestimates the measured loss of the CPW line on quartz. Figure 4.4 shows the measured and calculated loss versus frequency for a 300 ptm total width CPW line on quartz with a 100 /rn wide center conductor (Zo = 100 Q). The CPW line is 8000 A of gold with a conductivity of 3.3-10-7 S/m. Significantly less loss can be obtained, particularly at low frequencies, if a 3 mrn thick center conductor is used. In this case, the center conductor 58

3.0.-u 0 To "U.1 0 2.5 2.0 1.5 1.0 0.5 20 30 40 50 60 70 80 90 100 W (4m) (a) 2.0........ unloaded line loaded line (48 Q) 1.0 0.5 pm u - ---- 500 Pm 0.0............................... 40 60 80 100 120 140 160 180 200 W (pm) (b) 1.0 E - "0 ~/ 0.5 unloaded line loaded line (48 Q) 1600 pm 600p mM 1000 pm 0.0 100 150 200 250 300 350 400 450 500 W (ptm) (c) Figure 4.5: Calculated loss for the unloaded and loaded transmission lines at 40 GHz vs. CPW center conductor width for (a) silicon, (b) quartz, and (c) air substrates. The total CPW width is Ad/8 and Ad/5, at 60 GHz, for each substrate, and the Bragg frequency is set to 120 GHz. 59

between the MEMS bridges would be electroplated to 3 ttm while the section underneath the MEMS bridge would remain 8000 A thick. This was not done in this work for simplicity in fabrication, but will be done in future work (see Chapter 6). The line loss calculated from (4.12) is for a metal thickness of 0.8,tm which, at 40 GHz, is 1.8 skin depths. However, according to (4.12) and Figure 4.4, if the metal thickness is increased to 3 Eim the loss would decrease by a factor of 1.15 independent of frequency. This is known to be incorrect since the loss depends on the skin depth, and once the metal thickness reaches several skin depths, it will cease to decrease with increased thickness. Thus, (4.12) should not be used to predict the loss p)erformance of the line, but more as a guide to predict the trend of loss versus center conductor width. As can be seen, the equation from Hoffmann must be increased by a factor of 1.4, in this case, in order to match the measured results. Notice that above 40 GHz the unloaded CPW line is starting to radiate and this results in an adverse effect on the calibration standards and loss estimation using the TRL technique. The phase shift per dB loss derived in this section uses (4.12) without any modification and thus predicts much better performance than will actually be achieved. However, it is believed that the loss versus center conductor width trend is correct and thus, (4.12) can be used to find the optimal center conductor width. The loaded loss is calculated, as discussed in Section 3.3, by multiplying a by the ratio of the unloaded impedance, ZO, to the loaded impedance, Z, given in (3.7). The loaded impedance in the high capacitance state, Zid, is used since this gives the maximum loss due to the fact that it is the lowest impedance state. There is not a large change in the line loss since the line impedance is only changing by 3-4 Q for a capacitance ratio of 1.2. If the capacitance ratio is increased to 1.5, then the impedance change goes up to 7-8 Q. In this case, the DMTL, which starts at a loaded impedance of 48 Q, will change to a loaded impedance of 40-41 Q when bias is applied. This will result in a -13 to -14 dB reflection loss which is still within the design constraint of-10 dB. However, it may be desirable to reduce the reflection loss by changing the zero-bias loaded impedance to 52 Q so that the 7-8 Q impedance change will not adversely effect the phase shifter performance. Figure 4.5 shows the calculated line loss at 40 GHz for the unloaded and loaded CPW 60

1.4...-, -, 1.2 1.0 Loaded Transmission ' 0. Line Loss/ 0.8, 0.6 0.6 / 0 0.4 //B 0.15 Q 0.2 Bridge Loss 0.0 0 20 40 60 Frequency (GHz) Figure 4.6: Loaded transmission line loss and loss due to bridge resistance vs. frequency. The line loss is calculated from Hoffmann's equation for a 300 f/m total width CPW line with a 100 /pm width center conductor. The Bragg frequency is 120 GHz, the bridge spacing is 197 pm and the bridge capacitance is 34.6 fF. line for silicon, quartz, and air using the specifications listed in Table 4.2 and 8000 A of gold (o = 3.3 10-7 S/rn) for the metal thickness, t. As expected, the unloaded line loss increases as the dielectric constant increases due to smaller CPW line dimensions. In addition, the loaded line loss for silicon, with a 180 pm total CPW width, converges with the unloaded line loss at a center conductor width of 92 pm where the unloaded line impedance is 48 Q and the capacitive loading goes to zero. In the calculations of the loaded loss the bridge resistance has been ignored. This is acceptable for calculations up to 60 GHz since, as discussed in Section 3.3, the loss due to a bridge resistance of 0.15 Q at 30 GHz is 5% of the total loss of the loaded line at 30 G-Hz and 15% at 60 GHz. The loss due to the bridge resistance versus frequency is shown in Figure 4.6 for bridge resistances of 0.15, 0.3 and 0.6 Q. The calculation is for a 300 pm total width CPW line with a 100 pm width center conductor (ZO = 100 Q) loaded to 48 Q and a Bragg frequency of 120 GHz. The line loss is calculated from (4.12) and then multiplied by the ratio of change in impedance to arrive at the loaded loss. It is seen that the distributed phase shifter is line loss limited up to 60 GHz for bridge resistances of 0.15 and 0.3 Q, whereas for a 0.6 Q bridge resistance, the bridge loss starts to dominate above 50 GHz. 61

0 -20 -40 300 p.m -60 -80 I fi' I -1UU I 20 I........... I...................... 30 40 50 60 70 W (Pm) (a) 80 90 100 -80 -100 -120 -140 -160 -180 -200 500 pm -220 -240.............. 40 60 80 100 120 140 160 180 200 W (Pm) (b) -100.............. -150 -200 -250 6. 600 pm = -300 & —350 -400 -450 -5 0 0.................... 100 150 200 250 300 W (pm) 350 400 450 500 (c) Figure 4.7: Calculated phase shift per dB loss at 40 GHz vs. CPW center conductor width for (a) silicon, (b) quartz, and (c) air substrates with a capacitance ratio of Cr = 1.2. The total CPW width is Ad/8 and Ad/5 for each substrate and the Bragg frequency is set to 120 GHz. 62

-100 m -150 -200 <1 -250 C=1.5 -300. 40 60 80 100 120 140 160 180 200 W (ltm) Figure 4.8: Calculated phase shift per dB loss at 40 GHz versus center conductor width for a 300 /im total width CPW line on quartz. The capacitance ratio is varied from 1.2 to 1.5 with a loaded impedance of 48 Q and a Bragg frequency of 120 GHz. Optimization The optimal center conductor width (and unloaded impedance) is found by dividing the phase shift per centimeter by the loss per centimeter to find the phase shift per dB loss. Figure 4.7 shows the calculation at 40 GHz for silicon, quartz, and air substrates for a capacitance ratio of 1.2. The optimum center conductor width is seen to occur at 36 jim (S = 180 j/m) and 60 mrn (S = 300 jim) for silicon at an unloaded impedance of 75 Q, 100 im (S = 300 jpm) and 167 jpm (S = 500 jim) for quartz at an impedance of 100 Q, and 240 pm (S = 600 jm) and 400 jim (S = 1000 jum) for air at an impedance of 141 Qf. Also, the optimal phase shift per dB loss increases as the dielectric constant decreases and is -56C/dB (S = 180 jim) and -88~/dB (S = 300 mrn) for silicon, -136~/dB (S = 300 jim) and -215~/dB (S = 500 jm) for quartz, and -297~/dB (S = 600 jim) and -473~/dB (S = 1000 /im) for air. As seen from (4.11) and (4.12), the phase shift increases linearly with frequency and the loss increases as Vf, due to Rs. Therefore, the phase shift per dB loss will increase as NJ. Thus, for the 300 jim total width line on quartz the phase shift per dB loss increases from -96~/dB to -136~/dB to -166~/dB at 20, 40, and 60 GHz, respectively. The phase shift per dB loss can be considerably improved if the capacitance ratio, Cr, is increased to 1.3 or 1.5. This is seen in Figure 4.8 in which the calculated phase shift per dB 63

Table 4.3: Specifications of the DMTLs used to verify the optimization procedure. Zl, 48 Q fB 120 GHz S 300 um Cr 1.2 Table 4.4: Dimensions of the DMTLs used to verify the optimization. The Bragg frequency is calculated using Lb = 20 pH. Rb = 0.15 _Q at 30 GHz. W(pm) 50 100 150 Cbo(fF) 37.9 33.8 28.6 s(tm) 150 197 249 w(/~m) 80 35 17 fB(GHz) 119 122 127 loss versus center conductor width is plotted for a 300 im total width CPW line on quartz with varying capacitance ratios. The maximum phase shift per dB loss is increased from -136~/dB to -1940~/(B and -295~/dB for capacitance ratios of 1.2, 1.3, and 1.5, respectively. Therefore, it is necessary to obtain a large capacitance ratio for very low loss performance. 4.2.2 Experiment In order to verify the position of the optimal center conductor width, three DMT'L designs were fabricated on quartz with center conductor widths of 50, 100, and 150 jim with the specifications listed in Table 4.3. Using the design equations (4.5)-(4.9), the bridge capacitances and spacings for the three center conductor widths are calculated and shown in Table 4.4. When using the design equations, the bridge inductance is neglected, however this inductance has been shown, in Section 3.2, to have a large effect on the Bragg frequency. Therefore, in order to account for this effect, the Bragg frequency used in (4.5) is set to 140 GHz rather than the specified 120 GHz. The Bragg frequency is then calculated, including a bridge inductance of 20 pH, using (3.12). A constant bridge inductance is used, regardless of the bridge width, due to the fact that the bridge inductance is a weak function of the bridge width [33]. As can be seen in Table 4.4, the Bragg frequency is close to 120 GHz for all three cases. The bridge height for these designs is 1.2 Pm and the bridge widths are determined using the static-field solver Maxwell 3D, with the results given in Table 4.4. Figure 4.9 shows the calculated loaded and unloaded loss at 40 GHz, with Cr = 1.17, as well as the measured data points. The measured unloaded line loss is approximately a factor of 1.4 higher than the loss calculated from (4.12) as seen in Figure 4.4. However, as seen in Figure 4.9, 64

Zo (Q) 131 113 100 89 80 72 65 I c Unloaded Line 3.0 \ x o Measured Unloaded Line \ - - -Loaded to 48 2.5 \x Measured Loaded Line 2.0 1.5 -x 0.5 - - -) --- x1.8 1.0 xl.4 0.5 0.0 50 75 100 125 150 175 200 W (1tm) Figure 4.9: Unloaded (-) and loaded (- — ) line loss at 40 GHz. The calculated loaded line loss has been increased by a factor of 1.4 and 1.8, however, it is seen that the factor of 1.8 fits the measured loss best. The impedances for the labeled widths are included for reference. Zo (Q) 100 89 131 113 80 72 65 -40 -60 2 -80 ) -100 -0 -120 -0 -<l -140 -160 ~ ' I. ~... I... I. I... I!.... I ~... I I ~; I Cmax/min 1.17 x Cmax/Cmin = 1.30 ~ * I.... I.... I - - - I......... I 50 75 100 125 W (tm) 150 175 200 Figure 4.10: Calculated phase shift per dB loss at 40 GHz with capacitance ratios of 1.17, 1.3, and 1.5. Measured data points (x) are included for CPW center conductor widths of 50, 100, and 150 /,m. 65

Table 4.5: Circuit model parameters for the optimal DMTL (W = 100 /tm). bo (0 V) (fF) 34.6 Cbo(13 V) (F) 40.6 Lb (pH) 11 A @ 20 GHz (dB/cm) 0.46 ZU (Q) 47 Zd (Q) 45 the calculated loaded loss, using the same factor of 1.4, does not match the measured loaded loss. Instead, a factor of 1.8 matches the measured results. The reason for the difference in the multiplication factor is unknown. The difference could be due to additional loading effects, such as a change in the current distribution on the transmission line, which are nriot accounted for in the formulation of the loaded line loss. It should also be mentioned that Muldavin et al. have shown that the bridge resistance does not vary much with bridge width and thus, a constant bridge resistance of 0.15 Q at 30 GHz is used for all three cases in Table 4.4 [33]. Figure 4.10 shows the calculated phase shift per dB loss for capacitance ratios of 1.17, 1.3, and 1.5 at 40 GHz. The results of the measured DMTLs, with a capacitance ratio of 1.17, are seen to verify the position of an optimal point at 100,um for the center conductor width, and the phase shift per dB for the optimal line (W = 100 jim) is measured to be -70~/dB at 40 GHz. The calculated phase shift per dB loss, based on the measured line loss, for capacitance ratios of 1.3 and 1.5 show that the performance of the DMTL can be greatly increased to -108~/dB and -164~/dB, respectively, which is the equivalent of 3.3 dB and 2.2 dB insertion loss for 360~ phase shift at 40 GHz. Figure 4.11 shows the measured and modeled S-parameters for the optimal DMTL phase shifter with a 100 ym center conductor at 0 V and its maximum bias voltage of 13 V. The parameters used in the circuit model are listed in Table 4.5. As can be seen, the zero-bias bridge capacitance, Cbo is very close to the designed value of 33.8 fF and the return loss rises up to -10 dB at 60 GHz, when the maximumn bias is applied, as desired. The discrepancies between the measured and modeled data seen in the return loss are most likely due to small variations in the bridge height among the 38 bridges used in this DMTL. 66

0 -10 -20 -30 -40 0 10 20 30 40 Frequency (GHz) 50 60 (a) 0 -10 u -20 c~ -30 -40 0 10 20 30 40 Frequency (GHz) 50 60 (b) Figure 4.11: Measured and modeled S-parameters of the W = 100,um DMTL with 38 bridges (total length= 7.6 mm) at (a) 0 V and (b) a maximum applied bias of 13 V. 67

0 -30, -60 No -- -90 -120 -150 0 10 20 30 40 Frequency (GHz) 50 60 Figure 4.12: Measured and modeled phase shift of the W = 100,m DMTL at 13 V. 100 90 80 " 70 u 60: 50 i 40 20 o10 0 10 0 0 10 20 30 40 Frequency (GHz) 50 60 Figure 4.13: Measured and modeled phase shift per dB loss for the W = showing 90~/dB at 60 GHz or 4 dB loss for 360~ phase shift. 100 wrn DMTL 68

The measured and modeled phase shift are shown in Figure 4.12 with excellent agreement between the two data. The maximum measured phase shift is 148~ at 60 GHz which corresponds to a time delay of 6.8 ps. Dividing the measured phase shift by the measured insertion loss, with the reflection loss removed, results in the plot shown in Figure 4.13 in which the modeled data is again shown to be in good agreement with measurement. It is seen that 70~/dB at 40 GHz and 90~/dB at 60 GHz are achieved with this line. Thus, this DMTL is capable of giving 360~ phase shift at 40 GHz with 5.1 dB loss and at 60 GHz with 4 dB loss. The phase shift per dB is seen to increase with frequency as f/f which is in agreement with theory since the loss increases as /;f and the phase shift increases as f. However, this only holds true so long as the loss due to the bridge resistance remains small compared to the transmission line loss. Once the loss due to the bridge begins to become significant it increases as f5/2 (assuming Rb increases as /f), as shown in (3.20) and Figure 4.6, and will quickly dominate the phase shift per dB loss, causing it to decrease with frequency. This phase shifter was designed to operate up to 60 GHz (S = 300 /m, W = 100 tm, t = 8000 A, fB = 120 GHz), and therefore, at 10 or 20 GHz, does not give optimal phase shifter performance. If the DMTL is redesigned to operate up to 20 GHz, a much higher phase shift per dB loss could be achieved up to this frequency since the design would dictate a wider CPW total width and a much thicker metal, resulting in a reduced unloaded line loss. Also, the capacitive loading would be increased such that the Bragg frequency would be 40 GHz rather than 120 GHz as it is for the 60 GHz design. 4.3 W-Band DMTL Phase Shifter The design procedure for a W-band phase shifter is identical to that given in the previous section, however, there are some additional effects which must be taken into consideration at higher frequencies. One such effect is loss due to the bridge resistance, which becomes significant at W-band frequencies as demonstrated in Figures 4.14 and 4.15. In Figure 4.14, the loss due to bridge resistance versus frequency is shown for bridge resistances of 0.15, 0.3, and 0.6 Q. The calculation is for a 300 pim total width CPW line with a 100 pm center 69

1.6 1.4 1.2 E 1.0 r 0.8: 0.6 0.4 0.2 0.0 0 20 40 60 80 100 Frequency (GHz) Figure 4.14: Loaded transmission line loss and loss due to bridge resistance vs. frequency. The line loss is calculated from Hoffmann's equation for a 300 Aim total width CPW line with a 100 zpm width center conductor. The Bragg frequency is 180 GHz, the bridge spacing is 110 pm and the bridge capacitance is 20.7 fF. 120 100 m 80 (/3 (U ~? 60 - 40 _ 40 <l 20 0 0 20 40 60 80 100 Frequency (GHz) Figure 4.15: Phase shift per dB loss calculated from a Libra circuit simulation of a 32 bridge DMTL on quartz with a capacitance ratio of 1.17 and different bridge resistances specified at 30 GHz and varying as V/Tf. 70

conductor width (ZO = 100 Q) loaded to 48 Q and a Bragg frequency of 180 GHz. The line loss is calculated from (4.12) and then multiplied by the ratio of change in impedance to arrive at the loaded loss. It is seen that the distributed phase shifter is line-loss limited up to 100 GHz for bridge resistances of 0.15 and 0.3 Q where as for a 0.6 Q resistance the bridge loss starts to dominate above 65 GHz. In Figure 4.15 a Libra circuit simulation has been carried out for a 32 bridge DMTL with an unloaded impedance of 96 Q, an effective dielectric constant of 2.37, a loaded impedance of 48 Q, a capacitance ratio of 1.17, and different bridge resistances, Rb, specified at 30 GHz and varying as Jf7. It is seen that as the bridge resistance increases, the phase shift per dB loss starts to level off and can even decrease with frequency for the higher resistances. The phase shift per dB loss drops from 115~/dB at 110 GHz for no bridge resistance, to 80~/dB for a 0.1 Q bridge resistance, and to 44~/dB for a 0.4 Q bridge resistance. This additional loss also has an effect on the optimization curve used to determine the optimal center conductor width. Figure 4.16 shows the calculation of the optimal center conductor width for silicon, quartz, and air substrates with a total CPW width of Ad/5 at 100 GHz, a loaded impedance, Za, of 48 Q, a capacitance ratio of 1.2, a Bragg frequency of 240 GHz, and a bridge resistance of 0.15 Q at 30 GHz (0.27 Q at 100 GHz) in Figure 4.16a and 0 Q in Figure 4.16b. It is seen in Figure 4.16a that the optimal center conductor width for silicon is 37,um, for quartz is 113 mrn, and for air is 283 pim compared with 36 ptm, 100 yim and 240 min in Figure 4.16b, respectively. Although the bridge resistance has not altered the optimal center conductor width by very much, the phase shift per dlB has changed significantly. Thus, in general, the bridge resistance can be safely ignored for circuit design purposes (choosing the center conductor width), but must be taken into account in the circuit model and when evaluating the phase shifter performance (calculating phase shift per dB loss). Another effect which must be considered at W-band is radiation from the DMTL. As imentioned in Section 3.3, when the effective dielectric constant of the DMTL is above the relative dielectric constant of the substrate, the DMTL should not be able to radiate due to slow-wave propagation. As seen in Figure 4.17, this condition is satisfied for the entire range of center conductor widths for quartz and up to 55 p/m (Zo = 63 Q) for silicon. Using 71

0 -20 -40 -60 -80 -100 -120 -140 -160 -180 -200 -220 I,, i,,., I I.,.,..,,.. I... I,, I... Si(11.9) Quartz (3.78 Air (1). I I.... i.... I.... I.... 50 100 150 200 250 W (aim) 300 350 400 (a) -s a c7t ~ uu bf) C) (U Z. 6i" 0 -50 -100 -150 -200 -250 -300 -350 -400 -450 -500 -Si ( Qua 1.9) rtz (3.78) \Air (1) v,... I,....,....... I...,.... -......... 50 100 150 200 250 300 350 400 W (jm) (b) Figure 4.16: Calculated phase shift per dB loss versus center conductor width at 100 GHz for a bridge resistances of (a) 0.15 Q at 30 GHz and (b) 0 Q. The total CPW width is Ad/5 at 100 GHz for each substrate which is 180 /m, 300 p/m, and 600 p/m for silicon, quartz, and air, respectively. The loaded impedance is 48 fQ, the capacitance ratio is 1.2, and the Bragg frequency is 240 GHz. 72

30 I I I I. I I I I. I.,.. I I I I X, I I I. I, I - 25 F 20 w" 15 10 5 -\ -\ ----- (I 19 -----— (11.9)Si \ \uartz --- -— _- - --- (3.78) — 50 100 150 200 250 300 350 400 W (im) Figure 4.17: Calculated effective dielectric constant for W-band DMTL's versus center conductor width. The relative dielectric constant of silicon (11.9) and quartz (3.78) are shown for reference. 6 E4 -0 Cf3 c) 2 0 I I. I I. I... I I.... I........ CPW Line -DMTL Air (1) I L. l l ll l l l.................... 50 100 150 200 250 300 350 400 W (gm) Figure 4.18: Calculated loss at 100 GHz versus center conductor width. The CPW line loss (-) includes radiation loss while the DMTL line neglects radiation but includes loss due to a 0.15 Q bridge resistance at 30 GHz (0.27 Q at 100 GHz). 73

Table 4.6: Calculated design of an optimized W-band DMTL phase shifter on quartz. W(Utm) 100 S(/pm) 300 Cbo(fF) 19 s(/,m) 110 fB(GHz)(Lb = 20 pH) 192 Table 4.7: Dimensions for the optimized W-band DMTL phase shifter. W(pm) 100 S(jim) 300 Cbo (fF) 20.7 s(tpm) 110 w(pm) 25 ~fB(GHz)(Lb = 20 pH) 186 (3.21) and (4.12) the loss for the unloaded CPW lines at 100 GHz, including rad(iation loss, is calculated and shown in Figure 4.18. The unloaded CPW line loss for silicon starts at 6 dB/cm and therefore is not shown. The DMTL loss neglects radiation and is calculated at 100 GHz using (3.20) with a bridge resistance, Rb, of 0.15 Q at 30 GHz which increases as f/f. The unloaded CPW line loss for quartz is seen to cross over the corresponding DMTL loss at a center conductor width of 105 tim. Thus, if the DMTL does, in fact, not radiate, then it could exhibit lower loss than the unloaded CPW line. Using equations (4.5)-(4.9), a DMTL on quartz is designed for operation up to 100 GHz with a total CPW width of 300 pm and a zero-bias loaded impedance of 48 Q. The resulting design is given in Table 4.6 where the effect of neglecting the bridge inductance has been offset by increasing the Bragg frequency used in (4.5) to 250 GHz. As seen in Table 4.6, the calculated Bragg frequency, assuming a 20 pH bridge inductance, is 192 GHz. Using the static-field solver Maxwell 3-D, a bridge width of 25,tm at a height of 1.5,im is found to give a bridge capacitance of 20.7 fF. As shown in Table 4.7, the resulting Bragg frequency, assuming an inductance of 20 pH, is 186 GHz with the Libra circuit simulation showing a Bragg frequency of 189 GHz which is close to the desired Bragg frequency of 200 GHz. The W-band DMTL is measured using an HP8510C for 2-40 GHz and an HP8510C with W-band millimeter-wave test set for 75-110 GHz. The measured and modeled results Table 4.8: Circuit model parameters for the W-band DMTL phase shifter. Cbo (O V) (fF) 20.7 Cbo(26 V) (fF) 23.7 Lb (pH) 22 A @ 20 GHz (dB/cm) 0.5 Rb @ 30 GHz (Q) 0.15 74

0 -10 ct7 CO a j -20 E ct -30 -40 0 20 40 60 80 100 Frequency (GHz) (a) 0 -10 CA ( -20 S c: -30 -40 0 20 40 60 Frequency (GHz) (b) 80 100 Figure 4.19: Measured (2-40 GHz and 75-110 GHz) and modeled S-parameters at (a) 0 V bias and (b) a maximum bias of 26 V for a W-band DMTL phase shifter. The dimensions are listed in Table 4.7 and the circuit parameters are listed in Table 4.8. 75

100 80 - Measured -- Modeled i 60 40 -0 -20 0 20 40 60 80 100 Frequency (GHz) Figure 4.20: Measured and modeled phase shift per dB loss at a maximum bias of 26 V for a W-band DMTL phase shifter. The dimensions are listed in Table 4.7 and the circuit parameters are listed in Table 4.8. -40 -80 - X -120 a W) -- -160 -200 -240 Cmax/C.n= 15 max min - C /C =1.3 max min C x/C min.- 1.5, llll~llll,, i,,,!.., i,.,, i,,, i,,,,, i f 40 60 80 100 120 140 160 180 200 W (ptm) Figure 4.21: Calculated phase shift per dB loss at 100 GHz with a capacitance ratio of 1.15, 1.3, and 1.5. The measured data point is shown for a center conductor width of 100 rm. 76

5 4 o z Lrw Line: - W-band DMTL x Estimated I 3 ~ 2 0 20 40 60 80 100 Frequency (GHz) Figure 4.22: Measured loss of a 96 Q CPW (W = 100 Atm) and DMTL line. The estimated loss, calculated from (3.20) uses the measured CPW loss to calculate R,. A bridge resistance of 0.15 Q at 30 GHz is also included in the estimate. of a 48 bridge DMTL are shown in Figure 4.19 with the circuit model parameters listed in Table 4.8. The S-parameters are shown for 0 V and the maximum applied bias of 26 V, and show very good agreement with the design. The pull-down voltage of -this line is just over 26 V with a corresponding capacitance ratio of 1.15. This capacitance ratio is lower than previously observed which is believed to be due to higher levels of compressive stress within the bridges and increased non-uniformity across the wafer. The measured phase shift per dB loss, seen in Figure 4.20, shows a fairly constant level of nearly 70~/dB from 75-110 GHz, or 5 (113 loss for 360~ phase shift at W-band. The modeled data shows good agreement using a bridge resistance of 0.15 Q at 30 GHz which scales as f7. Figure 4.21 shows the calculated phase shift per dB loss for capacitance ratios of 1.15, 1.3, and 1.5 at 100 GHz and a bridge resistance of 0.15 Q at 30 GHz. The calculated loss from (4.12) is increased by a factor of 1.8 in order for the calculated results to match measurements as discussed in Section 4.2.1. The result of the measured DMTL, with a capacitance ratio of 1.15 is in agreement with the adjusted calculated value. The calculated phase shift per dB loss for capacitance ratios of 1.3 and 1.5 show that the performance of the W-band DMTL can be increased to -136~/dB and -224~/dB, respectively, which is the equivalent of 2.6 dB and 1.6 dB insertion loss for 360~ phase shift at 100 GH-z. The measured loss in dB/cm for the unloaded 96 Q CPW line (S = 300 t/m and W = 77

100 tum), and the W-band DMTL are shown in Figure 4.22. It is seen that above 90 G-Hz, the unloaded line begins to exhibit large variations in loss and no longer increases with frequency. This is indicative of leakage into higher-order modes. However, it is also seen that the DMTL loss steadily increases with frequency. In addition, using the unloaded line loss to find the series resistance, Rs, and assuming a bridge resistance, /ib, of 0.15 Qf at 30 GHz, (3.20) can be used to estimate the loss of the DMTL. This estimate is shown in Figure 4.22 and exhibits much higher loss at W-band than the measured DMTL. 4.4 Stabilized DMTL Phase Shifter As mentioned in Section 2.3, the MEMS bridges can be stabilized by the inclusion of a series capacitance in the bias path. For the DMTLs, this can be achieved through the use of integrated capacitors in the center conductor at both the input and output of the DMTL as shown in Figure 4.23. If these capacitors are identical, then the DC circuit can be reduced to Figure 4.24 where the total length of the DMTL is I = n $ s + (s - w). From this figure it is seen that the second integrated capacitor must be included as part of the fixed capacitance parallel to Cb so that Cf = I * Ct + Cs. Using (2.33), it is found that the pull-down voltage of the DMTL will be increased by the factor: (2C + lCt + rnCbo)3 (4.13) C2 (2Cs + lCt) From this equation it is seen that if Cs is very large, then the minimum increase in the pull-down voltage is 2. This is a result of the integrated capacitor at both ends of the DMTL being identical. For the optimized DMTL, presented in Section 4.2, with 16 bridges, the total bridge capacitance is 16 * Cbo = 541 fF and the total transmission line capacitance is 1/ Ct = 177 IF (I = 3.3 mmn). The pull-down voltage for this line is around 13 V. Since the bias-tees used in the experimental setup have a maximum bias voltage of 40 V, the pull-down voltage should not be increased by more than a factor of 3. Using (4.13) with these values, the series capacitance can be solved for numerically giving a value of Cs = 1.04 pF. From (2.31), the new position of the instability is found to be 0.7 am rather than 0.8,am for the unstabilized 78

Integrated Series Capacitor (1.9 pF) I100 k<m 197 srm 100km 35 pim Figure 4.23: Optimized DMTL design with integrated capacitors for stabilization of MEMS bridges. Cs line Cs Vs I < --- — nCb ICt Figure 4.24: Reduced DC circuit of Figure 4.23 with integrated capacitors, C5, at both ends of the DMTL. line. This results in a theoretical increase in the capacitance ratio from 50% to 70%. Figure 4.25 shows the measured and modeled results of the optimized 16 bridge DMTL with 1.9 pF integrated series capacitors for both 0 V and 40 V applied bias. The circuit parameters used in the model are given in Table 4.9. It is seen that the change in bridge capacitance is only slightly greater than 12% at 40 V. According to (4.13), the pull-down voltage should have been increased by a factor of 2.5 or to 33 V since the original pull-down voltage of these bridges is 13 V. The pull-down voltage is measured from standard DMTLs fabricated on the same wafer. The reason for the discrepancy between the theoretical pull-down voltage of 33 V and the measured result is believed to be due to charging of the dielectric used in the integrated capacitors. As the dielectric charges uip by trapping electrons, the bias voltage becomes partially shielded causing the voltage across the bridges to drop. This effect has been observed in the measurement of these lines in the form of the phase shift of the line decreasing with time at a constant applied bias. 79

0 -10 CQ -30 m -40 0 -10 X -20 S ct -30 -40 0 10 20 30 40 Frequency (GHz) (a) 0 10 20 30 40 Frequency (GHz) (b) Figure 4.25: Optimized 16 bridge DMTL with 1.9 pF integrated series capacitors for stabilization with (a) 0 V and (b) 40 V applied bias. Table 4.9: Circuit model parameters for the optimal DMTL with integrated capacitors. Cbo(O V) (fF) 33 Cbo(40 V) (fF) 37.1 Lb (pH) 24 A @ 20 GHz (dB/cm) 0.52 Cs (pF) 1.9 80

CHAPTER 5 Applications of Distributed MEMS Transmission Lines Although the focus of this thesis is on the application of distributed MEMS transmission lines as low-loss millimeter-wave phase shifters, there are a number of other applications in which DMTLs can be useful. Some of the more significant applications are reflective switches, phase modulators, and phase verniers. This chapter presents the results of using DMTLs for these applications, but no attempt is made to achieve the best performance. 5.1 Reflective Switches Millimeter-wave switches are an essential element in radar and communications systems. Typically, their function is to switch between the transmit and receive modules, or to switch an antenna beam in Rotman lenses or focal-plane designs. Recent results of W-band GaAs PIN diode switches for automotive radars have demonstrated 1.6 cdB loss with 20 dB isolation over a 10 GHz bandwidth centered at 80 GHz [5]. Also, hybrid GaAs PIN diode switches with an insertion loss of 0.6 dB and an isolation of -16 dB have been demonstrated at 94 GHz. Switches are also used in instrumentation units, such as vector network analyzers, and require 60-80 dB of isolation. These are typically built using PIN diodes and have an insertion loss of -10 dB from 40-60 GHz [8]. One way to achieve high isolation and low insertion loss is to use the distributed MEMS transmission line as a switch. The wideband distributed MEMS switches measured in this work only operate to 60 GHz; however, it is believed that high performance can also be achieved at W-band frequencies (ie. >60 dB isolation with <2 dB insertion loss). 81

0 a: 1 -<u ct cl: -10 -20 -30 0 10 20 30 40 50 60 Frequency (GHz) (a) 0 -10, -20 a) I) " -30 -40 -50 0 10 20 30 40 Frequency (GHz) 50 60 (b) Figure 5.1: Measured results of distributed MEMS switches with 8 and 16 30-um wide bridges spaced at 306 /,m in the (a) open position (bridge up) and (b) closed position. The S-parameters for the open position are only shown for the case of the 8 bridge design. 82

5.1.1 Design and Measurements The DMTL switch works by applying a bias voltage greater than the pull-down voltage. This causes the MEMS bridges to be clamped down on top of the center conductor with the SixNy layer separating them. Thus, the MEMS bridge capacitance is greatly increased and an RF short to ground is obtained above a certain frequency. The upper frequency of the distributed switch is determined by the Bragg frequency when the bridges are up.,As was noted at the end of Section 3.5, acceptable performance (S1, <-10 dB) can be obtained up to about half of the Bragg frequency. Figure 5.1 shows results for DMTLs with 8 and 16 30-jim width bridges spaced at 306 jim (total length = 2.7 mm and 5.2 mm, respectively) resulting in a loaded impedance of 60 Q. The Bragg frequency for these lines is 129 GHz which limits their upper frequency of operation to approximately 65 GHz. The insertion loss, with the bridges in the up position, is 0.4 to 0.6 dB for 8 bridges, and 0.7 to 1.3 dB for 16 bridges, at 30 to 60 GHz, respectively. In this case, the center conductor thickness is only 5000 A, and a much better insertion loss could be achieved for a 3 jum thick center conductor. When the bridges are pulled down with a DC voltage of 30 to 35 V (Vp=23 V), the cutoff frequency is 40 GHz for the 8 bridge design and 38 GHz for the 16 bridge design, giving an operational bandwidth of 40 to 65 GHz. The switch isolation is limited to around 45 dB by CPW line radiation into the substrate. The substrate isolation is found by measuring the insertion loss between two CPW short circuits separated by 1 mm. Notice that the 8 and 16 bridge designs result in nearly the same response, indicating that it is not necessary to design the distributed switch with more than 8 bridges. Figure 5.2 shows results for a DMTL with 16 60-jim wide bridges spaced at 400 jm (total length = 6.7 mm) resulting in an impedance of 43 Q. The Bragg frequency is 69 GHz, which limits the upper frequency of operation to approximately 35 GHz. However, the measured S-parameters indicate that the switch can be used to 40 GHz. The insertion loss, with the bridges in the up position, is 0.9 to 1.4 dB for 20 to 40 GHz. Again, the center conductor thickness is only 5000 A, and a much better insertion loss could be achieved for a 3 jim thick center conductor. When the bridges are pulled down with a voltage of 15 to 20 V 83

0 -10 -20 -30 0 10 20 30 40 Frequency (GHz) (a) O0 -10 m \ 8 bridge -20 e- Modeled 16 bridge -- Measured 21 3S21 5 -30 - -- Modeled -40 substrate isolation -50 0 10 20 30 40 Frequency (GHz) (b) Figure 5.2: Measured and modeled results for a distributed MEMS switch with 16 60-urn wide bridges spaced at 400 /um in the (a) open position (bridge up) and (b) closed position. 84

R;:*L* ~ -C";-16"; UI" 1) — II" '~a - -lir _;*..n " MC Ik 9 d: -~ - -,rJ*" j.; c IJF:I n.,. -t dP -- - ----- -- — - ------------- ------ ---- --- r*IULI. I-r9.-1.. I. baP"""..-.. ~uii-, ~ ~.~ i:~rw, iY1;4l'df 42 ~; "~EIW""U"' -' ~~. .rreia~uri~ii::~-~~:1:: ~ ~k'i~`:l'eib~"~'~a;i4:~:~rt:~-:l~ Figure 5.3: SEM image of the remains of a DMTL after the breakdown voltage of the Si,,,Ny was exceeded. (Vp=6 V), the cutoff frequency is 21 GHz, which results in an operational bandwidth of' 21 to 40 GHz. The closed switch results shown in Figure 5.2a are successfully modeled using the Libra circuit model discussed in Section 3.4. The pulled-down bridge capacitance and the bridge inductance are 0.9 pF and 12 pH, respectively. The capacitance ratio is 0.9/0.075=12. It is seen that excellent isolation is achieved even for such a low capacitance ratio due to the distributed approach of the switch. The transmission line attenuation needed to fit the data is 1.1 dB/cm at 20 GHz. This is double the value used previously in Chapter 4 (0.55 dB/cm at 20 GHz) and is believed to be due to the additional losses of the large capacitors formed by the MEMS bridge, 1000 A of SiXNY, and the CPW center conductor. Using this model, the performance of a switch with 8 bridges was simulated with the results also shown in Figure 5.2a. Obviously, it is more efficient to use 8 bridges since this design will result, in half the insertion loss (0.5-0.7 dB for 20 to 40 GHz and much less if t = 3 Pm) for the same "sharp" response and operating bandwidth. The switch isolation is again limited by the CPW line substrate radiation. It should be noted that the closed switch in Figure 5.1 could not be modeled successfully because a high enough bias voltage could not be applied to these switches in order to obtain a uniform down capacitance in every bridge. The bias voltage is limited by the breakdown 85

0 -20 C=12 C 3 16 bridges \ -30 C=80 \ br s4 bridges -40 8 bridges -50.... 0 10 20 30 40 Frequency (GHz) Figure 5.4: Variation of lower cutoff frequency with different number of sections used in the distributed switch design. voltage of the SiXNY which is approximately 35 V for a 1000 A thick layer. Figure 5.3 is an SEM image of a DMTL after the dielectric breakdown voltage was exceeded. The bridges and center conductor metals are not thick enough to handle any appreciable current and simply melt, causing catastrophic failure of the device. The silicon nitride thickness was later increased to 2000 A in order to avoid dielectric breakdown and to avoid pin-holes in the MIM capacitors used in Section 4.4. The closed switch in Figure 5.2a has a pull-down voltage of 6 V; so an applied bias of 20 V is sufficient to obtain uniform capacitance values along the transmission line. Figure 5.4 shows the variation in the cutoff frequency between distributed switch designs with 4, 8, and 16 bridges. As can be seen, the 4, 8, and 16 bridge designs give nearly the same cutoff frequency. The primary limitation in the current distributed MEMS switch is the capacitance ratio. If a capacitance ratio of 80-100 is used, instead of a capacitance ratio of 12 achieved with these switches, then the corner frequency will be pushed (lownl to below 10 GHz as seen in Figure 5.4, and the bandwidth of the distributed switch will increase to around 50 GHz (10-65 GHz). The distributed switches are designed by choosing either the upper or lower frequency cutoff and then designing the spacing and bridge capacitance to achieve the desired Bragg frequency in either the up state, for the upper cutoff frequency, or the down state, for the lower cutoff frequency. 86

Bias Output to NTE2941 Bias Tee o F '10 kQ 0-10 V from Function Generator Figure 5.5: Driver circuit used to provide a 0 to 33 V step to the bias line of the DMTL. 5.1.2 Switching Speed The switching speed is measured by applying a step voltage on the bias of the DMTL and measuring the change in the power transmitted through the DMTL using a diode detector. The experimental setup is shown in Figure 5.6. The RF frequency generator is set to 35 GHz with 10 dBm output power for the switching speed tests done in this work. The RF power at the output of the DMTL is measured using a diode detector with waveguide transition. The bias is supplied by a diver circuit, shown in Figure 5.5, in order to achieve a 0 to 30 V step function. The function generator is only able to deliver a 0 to 15 V step function which is insufficient for devices with a 20 V pull-down voltage. The bias-tees have a maximum bias voltage rating of 40 V, therefore, the bias is limited to 33 V due to inductive peaking which swings the step voltage up to 40 V during switching. A step from 0 to 10 V on the gate of the N-channel MOSFET causes the gate voltage of the P-channel MOSFET to drop from the DC bias voltage to approximately half the DC bias voltage and consequently turning the PMOS device on. This causes the output of the driver circuit to step from 0 V to the DC bias voltage minus a 2 V source to drain voltage drop across the P-channel MOSFET. The driver circuit is charging a large capacitive load and therefore the current path must be low resistance in order to obtain a fast rise time. The on resistance of the P-channel MOSFET is around 1.5 Q. as per the 87

WR-19 to Co Transition oo oo 00 00 Picoprobe 40A-GSG- 150-C Microwave Probes Figure 5.6: Experimental setup of the switching speed measurement.

40 S 30 v > 0.00 - 20 - -.- -0.04 i - -0.08 10 - -0.12 c -0.16 0 -..... -0.20 -2 0 2 4 6 Time (is) Figure 5.7: Switching speed measurement of a 16 bridge DMTL with a bridge width and spacing of 25 p/m and 110 /m, respectively. The bridge height is approximately 0.9 /,m and the pull-down voltage is 6 V. manufacturer's data sheet, resulting in a measured rise time of 0.2 V/ns or 150 ns for a 30 V step with all cables attached (capacitive load taken into account). This is acceptable since the response time of the bridges is expected to be on the order of a few microseconds. When the voltage at the gate of the N-channel MOSFET drops back to 0 V the output also drops to 0 V, however, the capacitive load is discharged through the 10 kQ resistor and thus the fall time is much slower (- 700 pts). Therefore, only the pull-down switching time is measured with this setup. The back-to-back waveguide-to-coax transitions at the output of the RF generator act as a low frequency block, and are needed to prevent modulation of the RF signal by leakage of the step voltage through the bias-tee as well as possible damage to the source. T'he oscilloscope is triggered using the step voltage, and records the response of the detector diode. The first DMTL measured has 16 25-,um wide bridges spaced at 110 ain. The bridge height was intended to be 1.5 JIm, however this particular wafer had higher compressive stress in the bridges than normal resulting in the bridges being buckled down to approxinately 0.9,um. Figure 5.7 shows a measured switching time of 2.7,ts for this DMTL with an applied step voltage of 33 V. The switching time is measured from 0 pus, where the step voltage hits 5 V, to the time at which the detector voltage reaches 95% of its final value. 89

40 30 u 20 =t -; 20.0 0.00 -0.04 - -0.08 ~ -0.12 C -0.16 -0.20 -2 0 2 4 6 8 10 12 14 16 18 Time (ps) (a) 40 ' 30 u I. i 20.-.,-5 3 10 0.................................... 4''. 0.00 -0.04 -0.08 -0.12 -0.16 -0.20 o a2!10 C. -5 0 5 1( 15 Time (js) (b) 20 25 30 30 25 20 c0 i 15 b-E U 10 c3 0 u: 0.00 -0.04 -0.08 -0.12 -0.16 -0.20 u to (U C) -5 0 5 10 15 20 25 30 Time (gs) (c) Figure 5.8: Switching speed measurements of a 16 bridge DMTL with a bridge width and spacing of 25 p/m and 110 /pm, respectively. The bridge height is 1.5 /zm and the pull-down voltage is 21 V. 90

Table 5.1: Parameters of the gold bridge used in the calculation of Figure 5.9. w 25 /m W 100 /m 1 300 m Q 2.6 t 2.2 /im fo 27.6 kHz go 1.5 /rm Vp 21.3 V The DMTL measured in Figure 5.7 never recovered from being switched and so no further measurements could be made on this device. Figure 5.8 shows the switching speed measurements of the same DMTL design on a wafer with the correct bridge height of 1.5 um. The pull-down voltage for these bridges is 21 V. In this case, the DMTL returns to its initial state after the bias is released and so multiple measurements were made. As can be seen, the switching speed increases from 13.6,ts to 19.7,is and then to 25.1 /us as the DC actuation voltage is decreased from 33 V to 28 V and then to 23 V. The slower switching speed is due to the fact that the bridges are farther away (1.5 um instead of 0.9 /m), and also because the force able to be applied to the bridges is less. As seen in Figures 5.7 and 5.8, there are voltage transients between the switching voltage being applied at t = 0 tts and the final value of the detector voltage. These are most likely due to the dynamics of 16 bridges being actuated simultaneously and the differences in how each bridge moves. Some of the transients may be due to bouncing of the bridge off of the dielectric layer. Another possibility is parametric effects of the time changing capacitance causing some modulation of the RF power level. The switching speed can be modeled using the differential equation of motion given by (2.34) where the external force is electrostatic: d2x dx 1 eoWwV2 rn2 +b +kx=-2 2 (5.1) dit2 ct 2 g where the damping coefficient is given by b = k/(wQ). Using Mathematica1, this differential equation can be solved numerically for varying DC actuation voltage conditions. Figure 5.9 shows the numerical solution of (5.1) in which a contact force has been added to simulate the effect of hitting the silicon nitride [6]. The parameters of the contact force are chosen to result in stable numerical solutions and do not reflect any realistic modeling 'Wolfram Research, Inc. 100 Trade Center Drive Champaign, IL 61820, USA 91

1.4 1.2: 0.8 -ok m0.6 0.4 0 10 20 30 40 Time (uls) (a) 1.4 1.2, 0.8 0.6 0.4 0 10 20 30 40 Time (gs) (b) 1.4 1.2:: \ 5) 2 0.8 *| 0.6 0.4 0 10 20 30 40 Time (us) (c) Figure 5.9: Numerical solution of the switching speed for step voltages of (a) 33 V, (b) 28 V, and (c) 23 V for a gold bridge with parameters given in Table 5.1. 92

of the silicon nitride surface. The parameters of the gold bridge are given in Table 5.1. It should be noted that the spring constant has been reduced from 13.9 N/m (calculated using the bridge geometry) to 9.6 N/m, in order to account for the compressive stress within the beam, such that the calculated pull-down voltage matches the measured value. The quality factor is dominated by squeeze-film damping and is given by [23]: Q-1 ( /2) (5.2) where p is the viscosity of air. The solution has been carried out for step voltages of 33, 28, and 23 V with, as seen in Figure 5.9, switching speeds of 13, 17, and 27 is, respectively. The bounces seen after the initial contact of the bridge are due to the contact force parameters and do not simulate the actual dynamics of the switch coming in contact with the silicon nitride. The switching speed was also calculated for a step voltage of 50 V with a resulting switching speed of 7.8 js. Thus, in order to achieve a fast switching time, the actuation voltage needs to be well above the pull-down voltage. A closed form expression for the switching speed can be found by approximating the electrostatic force as being a constant magnitude of: F =EOWWV (5.3) and ignoring the damping coefficient. Then (5.1) reduces to: d2x mrd2 +kx=F (5.4) The switching time can be solved assuming the bridge is at rest and a step voltage from 0 to V volts is applied at time t = 0. This results in: ts = sin- I o (55 t sin ( 2g oWWV2) (5.5) where ts is the switching time and m is the bridge mass. A comparison of the measured, numerical model, and closed form model switching speeds is shown in Table 5.2. It is seen that the numerical model gives a very good approximation to the switching speed at each voltage level. The closed form model, in this case, overestimates the switching speed slightly. However, this is for the case in which the Q of the bridge is 2.6. 93

Table 5.2: Measured and modeled switching speed in ps (Q = 2.3). Voltage Measured Numerical Model Closed Form Model 50 V - 7.8 6.7 33 V 12.1 13 15.5 28 V 18.6 17 21.5 23 V 25.5 27 31.8 Table 5.3: Calculated switching speeds, in pus, from the numerical solution for varying Q values. Voltage Q=2.3 Q= l Q=0.2 50 V 7.8 8.7 16.6 33 V 13 15.9 42 28 V 17 22 70 Keeping all other parameters constant, the numerical solution will change if the Q is varied, however the closed form solution, which ignores the damping coefficient, will stay constant. Table 5.3 shows that for quality factors below 1, the closed form solution begins to greatly underestimate the numerical solution. As seen from (5.2), the Q will vary with changes in the air viscosity (or a change in air pressure) and the density of the bridge material. 5.2 Phase Modulators In Chapter 4 it was demonstrated that the DMTL could be used as a phase shifter capable of achieving more phase shift simply by increasing the length of the line. Thus, a binary phase shift keying (BPSK) modulator can be designed by using a line with 1800 phase shift. The DMTL provides some unique characteristics for a phase modulator in that it requires very little drive power compared to most semiconductor based phase shifters. However, it is limited in how fast it can modulate due to the mechanical motion of the bridge. Measurements Using the optimized design of Section 4.2.2, a DMTL with 96 bridges was designed to give over 180~ phase shift at 35 GHz and above. The measured DMTL, shown in Figures 5.10 and 5.11, has a bridge height of approximately 0.9 ptm rather than the intended 1.2 Atm due 94

to high residual stress within the bridges. This results in a much lower pull-down voltage of 6 V rather than 13 V seen in Section 4.2.2. However, as can be seen from the S-parameter and phase shift measurements, this line is still useful for demonstrating a BPSK modulator. The experimental setup for the measurement of the DMTL as a BPSK modulator is shown in Figure 5.12. The modulating signal is a 1 kHz square wave with a magnitude of 6 V and DC bias of 3 V. This signal is coupled onto the DMTL center conductor using a bias tee. It is important to note the use of a back-to-back waveguide to coax transition between the bias tee and the RF frequency generator. Although the bias tee will prevent DC from passing through to the frequency generator it will not completely block the modulation signal from reaching the frequency generator. This is potentially a problem because the modulation signal could cause unwanted modulation of the RF signal before it enters the DMTL. With the back-to-back transition in place, the modulation signal is far below cutoff (31.36 GHz for WR-19), and thus is not able to reach the frequency generator. The RF is set to 35 GHz and the IF is chosen to be 10 kHz. Thus, the local oscillator signal to the harmonic mixer is set to 17.5 GHz minus 5 kHz. The measured IF signal is shown in Figure 5.13, from which the phase changes can be seen at 0.37 msec and 0.87 msec. Since the modulating signal is a 1 kHz square wave, phase changes occur at twice that rate, or every 0.5 ms as seen in Figure 5.13. The change in amplitude for the different phase states is very small, and is most likely due to a combination of changes in the insertion loss and return loss of the DMTL when the bias is applied. The RF spectrum of the modulated signal is measured by taking the output of the DMTL through another back-to-back waveguide to coax transition and into a spectrum analyzer. Figure 5.14 shows the measured spectrum with an RF of 35 GHz and a 1 kHz square wave modulation. The carrier at the output of the DMTL, with no modulation, was measured to be -14.7 dBm. As can be seen from the measured spectrum, the carrier is suppressed by 25 (113 as expected for a BPSK spectrum. The measured power levels of the modulation spectrum, in dB below the carrier (dBc), are shown in Table 5.4. 95

0 - m -10 c/3 Q) W -20 -30 -30 0 10 20 30 Frequency (GHz) 40 Figure 5.10: Measured S-parameters of the 96 bridge DMTL at a maximum bias voltage of 6 V. The DMTL is based on the optimized design of Section 4.2.2, although the bridge height is approximately 0.9 rnm, rather than 1.2,/m, due to excessive residual stress within the bridges. 0 -50 u -100 -a-150 -200 0 10 20 30 Frequency (GHz) 40 Figure 5.11: Measured phase shift of the of Section 4.2.2. 96 bridge DMTL based on the optimized design 96

Bias Tee WR-28 to Coax Trncmitirn Pacific Millimeter' Pacific Millimeter t.. MD4 Diplexer KaM Mixer Figure 5.12: Experimental setup for the heterodyne measurement of the DMTL as a BPSK modulator.

-1.8 -1.9 -2.0 -2.1 Phase Change - 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 Time (ms) Figure 5.13: Measured output of the DMTL as a BPSK modulator with a modulation rate of 1 kHz. The RF is at 35 GHz and is mixed down to 10 kHz as shown here. Phase changes can be observed at 0.32,us and 0.87,us. Modeling The theoretical spectrum of a phase modulated signal can be broken into Fourier ccomponents, assuming a periodic modulation signal, given by [11]: Tin cn - = Jm ei mp(t)- tdt (5.6) 0 where fm is the modulation rate, Tm = I/fm, n is the harmonic number, and rnp(t) is the modulation signal. BPSK modulation is phase modulation with a square wave modulation signal with a phase deviation of 180~. Evaluating (5.6) under these conditions, the theoretical spectrum of a B3PSK signal is found. The calculated values are given in Table 5.4 from which it is seen that the measured values given in Table 5.4 match reasonably well. Using the differential equation of motion given by (5.1), a numerical solution for -the bridge movement with time can be found as shown in Figure 5.15. The parameters of the bridge used in this calculation are given in Table 5.5 where the spring constant has been reduced from 19.5 N/m to 5.0 N/m to account for the compressive stress within the bridge. The reason the Q is lower than that shown in Table 5.1 is that the bridge height is 0.9 blm rather than 1.5 p1m and also because the bridge width is 35 pm rather than 25 pim. From the solution for the bridge height versus time, (4.11) can be used to determine the phase which is the modulation signal, mp(t), used in (5.6). As can be seen in Figure 5.15, the rise time of 98

Table 5.4: Measured, theoretical, and modeled RF spectrum of the BPSK signal in dB3c. 0 -20 fo -40 -60 -80 -100 34.99999 35 35.00001 Frequency (GHz) Figure 5.14: Measured RF spectrum of the DMTL as a BPSK modulator with a modulation rate of 1 kHz. The carrier, with no modulation, was measured to be -14.7 dBm. the bridge is faster than the fall time. This is the source of the difference in the magnitudes between the positive and negative harmonics of the measured spectrum (Table 5.4). The calculated harmonic levels from the numerical model are also shown in 'rable 5.4 which demonstrate nearly the same imbalance in the positive and negative harmonic levels. Since the resonant frequency of the bridges in this DMTL is only 16.8 kHz, the niodulation frequency could not be pushed much above 1 kHz without excessive distortion of the BPSK signal. Figure 5.16 shows the numerical solution for this same DMTL driven with a 10 kHz modulation signal with an amplitude of 6 V. It is seen that; the bridge can not even reach 0.7,Lm before the actuation voltage returns to 0 V. However, if the bridge Table 5.5: Parameters of the gold bridge used in the calculation of Figure 5.15. w 35 im W 100 m 1 300 pm Q 0.55 t 2.2 um fo 16.8 kHz go 0.9 /im VP 6.1 V I I I. I 99

91) C) cto -. 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3.,.,....,,.,,,, 6 6.5 7 7.5 8 Time (ms) Figure 5.15: Numerical simulation of bridge movement under 6 V 1 kHz square wave modulation. 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 I I I I r-.....~~~...,...,,, I II - - 6 6.5 7 Time (ms) 7.5 8 Figure 5.16: Numerical simulation of bridge movement under 6 V 10 kHz square wave rodulation. 100

I I I I I. 0.5 0.4,., 0.3 0.2 120 130 140 150 160 Time (gs) Figure 5.17: Numerical simulation of bridge movement under 60 V 50 kHz square wave modulation for a bridge with dimensions listed in Table 5.17. Table 5.6: Parameters of the gold bridge used in the calculation of Figure 5.17. w 35 /m W 75,m I 100 /~m Q 1.1 t 3.5 Lm fo 476 kHz g, 0.5 um Vp 60.4 V design is altered to achieve a higher resonant frequency, the usable modulation rate can be greatly increased. Such a design using a gold bridge is given in Table 5.6 with the simulated bridge movement shown in Figure 5.17. The spring constant of this bridge is 2117 N/m due to a much shorter length and larger thickness. The residual stress for the design is set to 0 MPa. With such a large spring constant, the bridge height had to be reduced to 0.5 gtm and the resulting pull-down voltage is still 60 V. Thus, this design could be used as a BPSK modulator capable of delivering 100 kps data rate. Drive Power The average drive power required by the DMTL can be found from determining the total energy, required to move the bridges and to charge the capacitance, and multiplying it by the frequency of modulation. The energy required to charge the capacitance of the line and bridges is given by: 1 uc - CtotV2(5.7) 2 101

where Ctot includes the bridge capacitance in the down state as well as the transmission line capacitance and is given by Ctot n * Cr * Cbo + n * s * Ct. The energy required to move one bridge is found by integrating the force needed over the distance moved: go WwV2 eoWwV2 1 Ub g - dg== -CboV2 (5.8) 2go/3 where the maximum possible distance has been used to provide an upper bound on -the energy. The total required power is therefore: P = nf V2 (Cbo + CrCo +Ct) (5.9) where f is the frequency of modulation. For the 96 bridge DMTL with a bridge height of 0.9 tm, bridge spacing of 197,/m, and transmission line capacitance of 53 pF/m, the zero bias bridge capacitance is approximately 47 fF based on the low frequency reflection coefficient. Assuming a capacitance ratio of 1.2, the total capacitance to be charged is 96(1.2 x 47 + 197 x 0.053). 10-15 = 6.4 pF. Thus, the total energy required is given by: (4.5 10-12 6.4.10-12 ~ + 36 = 0.156 nJ (5.10) 4 2 With a 1 kHz modulation rate, the average drive power is 0.16 fW, which is extremely low. If the actuation voltage needed is increased to 25 V, the average drive power increases to 2.7 AW for a 1 kHz modulation rate and 27,uW for a 10 kHz modulation rate. This is still a much lower drive power than semiconductor device phase modulators exhibit, which is typically on the order of a few milliwatts or more [27]. If the high frequency design given in Table 5.6 is used, which has a calculated parallelplate zero-bias capacitance of 46 fF, with the same spacing and CPW line dimensions, the total energy becomes: (4.4 10-12 6.3.10-12) 4 + 2 ).602= 15.3 nJ (5.11) which is two orders of magnitude larger due to the 60 V actuation voltage required to modulate the bridges. With the 50 kHz modulation rate, the average drive power becomes 0.77 mW. 102

0 -10 16 -20 -30 -40 -50 -60 0 5 10 15 20 Applied Bias (V) Figure 5.18: DMTI lines measured as phase verniers at 40 GHz. All three lines have 30:tm wide bridges spaced at 306,um with the number of bridges shown in the plot. The insertion loss is 0.51/0.75/1.57 dB for the 8/16/32 bridge DMTLs. 5.3 Phase Verniers Figure 5.18 shows the operation of the DMTLs as phase verniers at 40 GHz. The measurement was done on three lines with identical bridge widths (30 Arm) and spacings (306 Atm). The number of bridges on each line is labeled in the plot. As can be seen from the measurement, 120/360/620 phase shift at 40 GHz can be achieved over a 21 V bias control for the 8/16/32 bridge DMTLs with minimal insertion loss. Thus, very fine control of the phase (0~-36~) can be achieved with less than 0.5 dB insertion loss with 8000 A gold lines. This is well suited for applications in which a digital master clock drives several direct digital synthesizers to achieve true time delay over a large array of antenna elements. A phase vernier is then needed to fine tune the phase between the receiver/transmitter modules at each antenna element. 5.4 Power Handling Measurement The power handling of the DMTL can be limited by either the current density on the transmission line causing excessive heating or by the MEMS bridges being pulled down due to the average RF voltage on the line. Since the electrostatic force attracts the bridge 103

towards the center conductor with either a positive or negative voltage, it is as if the RF voltage was rectified and the average voltage level of the rectified sine wave due to the RF power on the line is pulling on the bridge. The average voltage of a rectified sine wave is given by: T/2 Vavg = - Vp sin(wt)dt = (5.:2) o where T = 27r/w. The RF power in terms of the peak voltage, Vp is given by: V2 P P (5.13) 2Z where Z is the characteristic impedance of the DMTL and is typically near 50 Q. Using (5.12), the RF power on the DMTL can be written as: P= 2a (5..14) 2Z Using this equation, the predicted RF power level at which the DMTL, with a 6 V pulldown voltage, will be pulled down is 3.6 W while for a pull-down voltage of 20 V, the RF power level is 39.5 W. Power measurements were carried out on DMTLs with pull-down voltages from 6 V to 20 V. The power source was an X-band (8-12 GHz) TWT amplifier and the maximum output power delivered to the DMTL was approximately 7 W. However, even at this power level, none of the DMTLs tested had the bridges pull down due to the RF voltage. What was found is that after pumping 7 W through the DMTL, the pull-down voltage had increased. For the line with an initial pull-down voltage of 6 V, the pull-down voltage increased to 20 V. The DMTL with an initial pull-down voltage of 20 V ended up with a pull-down voltage above 40 V and could not be accurately measured due to bias tee limitations. It is believed that the large amount of RF current passing down the line heated up the bridges such that some amount of annealing occurred resulting in a higher pull-down voltage. The heating of the bridges was certainly made worse by the low thermal conductivity of quartz which is 0.014 W/cm-K, compared to the thermal conductivity of silicon which is 1.5 W/cm —~C [53]. 104

CHAPTER 6 Conclusions and Future Work This thesis presented the application of MEMS bridges to periodically loaded lines and focused on the use of this distributed MEMS transmission line as a millimeter wave phase shifter. Optimized phase shifters were developed at 60 GHz with a maximum performance of 90'~/dB or 360~ phase shift with only 4 dB loss, and 100 GHz with 70~/dB or 360~ phase shift with only 5.1 dB loss. These are the lowest loss millimeter wave phase shifters reported to date. In addition, the distributed MEMS transmission line was applied as a broad band switch with better than 40 dB isolation over bandwidths of 20-40 GHz and 40-60 (GHz. Also, a BPSK phase modulator was demonstrated with at a modulation rate of 1 kHz and a required drive power of less than 2 [LW. All of these devices have great potential for advancing the functionality of millimeter wave systems, particularly when low power consumption is required. 6.1 Very Low Loss Phase Shifters As was noted repeatedly in Chapter 4. the performance of the DMTL phase shifter is primarily limited by the small variation in bridge capacitance that could be achieved using electrostatic actuation in the region before the bridges are pulled down. One attempt made at increasing this variation in bridge capacitance was to increase the stable actuation region by incorporating series capacitors in the bias path of the DMTL. Unfortunately, due to dielectric charging, the increased capacitance variation was never achieved. This problem has been reported by other researchers using capacitive MEMS switch technology and is 105

certainly one area for future research. In addition to this, it was noted that the variation that could be achieved, 1.2, is less than the theoretical variation of 1.5. There are several possible reasons for this difference including variations in bridge thickness and residual stress. These variations are primarily a result of non-uniformity across the wafer due to the fabrication process. One solution to this problem is to use the MEMS bridge in a digital mode rather than analog. Thus, the applied voltage is either above the pull-down voltage with an associated down-state capacitance or there is no applied voltage with an associated -upstate capacitance. Using this approach, the capacitance ratio can be designed to be 2 or 3 to give the largest phase shift for the maximum allowable return loss as discussed in Section 4.1. However, in order to achieve the necessary phase resolution, several bits are needed as in a switched line phase shifter. In addition to using the digital phase shift, the loss can be further reduced, thus enhancing the phase shifter performance, by designing the distributed line using microstrip rather than CPW. Using the combination of digital phase shift and microstrip, for low loss, the DMTL phase shifter should be able to achieve 360~/dB at 35 GHz or 1 dB loss for 360~ phase shift. Such incredible performance would certainly lead to new innovative designs for phased array systems. In current phased array systems, there is a PA/LNA chip at each antenna element in order to limit the effect of the loss in the phase shifters. However, with 1 dB insertion loss or less, the number of PA/LNA chips needed could be reduced by using one chip for several antenna elements. This would greatly reduce the cost of large phased array systems which typically have thousands of antenna elements. 6.2 Wideband Switches Although it was shown that the distributed MEMS transmission line could be used for wideband high isolation switching, the results were limited, again, by the fabrication process. The capacitance ratio for the switches was only 10-12 and thus, the change in the Bragg frequency was limited. If a capacitance ratio of 80-100, as reported by industry, 106

is used, then the change in the Bragg frequency would be much larger and result in a bandwidth of 40 or 60 GHz. Also, the isolation was shown to be limited by leakage through substrate modes. Several techniques could be used to lower the effect of substrate modes including judicial layout to limit the coupling between the two sides of the switch, as well as the use of micromachining/micropackaging to increase the isolation [3]. The distributed line is not necessarily the best switch design, depending on the performance criteria. A more compact design can be achieved by using two tune(1 bridges as presented by Muldavin et al. This technique has already been shown to result in -40 dB isolation from 20 to 40 GHz with a capacitance ratio of 40 and a pull-down voltage of 15 V [33]. Muldavin et al. have also shown a cross bridge design using 4 MEMS bridges with a capacitance ratio of 45 results in better than 50 dB isolation over a bandwidth of 12-40 GHz. All of these switch designs are reflective in nature. However, it is possible, using the distributed line approach, to design an absorptive switch such that when the switch is down, rather than appearing as a short circuit, the switch is matched to 50 Q. Such absorptive type switches are important for use with power amplifiers and VCO's where it may be damaging to the active device if the power was reflected back into the output by the switch. 6.3 Modulators Low drive power phase modulators are very useful in applications requiring battery operation where power is at a premium. As shown in Chapter 5, the DMTL phase modulator can be designed to operate up to 100 kbps by appropriately designing the MEMS bridge, with an associated drive power of less than 0.8 mW. If a lower data rate of 30 kbps is acceptable, then the MEMS bridge can be redesigned such that the drive power is on the order of 10 1iW. Thus, extremely low power communications systems can be designed which would greatly extend battery lifetimes. The DMTL phase modulators presented in this thesis are much larger than need be. By using a 3 dB hybrid coupler, such as a Lange coupler, a phase modulator can be constructed which requires only a few MEMS varactors. Thus, the drive power requirements can be even further reduced while maintaining very good linearity and low insertion loss. 107

6.4 Development of High-Q Varactors Varactors can be used in a number of applications including tunable filters and voltage controlled oscillators (VCOs) [3, 13]. Traditionally, varactor diodes have been used in these applications, however, the filter and VCO performance suffer from the relatively high series resistance. Thus, a MEMS varactor is extremely useful due to its very low series resistance. In the case of tunable filters, the MEMS varactor could be used with an interdigitated filter in which the varactors load the resonant elements to tune the resonant frequency. As shown by Brown, the series resistance of the varactor can very quickly destroy the quality factor of the resonant transmission line [3]. Thus, the low series resistance of a MEMS varactor would give much greater filter performance. Tunable filters which maintain excellent filter performance will greatly enhance the functionality of receiver systems and reduce the need for space consuming filter banks. The phase noise of VCOs is inversely proportional to the quality factor of the resonant circuit [13]. Thus, a high-Q MEMS varactor could yield tunable oscillators which maintain very good phase noise characteristics. VCOs are a critical component in modern wireless communications systems, particularly as more multi-function systems are designed. By enabling VCOs which maintain very good phase noise performance, tunability can be introduced into many more systems which, until now, have not been able to use VCOs due to stringent phase noise requirements. 108

APPENDICES 109

APPENDIX A Forces on a Capacitor The derivation of the electrostatic force on a capacitor is often misunderstood and is not always immediately obvious. One very useful source for this derivation is Electromagnetic Field Theory: a problem solving approach. by Markus Zahn [61]. The derivation is quoted here for reference: Consider a capacitor that has one part that can move in the x direction so that the capacitance depends on the coordinate x: q = C(x)v (A.1) The current is obtained by differentiating the charge with respect to time: dq d dv dC(x) i = [C(x)v] = C(x) t+ vdt dt dt dt dv dC(x) dx C(x) + - (A.2) dt dx dt Note that this relation has an extra term over the usual circuit formula, proportional to the speed of the moveable member, where we expanded the time derivative of the capacitance by the chain rule of differentiation. Of course, if the geometry is fixed and does not change with time (dx/dt = 0), then (A.2) reduces to the usual circuit expression. The last term is due to the electro-mechanical coupling. The power delivered to a time-dependent capacitance is p= vi = v [C(x)v] (A.3) 110

which can be expanded to the form d ['CI l 1 IdC(x) = dt -C(x)v2 + - v dt 2 2 dt d \1 C. ~! dC(x) dx. = C(x)v 2 + V2 - (A.4) dt 2 2 dx dt where the last term is again obtained using the chain rule of differentiation. This expression can be put in the form dW dx p=- +fx (A5) dt dt (A.5) where we identify the power p delivered to the capacitor as going into increasing the energy storage W and mechanical power fx dx/dt in moving a part of the capacitor: W= C(x)v2, f = -2dC() (A.6) 2 2 dx Using (A.1), the stored energy and force can also be expressed in terms of the charge as 1 q2 1 q2 dC(x) 1 2d[1/C(x)] 2 C(x)' 2 C2(x) dx 2 dx (A7) 111

APPENDIX B An Octave Bandwidth Monopulse Processor B.1 Introduction The monopulse processor is a critical component in monopulse radar systems. It forms the sum and difference channels (azimuth and elevation) from four antenna inputs as shown in Figure B.l(a). Tlhe sum, difference in azimuth, and difference in elevation signals are used to determine the angular position of the target relative to boresight[50]. The monopulse configuration is the standard technique used for high accuracy tracking with typical applications including airport traffic control, aircraft defense, and ship defense. Waveguide monopulse processors have typically been designed using 0~/'180~ 3 dB couplers (waveguide magic-tees). However, 0~/180~ 3 dB couplers cannot be used in planar circuits due to the positioning of the sum and difference ports. As a result, 0~/90~ 3 dB couplers are used with 900 delay lines to synthesize the monopulse pattern as shown in Figure B.l(b)[25]. One critical problem when implementing this configuration as a planar circuit is the crossover of the two lines in the center of the processor. Jackson, et al. solved this problem by unfolding the processor such that the feeds from the antennas are in the center of the processor as shown in Figure B.2[25]. However, this configuration is not viable for applications in which a dual-polarized antenna is used. In this work, the cross-over problem is solved using a 0 dB coupler as shown in Figure B.3(a)[55]. The 0 dB coupler is formed by cascading two 00/900 couplers and allows the two signals in the middle of the monopulse processor to cross over one another without 112

LO -I Planar RF IAel Monopulse Processor Aaz (a) 2 3 4 (b) Figure B.1: (a) Monopulse radar receiver with (b) a standard monopulse processor using 0~/90~ 3 dB couplers. coupling. Figure B,3(b) shows the circuit simulation of the 0 dB coupler implemented using Lange couplers. As can be seen, the coupler allows the cross-over of the two signals with better than 16 dB isolation over an octave bandwidth. The 0 dB coupler also delays each of the signals by 90~ which eliminates the need for the two 90~ lines in the standard monopulse configuration. The wideband monopulse processor is an excellent choice for the new IF-based monopulse processors first proposed by Ling et al.[31J. In this configuration, the RF channels are amplified, mixed down to an IF, amplified again and then sent to the monopulse processor. The IF-based monopulse processor reduces the complexity of the RF front-end and enables the use of additional amplification at the IF to reduce the effects of loss in the processor. This novel monopulse processor allows a wideband millimeter-wave signal to be processed 113

Figure B.2: Example of a planar RF monopulse processor using using 0~/90~ 3 dB couplers with 90~ delay lines. The output labeled T is terminated in a matched load. 0 -10 X -20 E c -30 1 2 Isolated Port - - Thru Port I i I /i I I I I...I I...I.... -40 2.0 2.5 3.0 Frequency (GHz) 3.5 4.0 (a) (b) Figure B.3: 0 dB coupler used in the Monopulse processor; (a) block diagram and (b) simulation using Lange couplers. at low IF frequencies (2-4 GHz). 114

,AI 90~ Delay - - --- - Line 0-dB Coupler -10 2 3.56 cm N / -20 E B.2 Design and Measur2 -30 '\ Lange. Coupler -40 - ress in an 2 3 4 " 3.0 cm Frequency (GHz) (a) (b) Figure B.4: Monopulse processor using Lange couplers; (a) layout and (b) simulation. B.2 Design and Measurements In order to achieve the largest possible bandwidth, the monopulse processor was designed using Lange couplers for the 0~/90~ 3 dB couplers. As can be seen from Figure B.4(a), this results in an elegant and compact design. The processor was designed for a 525 Pm high resistivity silicon substrate and simulated using HP EEsof's Libra1. The simulated results shown in Figure B.4(b) demonstrate a difference port with a 20 dB null-depth over a 2 GHz bandwidth centered at 3 GHz and a sum pattern with a 1 dB variation over the bandwidth. The remaining two difference ports are of standard bandwidth due to the dispersion effects of the input 90~ delay lines. In order to understand why A3 has such a wideband null, the group delay of each input port to Al and A3 was simulated. As can be seen in Figure B.5(a), the group delay from ports 1 and 4 are very close and thus, the difference of these ports will be very low over the entire bandwidth. However, the group delay from ports 2 and 3 are not very close at all and diverge away from the center frequency. This is the cause of the narrowband null in Al. By comparison, the delays in Figure B.5(b) show that ports 1 and 2 are close enough together to form a good null and they stay close together across the entire bandwidth. Ports 3 and 1HP EEsof Release 6.0, July 1995 115

Delay to Al (1+2)-(3+4) Delay to A3 (1+4)-(2+3) 700.......... 700................ D 600 ~-PoLrt3 _ 600 -- ort 1 'a 500 - a 500 -. Port Port 3 - Port1 Port 3 6 400- V 400 - -- P — -Port 42 Port 24 300... 300......... 2.0 2.5 3.0 3.5 4.0 2.0 2.5 3.0 3.5 4.0 Frequency (GHz) Frequency (GHz) (a) (b) Figure B.5: Simulated group delay from the input ports to (a) Al and (b) A3. 4 are close at the center frequency and get closer away from the center frequency. Thus, A3 maintains a good null across the entire octave bandwidth. The width of' the lines in the Lange coupler is 29 p/m and the separation between the lines is 39 /,m. The couplers are 9.46 mm long and the 50 Q lines are all 0.43 mm wide. The microstrip transmission lines are gold plated to a thickness of 3 /,Lm and the ground plane is gold plated to a thickness of 6 yLm. The input and output lines are all spaced 1 cm apart which allows SMA connectors to be used without the need for additional spacing. An aluminum mount is used to hold the silicon wafer and connectors, and the connections between the SMA connectors and the microstrip lines are made with silver epoxy. The fully assembled monopulse processor is shown in Figure B.6(a). The monopulse processor was tested using a Mini-Circuits 2-4 GHz 4-way power divider and an HP 8720 vector network analyzer. As can be seen from Figure B.16(b), the center frequency of the monopulse processor is shifted down in frequency to 2.6 GHz. However, even with this shift in frequency, a wideband difference port is obtained with an 18 dB null over 2 GHz and a 30 dB null over 0.95 GHz. The shift in the measured frequency response is due to phase error in the Lange couplers. The increased loss in the measured data is due to the connectors and skin effect losses since the transmission lines are only 1.2-2.4 skin depths thick from 1-4 GHz. 116

0 -10...... t A I E ar -30. ':-\' — /... - 40... 1 2 3 4 Frequency (GElz) (a) (b) Figure B.6: (a) Picture of assembled Lange coupler based monopulse processor and (b) measured response. B.3 Conclusion We have demonstrated a wideband Lange coupler based monopulse processor centered at 2.6 GHz with an 18 dB null over a 2 GHz bandwidth. This design can be scaled up to X-band or K-band in order to obtain much greater bandwidths (8-16 GHz2;, 20-40 GHz) if necessary. The nonopulse processor has also proved to be very useful in the new IF-based monopulse systems, allowing the processing of 2 GHz wideband signals from a 94 GHz radar system. 117

APPENDIX C IF-Based Polarimetric Receivers C.1 Introduction Polarimetric radars from L-band to W-band are widely used for remote-sensing, tracking, and target discrimination applications [54]. Current polarimetric radars use a dual-polarized antenna (microstrip or waveguide type) connected to a set of LNA's, variable attenuators, and phase shifters as shown in figure C.l(a). The processed H (horizontal polarization) and V (vertical polarization) signals are summed to give a particular polarization state depending on the setting of the variable attenuators and phase shifters. Since the RF polarimetric circuits are expensive, multiple polarization states are not formed simultaneously. This is not acceptable for applications in which a quick measurement of multiple polarizations is required, such as smPart munition seekers or advanced automotive radars. LO Multiple RF Polarimetric - Polarizations _Circu. Single IF Polarimetric H Polarization 1Circuit V RF Front-End (a) (b) Figure C.: Architecture of (a) Current Polarimetric Systems and (b) Proposed IF-Based Polarimetric System. In order to provide low-power multiple polarimetric measurements, the system shown 118

in figure C.l(b) is proposed as a means of forming many polarization states at the IF frequency. The advantage of this system is that low-cost low-power silicon-based IF circuits can be used to perform most of the processing and many different polarization states can be formed simultaneously. This architecture also allows the IF frequency, -used to perf6rm the polarimetric processing, to be independent of the RF frequency. Thus, the same IF polariretric processor can be used with different RF front-ends. The disadvantage with this system is the larger fractional bandwidth which the received signal has at IF frequencies compared to RF frequencies. However, it is possible to build an IF network which yields an accurate polarization measurement for a fractional bandwidth of 20%. Since current radars have a bandwidth of 50 to 250 MHz, it is seen that an IF network centered at 2 GHz can process a 400 MHz bandwidth signal. Microstrip IF Amp Antenna H V \ Mixer \ LO 3 dB 0/180~ Coupler Coupler Figure C.2: Schematic of the Passive IF Polarimetric Receiver. 119

C.2 Experiment The polarimetric receiver is composed of a 9.8 GHz dual-polarized microstrip antenna, fabricated on a 0.51 mm thick er = 2.2 Duroid substrate1, followed by two balanced mixers with a measured SSB conversion loss of 6 dB. The mixers are fed with an LO frequency of 9.6 GHz, resulting in an IF frequency of 200 MHz. All of the IF couplers, amplifiers and switches used for the IF circuitry are low-cost components purchased from Mini-Circuits2. The IF polarimetric processor can be completely integrated on silicon, including all necessary amplifiers and switches up to 1 - 2 GHz [4]. This will reduce the cost even further and also increase the available bandwidth of the system. The IF polarimetric circuit that has been tested is shown in figure C.2. It is based on the concept of a six-port junction in which the relative phase and amplitude between the two input signals can be determined from four different amplitude measurements [24]. In this case, six different measurements have been used in order to decrease the error in the polarization measurement. ^ — m-Epin pn -1 / HCP: -15 I -15 CZ15 -) C — Xpo- -1 N - \ E -20, o /I E 'I. / ~ -25 -25 -30 30 -90 -60 -30 0 30 60 90 -90 -60 -30 0 30 60 90 Angle (degrees) Angle (degrees) (a) (b) Figure C.3: Response of Polarimetric Receiver for (a) Horizontally Polarized Wave and (b) Left-hand Circularly Polarized Wave. To verify the operation of the polarimetric receiver, two tests are performed. The first 1Rogers Corp., 100 S. Roosevelt Ave., Chandler, AZ 85226 USA. 2Mini-Circuits, P.O. Box 350166, Brooklyn, NY 11235-0003 USA 120

measures various antenna patterns where the measurements are taken from the output ports of the IF polarimetric circuit. The second test transmits many different polarizations and measures the error in the incident polarization calculated from the amplitude measurements taken at the IF output ports. For both of these tests, an X-band quad-ridged horn is used as the transmitting antenna. The transmitted polarization is set by adjusting low-loss coaxial line stretchers placed in the feed-lines of the quad-ridged horn. The coaxial line stretcher physically changes the length of the line and is therefore equivalent to a MMIC phase shifter in the sense that it adjusts the phase of the signal. C.3 Results The received patterns for a horizontally polarized transmitted wave and a left-hand circularly polarized transmitted wave measured at the IF ports are shown in figures C.3(a) and C.3(b), respectively. The measured patterns show the typical traits of a microstrip antenna. For the linearly polarized wave the E-plane pattern falls to -10 dB at 90~, and the H-plane pattern is -15 dB at 90~. The cross-pol. for the microstrip antenna was measured to be -23 dB and so the increased cross-pol. seen here is due to the presence of the RF and IF circuitry around the antenna. For the circularly polarized wave, the cross-pol. increases significantly near ~90~ (as expected) due to the difference between the E and H-plane patterns. To obtain accurate polarization measurements, the system is calibrated to eliminate phase and amplitude imbalances in the IF couplers. The calibration is performed by transmitting six different known polarizations and then calculating the necessary calibration coefficients from the measured response. Figure C.4 shows the results of the calibrated and uncalibrated measurements. As can be seen, the calibrated system works well and gives a ~5~ error in the measured polarization at the IF ports. This error is limited by the accuracy of the transmitting system. The jumps in the uncalibrated curve are due to using different output ports of the IF polarization circuit to find the incident polarization. 121

I I I I, I I I I I I I I I I I I I I I I %' 40 - a) / I,20 -' ' -0 uncalibrated I -180 -120 -60 0 60 120 180 Incident Phase Angle (degrees) Figure C.4: Measured Phase Error for X-band Receiver. C.4 Conclusion The idea of using IF based polarimetry for applications in which a quick polarization measurement is needed while maintaining low power consumption has been proposed. The advantage of this architecture is that low-cost low-power silicon-based IF circuits can be used to implement the polarimetric processing. Bandwidth should not be a proble since the IF circuits can be designed to operate at 1 - 2 GHz. This idea has been successfully demonstrated with an X-band system, and can be implemented with any RF frequency. 122

APPENDIX D Detailed Fabrication Process This appendix discusses the fabrication process used for the distributed MEMS transmission lines discussed in this thesis. The process used determines, to a large extent, the mechanical properties of the MEMS bridges since the residual stress within the released structures can have a large effect on these properties. This process is based on using quartz wafers and thus includes some steps intended to deal with the particular problems associated with fabricating on quartz. 1. Wafer Cleaning: (a) Immerse the wafer for 15 minutes in 1:1 H2S04:H202 (Piranha Etch). Cascade rinse in deionized (DI) H20 for 5 minutes. (b) Blow dry with N2. Dehydrate bake on a 130~ C hotplate for 2 minutes. (c) Clean in a 250 mT 02 Plasma at 150 W for 3 minutes. 2. CPW metal lift-off: (a) Evaporate 200 A Ti (This step is necessary in order to obtain good adhesion and the correct lift-off profile for the AZ 5214 PR on quartz). (b) Spin coat with AZ 5214 PR at 3000 rpm for 30 sec. (c) Soft bake on a 105~ C hotplate for 1 min. (d) Align a clear-field mask, exposing areas where the metal is to be lifted off. Expose at 20 mW/cm2 for 4.5 sec. 123

Table D.1: PECVD SiXNy recipe [42]. Gas/Flow SiH4/100 sccm Gas/Flow NH3/10 scem Gas/Flow N2/990 scem Gas/Flow He/900 sccm Pressure 700 mT RF Power 100 W Temperature 400~ C Time 12 min. Thickness 2000 (e) Hard bake on a 130~ C hot plate for 1 min. (f) Flood expose for 1.5 min. at 20 mW/cm2. (g) Develop in AZ 327 MIF for 50 sec. Rinse in DI H20 and dry with N2. (h) Evaporate 300/8000 A Ti/Au (8000 A Au is necessary in order to reduce loss since the CPW center conductor is not electroplated in this process). (i) Soak in acetone (ACE) overnight in order to lift-off undesired metal. (j) Rinse in isopropyl alcohol (IPA). Dry with N2. 3. Plasma Enhanced Chemical Vapor Deposition (PECVD) of SixNy: (a) Clean in a 250 mT 02 Plasma at 150 W for 3 minutes (This step is critical for removing a film left by the AZ 5214 PR.) (b) Deposit SiXNy using recipe listed in Table D.1. (c) Clean in ACE and IPA. Dry with N2. (d) Spin coat with Hexamethyldisilazane (HMDS) adhesion promoter and Shipley 1813 PR at 3.5 krpm for 30 sec. each. (e) Soft bake on a 105~ C hotplate for 1 min. (f) Align a clear field mask, exposing areas where the SixNy is to be removed. Expose for 5 sec. at 20 mW/cm2. (g) Develop in 1:5 MF351:DI for 1 min. Rinse in DI and dry with N2. (h) Hard bake on a 130~ C hotplate for 2 min. 124

Table D.2: PECVD SiXNy reactive ion etching (RIE) recipe. Gas/Flow CF4/40 sccm Gas/Flow 02/1 sccm Pressure 100 mT RF Power 100 W Time 7 min. (i) Etch Si.Ny in a CF4 and 02 plasma using the recipe shown in Table D.2 (This etch will also remove some or all of the 200 A Ti layer). (j) If any of the 200 A Ti layer is remaining, remove it in 1:10 HF:DI. (k) Remove the resist in a 250 mT 02 plasma at 150 W for 3 min. (1) Clean in ACE and IPA. Dry with N2. 4. Metal electroplating and MEMS bridge formation: (a) Spin coat with Shipley 1813 PR at 3-5 krpm for 30 sec. to form the sacrificial resist layer which defines the bridge height (the thickness of the resist is from 1.5-1.16 /lm after the hard bake). (b) Soft bake on a 105 ~ C hotplate for 1 min. 10 sec. (c) Align a dark field mask, exposing areas to be electroplated except any areas beneath bridges or circuit metal regions which are not electroplated. Expose for 5 sec. at, 20 mW/cm2. (d) Develop in 1:5 MF351:DI for 1 min. Rinse in DI and dry with N2. (e) Hard bake on a 130~ C hotplate for 2 min. 30 sec. (It is important to drive out all of the solvents from the resist in order to avoid problems with bubbling when the next resist layer is applied). (f) Evaporate electroplating seed layer 500/2000/500 A Ti/Au/Ti. (g) Spin coat Shipley 1813 PR at 3 krpm for 30 sec. (resist thickness is approximately 1.6 pin). (h) Soft bake in 80~ C oven for 20 min. 125

(i) Align a dark field mask exposing areas to be electroplated, including the air bridges. Expose for 5 sec. at 20 mW/cm2. (j) Develop in 1:5 MF351:DI for 1 min. Rinse in DI and dry with N2. (k) Etch the exposed top Ti layer in 1:10 HF:DI for approximately 6 sec. Rinse in DI and dry with N2. (1) Electroplate 2.5-3 pm of gold using a current of 6 mA with a plating rate of 0.12 p/m/min. (with this solution, higher plating current tends to give more compressive stress in the bridges, which can cause buckling). The gold plating solution used is Aurall 3051 at a temperature of 50~ C and stirred with a magnetic stir rod. (in) Rinse in DI and dry with N2. (n) Flood expose the top layer of resist for 1.5 min. at 20 mW/cm2. (o) Develop in 1:5 MF351:DI for 1 min. Rinse in DI and dry with N2. (p) Strip the Ti/Au/Ti seed layer. The Ti is etched in 1:10 HF:DI for approximately 6 sec. The gold is etched in TFA Gold Etchant (~ 28 A/sec. at room temperature). Rinse in DI between each etch. Care must be taken when etching the gold seed layer since the gold etch will also attack the electroplated gold and at a much higher etch rate than the evaporated gold (~ 2-4x faster). This is most critical for the bridges since if the bridge thickness becomes too small, the bridge could buckle due to compressive stress. (q) Rinse in DI and dry with N2. (r) Remove the sacrificial resist layer by soaking in PRS-2000 overnight. At this point, the wafer cannot be air dried because the surface tension of the evaporating liquid will pull the released bridges down to the substrate causing them to stick [28]. (s) Rinse in DI for 5 min. 1The patent on the Aurall 305 gold process is held by LeaRonal Inc. 272 Buffalo Ave. Freeport, NY 11520 126

5. Release of MEMS bridges: (a) Transfer from DI to IPA and then to fresh IPA to remove all DI. (b) Transfer to Ethanol and then to fresh Ethanol to remove all IPA. The release process uses liquid CO2 which is miscible with Ethanol but not IPA. (c) Transfer to Critical Point Dryer chamber filled with Ethanol and secure chamber. (d) Cool chamber down to -20~ C. (e) Replace Ethanol with liquid CO2 by filling and purging the chamber with liquid CO2 several times. (f) Completely fill the chamber with liquid CO2 and turn on heater. (g) Once the chamber pressure and temperature have risen above the CO2 critical point (1073 psi and 31.1~ C), the pressure is gradually reduced, while maintaining a constant temperature of ~ 35~ C, such that the super fluid transitions directly to a gas [34]. (h) Clean in a 250 mT 02 plasma at 150 W for 3 min. 127

BIBLIOGRAPHY 128

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