034029-1-F EXPERIMENTAL AND THEORETICAL STUDY OF PARASITIC LEAKAGE/RESONANCE IN A K/LA-BAND MMIC PACKAGE Linda P.B. Katehi August 1996 Final Report Prepared for: Nasa Lewis Research Center 34029-1-F = RL-2468

Accepted o IEEE T117T 1996' Special Symposium Issuc EXPERIMENTAL AND THEORETICAL STUDY OF PARASITIC LEAKAGE/RESONANCE IN A K/KA-BAND MMIC PACKAGE Jong-Gwan Yook and Linda P. B. Katehi Radiation Laboratory Department of Electrical Engineering and Computer Science The University of Michigan Ann Arbor, MI 48109-2122, U. S. A. Tel: 313-764-0502, Fax: 313-747-2122, Email: yookjong@engin.umich.edu Rainee N. Simons and Kurt A. Shalkhauser* NASA Lewis Research Center NYMA Group NASA Lewis Research Center* 21000 Brookpark Road Cleveland, OH 44135 ABSTRACT In this paper, electromagnetic (EM) leakage and spurious resonances in a K/Ka-Band (18 - 40 GHz) MMIC hermetic package designed for a phase shifter chip are studied using the finite element method (FEM) and the numerical simulation results are compared with the measured data. Both the measured and calculated data indicate several spurious resonances in the 18 to 24 GHz region and the origin of this phenomenon is identified by virtue of the modeling capability of the FEM. Moreover, the effect of DC bias lines, bond wires, shielding and the asymmetry of the package on electrical performance are closely examined. In addition, the effect of adding a resistive coating to the inside surface of the package lid and also the use of dielectric packaging materials with very high loss tangent are studied in view of the suppression of the spurious resonances. Finally, design guidelines for the improved package are presented. 1

I. INTRODUCTION Iigh performance packages, especially for microwave and millimeter-wave integrated circuit application, should satisfy stringent mechanical, electrical and environmental requirements. From a mechanical and environmental point of view, a package should provide protection to the internal circuits from the surroundings. Furthermore, packages are required to exhibit minimum insertion loss, good isolation between the ports as well as electromagnetic (EM) shielding for minimum interference (EMI) [1, 2]. Another important electrical requirement of a package is non-invasiveness with respect to circuit performance [3]; a package fails electrically if parasitic cavity resonances substantially deteriorate circuit performance. As a result of all of these requirements, successful development of a high frequency package requires careful design strategies. Recently, low cost high performance MMIC packages have been developed by using approximate equivalent circuit models or experimental data [4, 5]. However, due to the limited accuracy of the modeling tools, the designed packages exhibit a serious degradation of performance at higher frequencies. To overcome the above difficulties in designing high frequency/ high performance package, frequency and time domain full-wave electromagnetic tools are applied [6]-[9] for various applications. The goal of the paper is to study the electrical performance of a K/Ka-band hermetic package designed for a MMIC phase shifter and comprehend the parasitic effects introduced by the package geometry. For thorough understanding of the package performances, the effects of the various features of the package, such as filled metal vias, DC bias lines, bond-wires, structural symmetry/asymmetries, and even the effect of the test fixture on the circuit performance are extensively investigated. Furthermore, the use of dielectric packaging materials with high loss tangent and the influence of coating the inside surface of the package lid with a resistive material are also examined. For the EM characterization of the K/Ka-Band MMIC package, a parallelized three dimensional finite element method (FEM), which is optimized on the distributed memory machine (IBM SP2) with task parallelization strategy, is applied [10, 11]. The parallelized 3D 2

FEM code exhibits near linearly scalable performance improvement due to the frequenicy independent nature of the frequency domain FEM. To the best of our knowledge, thlis is the first comprehensive high frequency full-wave treatment for an existing millimeter-wave package. The modeling effort described herein is divided into three parts. In tile first part, the input and the output microstrip lines are symmetrically located with respect to the two planes of symmetry of the package. In addition, the package is considered to be free standing, i.e., totally isolated. Under these assumptions only one quarter of the package needs to be considered and as a result the modeling effort is computationally simpler. In the second case, the input and the output microstrip lines are asymmetrically located with respect to one of the plane of symmetry. This is of more general interest since in real applications the transmission lines on the MMIC chip need not be symmetrically located. In the last part, the microstrip lines are asymmetrically located and the package is placed inside a test fixture. By placing the package inside the text fixture, the interactions between the fields leaking through the package dielectric walls and the surroundings can be modeled. This model is of great practical interest since it points towards ways and means to improve future package performance. The modeled characteristics are compared with experimental results and show very good agreement. In addition, the effects of the three different types of packaging features, such as additional metal-filled vias, resistive coating, and lossy packaging materials, are carefully examined to improve the package performance. This modeling procedure has the potential to predict the performance of other types of packages such as those used in wireless communications which include multi-chip modules. II. PACKAGE DESCRIPTION AND MODELING A K/Ka-band MMIC package fabricated by Hughes Aircraft Company for the NASA Lewis Research Center is shown in Fig. 1. The package has 50 Q microstrip input/output feed lines for the RF signal and two sets of five metal lines on either sides for DC bias and 3

control. In addition. a set of twelve metal filled vias tie the top and bottom perfect elect ric conductor (PEC) ground planes to provide mechanical strength and also serve as an EM. shield. The package is fabricated from alumina (92 %o pure, cr = 9.5) using the IIT(CC process. To characterize the package, a 50 Q through line is placed in the recess as shown in Fig. 1 and is wire-bonded to the input/output microstrip feed lines. The peripheral dimensions of the package are 7.112 x 7.112 x 1.27 mm. One can observe from the figure that the metal filled vias and the input/output microstrip feed lines are displaced towards one side of the package introducing a package asymmetry. This asymmetry is attributed to the specific geometry of the MMIC phase shifter which the package intends to house. While this package provides hermeticity, it does not shield electromagnetically and as a result the packaged circuits are exposed to a semi-open environment. For the simulation of this environment, artificial absorbing layers have been designed using lossy isotropic dielectrics as shown in Fig. 2. The performance of the absorber is controlled by assigning a certain amount of losses in the absorbing material and by specifying its thickness. In this study, we designed two different types of isotropic absorbing materials for air and dielectric side terminations. The material parameters are chosen to be ~ai,a r = 1.0 + jl0.0 for the air side and del = 9.5 + j'15.0 and ydi = 1.0 + jl.5789 for the dielectric side. The thickness (t) of the artificial absorbers is assigned to be 0.70 mm to allow enough damping of the fields inside of the absorbers and to minimize the computational domain. It is well known that this type of absorber performs well for near-normal incident fields. III. NUMERICAL AND EXPERIMENTAL RESULTS AND DISCUSSIONS III-A. MODELING OF ISOLATED SYMMETRIC PACKAGE In this case, an isolated symmetric package is designed and modeled. The structural details are very close to that of the Fig. 1 except a few minor modifications for symmetric arrangement. The input/output microstrip lines and the through line are moved to the center of the package and the two asymmetric metal filled vias are aligned on line. As it will be shown in the later sections of the paper, the symmetric arrangement of the package 4

imrnpacts on the performance of the package greatly. The computed scattering parameters are shown in Fig. 3. The return loss is less than -20 dB over the entire frequency range and the insertion loss remains within -1.0 dB. III-B. MODELING OF ISOLATED ASYMMETRIC PACKAGE In this section, the performance of the isolated asymmetric package is calculated and the computed S-parameters are shown in Fig. 4. As one can observe in the figure, the package reveals relatively good performance with better than -10.0 dB return loss over the entire frequency range. It is also noted that no cavity or spurious resonances are observed even though the size of the overall package becomes larger than half guided wavelength at frequencies above 15 GHz. The lack of any resonance is also evident from Fig. 5, which shows the computed vertical electric field distribution in the package, and is attributed to the imperfect EM shielding. Even though the package provides excellent mechanical/environmental protection and hermeticity, the side walls formed by the 12 vertical metal filled vias between the DC bias lines do not provide a solid EM shield. Leakage from the cavity semi-open walls drains the energy from the cavity and suppresses the occurrence of cavity resonances. The effects of the bond wires and DC bias lines on the characteristics of the package are also studied. This is accomplished by computing the scattering parameters after eliminating the four bond wires between input/output RF microstrip lines and the 50 Q through line remaining 40 Hm gap between them, and 5 DC bias lines from both sides of the package. The computed scattering parameters shown in Fig. 6 reveal no discernible differences from the previous data. This result implies that the presence of the bond wires and the DC bias lines is not critical to the performance of the package. Even further, we can argue that the shape of those structures should not disturb the overall characteristics of the package. Compared to the performance of the symmetric package shown in Fig. 3, the return loss of the asymmetric package surprisingly increases about 10 dB. III-C. MODELING OF ASYMMETRIC PACKAGE PLACED IN A TEST FIXTURE 5

The asymmetric package is inow1 modeled by taking into consideration tihe test fixture to quantify the susceptivity of the package to the environment in addition to identification of the leakage and spurious resonances. The test fixture is modeled by using PEC walls along the ends of the package with an opening at the center for the input/output coaxial connectors and half height PEC walls and artificial absorbers for two other sides (see Fig. 2). The half height PEC walls are designed for the simulation of the recess depth of the test fixture and absorber is placed on top of the half PEC wall.The measured and computed scattering parameters for the package placed in the test fixture show very good agreement as illustrated in Fig 7. As it can be observed, the overall structure including the package and test fixture suffers from spurious resonances in the low frequency region (18 - 24 GHz) but it exhibits very good performance in the rest of the frequency range. The resonance phenomenon can be understood by investigating the EM field distribution at various frequencies as shown in Fig. 8. Fig. 8 (a) is shows the field distribution at f = 20.5 GHz. At this frequency IS111 has a peak indicating mismatch (see Fig. 7(a)) and reveals energy leakage through the input/output RF microstrip lines and between the metal filled vias resulting in high insertion loss. Also, it is observed that at some frequencies the excited EM fields are strongly concentrated in the package frame which has the shape of a dielectric ring and is placed on top of the input/output microstrip lines, along the DC bias lines. However, it should be noted that the poor EM hermeticity may cause a serious EM compatibility (EMC) problem. Fig. 8(b) shows the field distribution at 29.5 GHz, where IS111 has a dip indicating small insertion loss (see Fig. 7(a)). The calculated results also show the voltage standing wave pattern of the EM field in the microstrip line. IV. FEATURES WHICH CAN ENHANCE PACKAGE PERFORMANCE IV-A. ASYMMETRIC PACKAGE WITH ADDITIONAL METAL FILLED VIAS To investigate the role of the vertical metal filled vias on the EM hermeticity of the package and to study the energy leakage from the input/output ends of the package, four additional vias are placed as shown in Fig. 9. The dimensions of the additional vias are the 6

same with those o t preious set of e et ias. As shon in Fig. 10, the frequency response of the package is quite degraded te dr most of th e frequency region. Hence, it is revealed that providing additional vias could enhance package internal resonances by suppressing the leakage of the EM fields. Interestingly enough, the enforcement of strong EMN hermeticit by placing additional vias causes strong unwanted internal resonances, while poor EMl hermeticity makes the package more susceptible to the surrounding environment. 'To overcome the above difficulties, we utilized lossy packaging materials as examined in the following sections. IV-B. ASYMMETRIC PACKAGE WITH RESISTIVE COATING ON THE INSIDE SURFACE OF THE LID As an effort to suppress the unwanted resonances in the 18 to 24 GHz region (refer Fig. 7(b)), a resistive sheet backed by PEC plane is placed on top of the package. The value of the resistivity (R) of the sheet is chosen to be 100 Q/O or 400 Q/O and the thickness (t) to be 0.1 mm or 0.3 mm. Fig. 11 shows the computed scattering parameters. The spurious resonances in the low frequency region (18 - 24 GHz) are completely suppressed for all 3 cases and there are no distinguishable differences between them. This observation indicates that placing resistive material on the inside surface of the package lid can suppress the unwanted resonances by imposing lossy boundary condition on the fields resonating inside the package. IV-C. ASYMMETRIC PACKAGE WITH LOSSY DIELECTRIC FRAME It is very important to suppress the internal resonances during design in oder to avoid performance degradation. Suppression of the internal resonances may be accomplished through a variety of approaches. One approach may suggest the design of a leaky package so that strong resonances are not supported. This approach has been examined in the previous sections and reveals that the package interferes strongly with its surroundings. As an alternate approach, one can fabricate the package frame from a dielectric material having non-zero loss tangent. Fig. 12 shows S-parameters of the package with two different 7

dielectric materials: case 1: I r = 9.5(1.0 + jO.1), Ir = 1.0 + jO0., and Case 2:r = 9.5(1.0 + jO.5), [r = 1.0 + jO.. As one carn realize from the figure, the unwanted cavity resonances in the low frequency region are completely suppressed by the assigned small amount of loss in the packaging material. It is also important to notice that the insertion loss increases to -2 dB due to the loss in the packaging material. The differences in the scattering parameters for two cases corresponding to different loss tangents remain negligible in the whole frequency spectrum. V. CONCLUSIONS In this paper, a 18 to 40 GHz hermetic package is experimentally characterized and also modeled using finite element method. The FEM accurately predicts the S-parameters, energy leakage and spurious resonances which degrade the package performance. To the best of our knowledge this is the first comprehensive study of RF leakage and resonances in a millimeter-wave package. The modeled results show that the unwanted spurious resonances in the package can be suppressed by incorporating a resistive coating on the lid and by the use of dielectric materials with high loss tangent. The modeled S- parameters for a symmetric package predict low insertion loss on the order of -1.0 dB over the 18 to 40 GHz band. From this study, it is clear that symmetry in the package construction is crucial for good performance. ACKNOWLEDGMENT This work was partially supported by NASA Lewis Research Center under grant NAG1807. Also, the authors would like to thank the Maui High Performance Computing Center (MHPCC), the Army Research Office (ARO), thei Army Research Laboratory (ARL) and the University of Michigan Center for Parallel Computing (CPC), which is partially funded by NSF grant CDA-92-14296 and the Ford Motor Company, for the use of their computational facilities. 8

References [1] Linda P. B. IKatehi, "The Role of EM Modeling in Integrated Packaging," pp.982-985, 1993 IEEE AP-S Digest, July 1993. [2] H. J. Kuno and T. A. Midford, "The Evolution of MMIC Packaging," pp.1005-1008, 1993 IEEE AP-S Digest, July 1993. [3] D. W. Griffin and A. J. Parfitt, "Electromagnetic Design Aspects of Packages for Phased Array Modules That May Incorporate Monolithic Antenna Elements," pp. 986-989, 1993 IEEE AP-S Digest, July 1993. [4] Bernhard A. Ziegner, "High Performance MMIC Hermetic Packaging," Microwave Journal, pp. 133-139, Nov. 1986. [5] Howard Bierman, "Designers Strive for Low Cost MMIC Packages," Microwave Journal, pp. 100-106, Sep. 1992. [6] T. Shibata, S. Kimura, H. Kimura, Y. Imai, Y. Umeda, Y. Akazawa, "Design Technique for a 60 GHz-Bandwidth Distributed Baseband Amplifier IC Mudule," IEEE Journal of Solid-State Circuits, vol. 29, pp.1537-1544, Dec. 1994. [7] Jong-Gwan. Yook, N. Dib, E. Yasan, and L. Katehi, "A study of Hermetic Transitions for Microwave Packages," 1995 IEEE MTT-S Int. Microwave Symp. Digest, pp.1579 -1582, May 1995. [8] J. Gipprich, L. Dickens, B. Hayes, and F. Sacks, "A Compact 8-14 GHz LTCC Stripline Coupler Network for High Efficiency Power Combining with Better Than 82 % Combining efficiency," 1995 IEEE MTT-S Int. Microwave Symp. Digest, pp.1583 -1586, May 1995. [9] M. Rittweger, M. Werthen, J. Kunisch, I. Wolff, P. Chall, B. Balm, and P. Lok, "3D FDTD Analysis of s SOT353 Package Containing a Bipolar Wideband Cascode 9

Transistor lising Compression Approach." 1995 IEEE ITT-S Int. M.icrowave lSymp. Digest. pp.1587-1590, May 1995. [10] Jong-Gwan Yook, N. Dib and L. Katehi, "Characterization of High Frequency Interconnects Using Finite Difference Time Domain and Finite Element Methods [. IElE Trans. Microwave Theory Tech. pp. 1727-1736, vol. 42, no. 9, Sep. 1994. [11] Jong-Gwan Yook and L. Katehi, "Characterization of MIMICs Packages Using A Parallelized 3D FEM Code," 1996 ACES Symposium proceedings, Monterey, CA.

List of Figures 1 Schematic diagram of the K/Ka-band hermetic package designed and manufactured for a MMIC phase shifter chip. The diameter of the vertical metal filled vias are Dv = 0.203 mm and the distance between these vias are D, = 1.016 mm. The upper and lower alumina layers are each 0.381 mm thick (Dt)................................... 13 2 Schematic showing the location and extent of PECs in addition to the artificial absorbers which simulate the test fixture and open environment. Two different types of absorbers (_a=ir air and dal, dAA are designed 'AAIAA AA I, AA ) are designed and placed in either side of the package facing the DC bias lines (not fully shown in the figure for simplicity)...................... 14 3 Computed S-parameters for the isolated symmetric package......... 15 4 Computed S-parameters for the isolated asymmetric package......... 16 5 Computed vertical electric field distribution (dB scale) at (a) f = 20.5 GHz and (b) f = 29.5 GHz in the isolated asymmetric hermetic package..... 17 6 Comparison between the computed S-parameters for the isolated asymmetric package with (original) and without (simplified) DC bias lines and bond wires............................................18 7 Measured and computed S-parameters ( (a) IS111 and (b) 1S211 ) for the asymmetric package residing in the test fixture.................. 19 8 Computed vertical electric field distribution (dB scale) in the asymmetric hermetic package placed in the test fixture at (a) f = 20.5 GHz and (b) f = 29.5 GHz..................................... 20 9 Schematic diagram of the asymmetric hermetic package showing four additional vias at the input and output ends of the package............. 21 10 Computed S-parameters for the asymmetric package with four additional vias at the input and output ends of the package................ 22 11

11 Computed S-parameters ( (a) IS,11 and (b) I|)1i ) for the asymrnetric package residing in the test fixture with resistive coating on the inside surface of the lid. The resistivity and the thickness of the coating is indicated as R in [Q/o] and t in [mm], respectively....................... 3 12 Computed S-parameters for the asymmetric package with frame constructed from dielectric material with high loss tangent. Case 1: c = 9.5(1.0+j0.1) and -r = 1.0 + jO.0. Case 2: r = 9.5(1.0 + jO.5) and r = 1.0 + jO.O.. 24 12

Ground Plane Figure 1: Schematic diagram of the K/Ka-band hermetic package designed and manufactured for a MMIC phase shifter chip. The diameter of the vertical metal filled vias are Dv = 0.203 mm and the distance between these vias are DS = 1.016 mm. The upper and lower alumina layers are each 0.381 mm thick (Dt). 13

Artificial absorber Top of the package Coaxairal connector height "AA;AA for RF in/output / PEC wall Full height (recess depth) PEC wall (test fixture) Figure 2: Schematic showing the location and extent of PECs in addition to the artificial absorbers which simulate the test fixture and open environment. Two different types of absorbers ( a, ar and Eddiel diel) are designed and placed in either side of the package facing the DC iAA AA AA t fully s in te fiur r ilicity.AA bias lines (not fully shown in the figure for simplicity). 14

0 -10 - *11 --- 3 --- I S211 -20 -30 -40 -50... 18 20 22 24 26 28 30 32 34 36 38 40 Frequency [GHz] Figure 3: Computed S-parameters for the isolated symmetric package. 15

0 I I )" T3 6L-J 3 * 0 be -10 -20 -30 -40 — E —.. IS211 -50 18 20 22 24 26 28 30 32 34 36 38 40 Frequency [GHz] Figure 4: Computed S-parameters for the isolated asymmetric package. 16

-lec-r'c Frid 3 strzuticr i'- lakage at ZJ.S 3,Hz i.... - 0 -30 -40 - 70 Electric Field Distribution in Package at 29.5 GHz 0 -1C -20 -30 -40 -60 -70 -3L FigDiure 5: Computed vertical electric field distribution (clB scale) at (a) f = 20.5 GCTHz and (1)) 29.5 G'Hz in the isolated asvymmetric hermetic package. 1

IS I - original -------- IS211 - original o IS11 - simplified o IS211 - simplified 0 -,,,, - -. —''' - '- -- - EZI ----- --- D -— Er — O.....-E-E ---- -. -— E ---- ]-1 -10 -20 -30 -40 -50 18 20 22 24 26 28 30 32 34 36 38 40 Frequency [GHz] Figure 6: Comparison between the computed S-parameters for the isolated asymmetric package with (original) and without (simplified) DC bias lines and bond wires. 18

0 -10 -20 -30 IIIII -40 -50..... 18 20 22 24 26 28 30 32 34 36 38 40 Frequency [GHz] I - (D 0 0 --6 I 4,6 - -8 - 18 20 22 24 26 28 30 32 34 36 38 40 Frequency [GHz] Figure 7: Measured and computed S-parameters ( (a) IS511 and (b) IS211 ) for the asymmetric package residing in the test fixture. 19

Eie~ctrc Fielz- Distributiol -r. Datxage at XD S 113H-z I0 -10o L-0 -40 -so -70 - Electric Field Distribution in Package at Z9.S GHz 0 -10 -4-0 I;U wi~ue ~~: Computed vertical electric field distribution ( dB scale) in the asymmetric liermetIC, package plIaced in tlie test fixture at (a) f 2 0.5 GHz and (b) f -29-.5 GHz. 20

50 Q Thru Line Additional filled vias Metal-filled vias RF In/Out Ground Plane Figure 9: Schematic diagram of the asymmetric hermetic package showing four additional vias at the input and output ends of the package. 21

0 -5 "0 Q) bC) 0 -10 -15 -20 -25 -30 -35 18 20 22 24 26 28 30 32 34 36 38 40 Frequency [GHz] Figure 10: Computed S-parameters for the asymmetric package with four additional vias at the input and output ends of the package. 22

0 -10 -20 -30 -40 -50 HI.. -. -.........,,I I,... - -. ilI R=100,t=03 'I, -R = 400,t = 0.3 R = 400,t = 0.1 8 20 22 24 26 28 30 32............... 34 36 38 40 Frequency [GHz] 0 -1 -2 Cl a: clq - R= 100, t=0.3.-. --- R=400, t=0.3 ---- R=400, t=0.1 I...I... I..I... I.,.!.I...!.., I...I...!., -3 -4 -5 18 20 22 24 26 28 30 32 34 36 38 40 Frequency [GHz] Figure 11: Computed S-parameters ((a) IS111 and (b) IS211 ) for the asymmetric package residing in the test fixture with resistive coating on the inside surface of the lid. The resistivity and the thickness of the coating is indicated as R in [f2/] and t in [mm], respectively. 23

0 -10 -> C -20 -30 -40 - I S11I: case2 * IS211: case2 18 20 22 24 26 28 30 32 34 36 38 40 Frequency [GHz] Figure 12: Computed S-parameters for the asymmetric package with frame constructed from dielectric material with high loss tangent. Case 1: er = 9.5(1.0 + jO.1) and Ar = 1.0 + jO.O. Case 2: e = 9.5(1.0 + jO.5) and /L, = 1.0 + jO.O. 24