Adaptive Distributed Architectures for Future Semiconductor Technologies.
dc.contributor.author | Pellegrini, Andrea | en_US |
dc.date.accessioned | 2014-01-16T20:41:31Z | |
dc.date.available | NO_RESTRICTION | en_US |
dc.date.available | 2014-01-16T20:41:31Z | |
dc.date.issued | 2013 | en_US |
dc.date.submitted | 2013 | en_US |
dc.identifier.uri | https://hdl.handle.net/2027.42/102405 | |
dc.description.abstract | Year after year semiconductor manufacturing has been able to integrate more components in a single computer chip. These improvements have been possible through systematic shrinking in the size of its basic computational element, the transistor. This trend has allowed computers to progressively become faster, more efficient and less expensive. As this trend continues, experts foresee that current computer designs will face new challenges, in utilizing the minuscule devices made available by future semiconductor technologies. Today's microprocessor designs are not fit to overcome these challenges, since they are constrained by their inability to handle component failures by their lack of adaptability to a wide range of custom modules optimized for specific applications and by their limited design modularity. The focus of this thesis is to develop original computer architectures, that can not only survive these new challenges, but also leverage the vast number of transistors available to unlock better performance and efficiency. The work explores and evaluates new software and hardware techniques to enable the development of novel adaptive and modular computer designs. The thesis first explores an infrastructure to quantitatively assess the fallacies of current systems and their inadequacy to operate on unreliable silicon. In light of these findings, specific solutions are then proposed to strengthen digital system architectures, both through hardware and software techniques. The thesis culminates with the proposal of a radically new architecture design that can fully adapt dynamically to operate on the hardware resources available on chip, however limited or abundant those may be. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | A Ph.D. Dissertation on Fault Tolerant Microprocessors. | en_US |
dc.title | Adaptive Distributed Architectures for Future Semiconductor Technologies. | en_US |
dc.type | Thesis | en_US |
dc.description.thesisdegreename | PhD | en_US |
dc.description.thesisdegreediscipline | Computer Science and Engineering | en_US |
dc.description.thesisdegreegrantor | University of Michigan, Horace H. Rackham School of Graduate Studies | en_US |
dc.contributor.committeemember | Bertacco, Valeria M. | en_US |
dc.contributor.committeemember | Savarese, Silvio | en_US |
dc.contributor.committeemember | Austin, Todd M. | en_US |
dc.contributor.committeemember | Mahlke, Scott | en_US |
dc.subject.hlbsecondlevel | Computer Science | en_US |
dc.subject.hlbtoplevel | Engineering | en_US |
dc.description.bitstreamurl | http://deepblue.lib.umich.edu/bitstream/2027.42/102405/1/apellegr_1.pdf | |
dc.owningcollname | Dissertations and Theses (Ph.D. and Master's) |
Files in this item
Remediation of Harmful Language
The University of Michigan Library aims to describe library materials in a way that respects the people and communities who create, use, and are represented in our collections. Report harmful or offensive language in catalog records, finding aids, or elsewhere in our collections anonymously through our metadata feedback form. More information at Remediation of Harmful Language.
Accessibility
If you are unable to use this file in its current format, please select the Contact Us link and we can modify it to make it more accessible to you.