Studies of indium aluminum arsenide/indium gallium arsenide and gallium indium phosphide/gallium arsenide heterostructure FET's for high-speed applications.

Abstract

Heterostructure FET's based on InAlAs/InGaAs and GaInP/GaAs materials were fabricated and systematically studied for high speed integrated circuit applications. The performance of different HEMT and HIGFET designs was evaluated and compared. InAlAs/InGaAs and GaInP/GaAs materials demonstrate some promising features which make them very attractive for replacing the most commonly used AlGaAs/GaAs system. Strained channel designs can improve the transport properties of both n- and p-channel FET's by reducing the carrier effective mass and improving the carrier confinement. Unlike the AlGaAs/GaAs HEMT's, GaInP/GaAs HEMT's show no current collapse or threshold voltage shift at low temperature. This indicates minimum trapping effects in the doped GaInP layer as confirmed by low-frequency noise measurements; pure 1/f noise was found at low temperature without Lorentz-shaped spectra. Strained InAlAs/InGaAs p-doped channel designs demonstrated a performance improvement compared to the lattice-matched case due to the reduction of the hole effective mass. P-channel HIGFET's realized by Carbon and Argon co-implantation presented a lower access resistance compared to the conventional Be-implantation, and resulted in a better g$\sb{\rm m}$ and I$\sb{\rm ds}$. Lattice-matched and strained InAlAs/In$\sb{\rm x}$Ga$\sb{\rm 1-x}$As (0.53 $\le$ 0.70) HIGFET's were systematically investigated. DC and microwave performance continuously improved as the In content was increased up to 65% in the In$\sb{\rm x}$Ga$\sb{\rm 1-x}$As channel. 0.2 $\mu$m WSi$\sb{\rm x}$ T-gate InAlAs/InGaAs HIGFET's were implemented by the lift-off process, and showed a g$\sb{\rm m}$ of 650 mS/mm and f$\sb{\rm T}$ of 45 GHz. Through our studies, HIGFET structures showed a negligible sidegating effect and a slight orientation effect. Undoped InAlAs buffer layers revealed a high density of deep traps which causes a parasitic conduction and results in a high g$\sb{\rm ds}$. E/D-mode InAlAs/InGaAs HIGFET's circuits demonstrated a high uniformity of threshold voltage, high DC gain, large noise margin and high thermal stability. Functional logic gates based on the E/D-mode HIGFET can be operated at least up to 400 MHz, and the switching time for a single inverter stage was found to be as low as 25 psec.