Hybrid Designs for Caches and Cores.
dc.contributor.author | Sleiman, Faissal | en_US |
dc.date.accessioned | 2015-09-30T14:23:44Z | |
dc.date.available | NO_RESTRICTION | en_US |
dc.date.available | 2015-09-30T14:23:44Z | |
dc.date.issued | 2015 | en_US |
dc.date.submitted | en_US | |
dc.identifier.uri | https://hdl.handle.net/2027.42/113484 | |
dc.description.abstract | Processor power constraints have come to the forefront over the last decade, heralded by the stagnation of clock frequency scaling. High-performance core and cache designs often utilize power-hungry techniques to increase parallelism. Conversely, the most energy-efficient designs opt for a serial execution to avoid unnecessary overheads. While both of these extremes constitute one-size-fits-all approaches, a judicious mix of parallel and serial execution has the potential to achieve the best of both high-performing and energy-efficient designs. This dissertation examines such hybrid designs for cores and caches. Firstly, we introduce a novel, hybrid out-of-order/in-order core microarchitecture. Instructions that are steered towards in-order execution skip register allocation, reordering and dynamic scheduling. At the same time, these instructions can interleave on an instruction-by-instruction basis with instructions that continue to benefit from these conventional out-of-order mechanisms. Secondly, this dissertation revisits a hybrid technique introduced for L1 caches, way-prediction, in the context of last-level caches that are larger, have higher associativity, and experience less locality. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | microarchitecture | en_US |
dc.subject | hybrid | en_US |
dc.subject | in-order | en_US |
dc.subject | out-of-order | en_US |
dc.subject | way-prediction | en_US |
dc.subject | cache | en_US |
dc.title | Hybrid Designs for Caches and Cores. | en_US |
dc.type | Thesis | en_US |
dc.description.thesisdegreename | PhD | en_US |
dc.description.thesisdegreediscipline | Computer Science and Engineering | en_US |
dc.description.thesisdegreegrantor | University of Michigan, Horace H. Rackham School of Graduate Studies | en_US |
dc.contributor.committeemember | Wenisch, Thomas F. | en_US |
dc.contributor.committeemember | Wentzloff, David D. | en_US |
dc.contributor.committeemember | Mars, Jason | en_US |
dc.contributor.committeemember | Mahlke, Scott | en_US |
dc.subject.hlbsecondlevel | Computer Science | en_US |
dc.subject.hlbtoplevel | Engineering | en_US |
dc.description.bitstreamurl | http://deepblue.lib.umich.edu/bitstream/2027.42/113484/1/sleimanf_1.pdf | |
dc.owningcollname | Dissertations and Theses (Ph.D. and Master's) |
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