Hardware Considerations for Signal Processing Systems: A Step Toward the Unconventional.
dc.contributor.author | Knag, Phil Christopher | en_US |
dc.date.accessioned | 2016-01-13T18:04:37Z | |
dc.date.available | 2017-02-01T18:21:45Z | en |
dc.date.issued | 2015 | en_US |
dc.date.submitted | 2015 | en_US |
dc.identifier.uri | https://hdl.handle.net/2027.42/116685 | |
dc.description.abstract | As we progress into the future, signal processing algorithms are becoming more computationally intensive and power hungry while the desire for mobile products and low power devices is also increasing. An integrated ASIC solution is one of the primary ways chip developers can improve performance and add functionality while keeping the power budget low. This work discusses ASIC hardware for both conventional and unconventional signal processing systems, and how integration, error resilience, emerging devices, and new algorithms can be leveraged by signal processing systems to further improve performance and enable new applications. Specifically this work presents three case studies: 1) a conventional and highly parallel mix signal cross-correlator ASIC for a weather satellite performing real-time synthetic aperture imaging, 2) an unconventional native stochastic computing architecture enabled by memristors, and 3) two unconventional sparse neural network ASICs for feature extraction and object classification. As improvements from technology scaling alone slow down, and the demand for energy efficient mobile electronics increases, such optimization techniques at the device, circuit, and system level will become more critical to advance signal processing capabilities in the future. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | neural network | en_US |
dc.subject | deep learning | en_US |
dc.subject | neuromorphic computing | en_US |
dc.subject | stochastic computing | en_US |
dc.subject | ASIC | en_US |
dc.subject | VLSI | en_US |
dc.title | Hardware Considerations for Signal Processing Systems: A Step Toward the Unconventional. | en_US |
dc.type | Thesis | en_US |
dc.description.thesisdegreename | PhD | en_US |
dc.description.thesisdegreediscipline | Electrical Engineering | en_US |
dc.description.thesisdegreegrantor | University of Michigan, Horace H. Rackham School of Graduate Studies | en_US |
dc.contributor.committeemember | Zhang, Zhengya | en_US |
dc.contributor.committeemember | Ruf, Christopher S. | en_US |
dc.contributor.committeemember | Flynn, Michael | en_US |
dc.contributor.committeemember | Lu, Wei | en_US |
dc.subject.hlbsecondlevel | Electrical Engineering | en_US |
dc.subject.hlbtoplevel | Engineering | en_US |
dc.description.bitstreamurl | http://deepblue.lib.umich.edu/bitstream/2027.42/116685/1/knagphil_1.pdf | |
dc.owningcollname | Dissertations and Theses (Ph.D. and Master's) |
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