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High-sensitivity, low -noise, multiaxis capacitive microaccelerometers.

dc.contributor.authorChae, Junseok
dc.contributor.advisorNajafi, Khalil
dc.date.accessioned2016-08-30T15:16:26Z
dc.date.available2016-08-30T15:16:26Z
dc.date.issued2003
dc.identifier.urihttp://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:3079423
dc.identifier.urihttps://hdl.handle.net/2027.42/123361
dc.description.abstractHigh performance, micro-g resolution, small size, low cost, low power accelerometers are needed in many applications such as inertial navigation, Unmanned Aerial Vehicles (UAVs), and GPS augmentation. Many low-medium performance accelerometers have been commercialized for automotive applications. Several sensing methods have been used, including piezoresistive, piezoelectric, resonant beam, tunneling, and capacitive techniques. Capacitive sensing has several advantages in terms of high sensitivity, stable DC-characteristics, low power dissipation, low temperature sensitivity, and low noise floor. This research work demonstrates full functionality of high-sensitivity, low-noise capacitive multi-axis accelerometers. In order to achieve micro-g resolution, two different structures have been utilized: a Silicon-On-Glass (SOG) accelerometer, and an all-silicon accelerometer. A monolithic fabrication technique for Post-CMOS MEMS is also developed. Finally, a 3-axis <italic> single-chip</italic> accelerometer is presented. The SOG configuration is implemented with a high aspect-ratio structure (120mum-thick single crystal silicon and bonded to a glass substrate), formed using Deep RIE. It has a 3.4mum sensing gap and a simple 3-mask, 5-step process. A hybrid microsystem consisting of the SOG accelerometer and Sigma-Delta switched-capacitor readout circuit provides 0.15pF/g sensitivity and 80mug/&radic;Hz noise floor. A monolithic circuit-MEMS fabrication technology utilizing a dielectric bridge, silicon islands, and the SOG configuration has been developed. This technique is simple, robust, and fully Post-CMOS compatible. A glass substrate supports the silicon islands and signal routing is provided with the help of a dielectric bridge between the silicon islands. An all-silicon <italic>in-plane</italic> accelerometer has been implemented using a combined surface and bulk micromachining technology. By taking advantage of the technology, a full-wafer thick proof-mass, large sensing area, and small sensing gap are obtained. The accelerometer combined with the readout circuit provides 5.6pF/g sensitivity and 1.6mug/&radic;Hz noise floor, which is the best reported performance for <italic>in-plane</italic> micromachined silicon accelerometers. Finally, two <italic>in plane</italic> and one <italic>out-of-plane</italic> accelerometers are integrated on a single substrate. The accelerometer system is small in size, self-aligned, and easy to package. All three devices have >3pF/g sensitivity and sub-mug/&radic;Hz mechanical noise floor. The 3-axis accelerometer with the readout circuit provides noise floor of 1.6mug/&radic;Hz and 1.1mug/&radic;Hz for <italic>in-plane</italic> and <italic>out-of-plane </italic> devices, respectively.
dc.format.extent156 p.
dc.languageEnglish
dc.language.isoEN
dc.subjectAccelerometers
dc.subjectHigh
dc.subjectLow-noise
dc.subjectMicroaccelerometers
dc.subjectMultiaxis Capacitive
dc.subjectSensitivity
dc.titleHigh-sensitivity, low -noise, multiaxis capacitive microaccelerometers.
dc.typeThesis
dc.description.thesisdegreenamePhDen_US
dc.description.thesisdegreedisciplineApplied Sciences
dc.description.thesisdegreedisciplineElectrical engineering
dc.description.thesisdegreegrantorUniversity of Michigan, Horace H. Rackham School of Graduate Studies
dc.description.bitstreamurlhttp://deepblue.lib.umich.edu/bitstream/2027.42/123361/2/3079423.pdf
dc.owningcollnameDissertations and Theses (Ph.D. and Master's)


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