A 1024-site neural stimulating array with on -chip current generation.

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dc.contributor.author Yao, Ying
dc.contributor.advisor Wise, Kensall D.
dc.date.accessioned 2016-08-30T15:58:22Z
dc.date.available 2016-08-30T15:58:22Z
dc.date.issued 2005
dc.identifier.uri http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:3192824
dc.identifier.uri http://hdl.handle.net/2027.42/125549
dc.description.abstract Advances in neural prostheses are strongly dependent on the development of microelectrodes having the ability to produce high fidelity sensation or to selectively control the activity of neural ensembles. Numerous devices have been developed to stimulate neural tissues and record neural responses. However, in order to instrument large volumes of neural tissue to allow detailed mapping of neural pathways and realistically assess the efficacy of neural prostheses, it is necessary to develop high-density three-dimensional microelectrode arrays suitable for chronic applications. This thesis research has demonstrated the feasibility of a high-density low-profile microelectrode array for selective stimulating and recording in the central nervous system. The array consists of a number of 64-site 8-channel CMOS probes, a silicon platform to support the probes on the cortical surface, spacers to hold the probes orthogonal to the platform, and a hybrid chip for platform address decoding. The CMOS probes feature on-chip current generation to deliver biphasic currents from -127muA to +127muA to selected sites with 1muA resolution and an on-chip preamplifier having a gain of 40dB from 100Hz to l0kHz. This array can be easily expandable to achieve higher density without increasing the number of interfacial leads or the complexity of on-chip circuitry. These devices are fabricated in a 3mum, p-sub/n-epi/p-well 2P/1M micromachined CMOS technology. A low-profile structure has been developed so that the probe backend supporting the CMOS circuitry can be folded parallel to the cortical surface to minimize the height of the final array above the cortex in order to keep the implant free of the skull in chronic applications. An integrated silicon/parylene batch fabrication process has been developed to incorporate parylene coating into the batch fabrication of the silicon microelectrode, which allows parylene coating and selective removal at wafer level prior to probe release. Microassembly techniques have also been developed to facilitate assembly of a robust 3D array. The functionalities of the STIM-3 probe have been demonstrated both <italic> in-vitro</italic> and <italic>in-vivo</italic>. The techniques developed in this research should allow significant advances in development of high-density chronic neural implants for use in neuroscience and should set the stage for practical neural prostheses.
dc.format.extent 155 p.
dc.language English
dc.language.iso EN
dc.subject Array
dc.subject Current
dc.subject Electrical Stimulation
dc.subject Generation
dc.subject Neural Probe
dc.subject On-chip
dc.subject Site
dc.subject Stimulating
dc.title A 1024-site neural stimulating array with on -chip current generation.
dc.type Thesis
dc.description.thesisdegreename Ph.D.
dc.description.thesisdegreediscipline Applied Sciences
dc.description.thesisdegreediscipline Biological Sciences
dc.description.thesisdegreediscipline Biomedical engineering
dc.description.thesisdegreediscipline Electrical engineering
dc.description.thesisdegreediscipline Neurosciences
dc.description.thesisdegreegrantor University of Michigan, Horace H. Rackham School of Graduate Studies
dc.description.bitstreamurl http://deepblue.lib.umich.edu/bitstream/2027.42/125549/2/3192824.pdf
dc.owningcollname Dissertations and Theses (Ph.D. and Master's)
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