Power conscious and robust design methods for the sub-90 nm CMOS digital circuit.

Abstract

Power consumption has become a primary metric in the design of integrated circuits due to the pervasive use of embedded IC devices in a broad range of applications, from large server farms and personal computers to mobile, handheld and wireless devices. Due to technology scaling, leakage power has emerged as a significant source of power consumption, significantly increasing the power budget. Thus, the semiconductor industry is placing a great deal of time, money and energy into developing techniques to reduce not only leakage power, but active power as well. The work in this dissertation focuses on the power and robustness issues in scaled technologies, predominantly in the 65-nm regime. Approaches presented in this dissertation are intended for power reduction in advanced industrial technologies, while leaving performance unchanged. Several bus designs are introduced which significantly reduce not only the leakage power component of total power dissipation, but also dynamic power, which is still the chief component of the total power budget for nearly any given high performance integrated design. These bus design approaches reduce power consumption while having little to no effect on the performance of the bus system. Two of the bus designs sense changing transitions on the lines to adaptively respond to the current switching and data environment. This work also looks at reducing leakage power in general blocks of logic using improved power gating techniques. By creating intermediate sleep modes, the impact of power gated design can be broadened to further decrease leakage power. In a sense, the power gating methods that are developed in this dissertation are adaptive to the data environment in which they are used. Finally, three separate techniques are developed which increase the robustness of integrated circuits. Two of these designs adapt to the point in the process spread in which they were fabricated and give important feedback to the system so that it can also adapt to the operating environment. These techniques prove to be extremely useful in providing information to the system so that it can adaptively respond to process, voltage or temperature variations.