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High speed 1.55 micron PIN-HBT monolithically integrated front-end photoreceivers.

dc.contributor.authorSyao, Kao-Chih
dc.contributor.advisorBhattacharya, Pallab
dc.date.accessioned2016-08-30T17:30:14Z
dc.date.available2016-08-30T17:30:14Z
dc.date.issued1997
dc.identifier.urihttp://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqm&rft_dat=xri:pqdiss:9732191
dc.identifier.urihttps://hdl.handle.net/2027.42/130594
dc.description.abstractHigh-performance detection systems are required for optical fiber communication systems. In this thesis, high speed and sensitivity PIN-HBT monolithically integrated photoreceivers are developed for two applications on wavelength division multiplexed (WDM) systems. Firstly, 16-channel photoreceiver arrays, for high density WDM applications, with 11.5 GHz 3 dB bandwidth and low crosstalk are designed, fabricated and characterized for the first time. These multichannel photoreceiver exhibit record performance in terms of gain-bandwidth product and adjacent channel crosstalk. Secondly, single channel photoreceivers have been integrated into an optical phase locked loop (OPLL) which makes extreme high density (10 GHz channel spacing) WDM transmission possible. The photoreceiver circuits consist of a p-i-n photodiode, several heterojunction bipolar transistors (HBTs), thin film resistors and a peaking inductor. The advantages of monolithic integration are not only improved performance by reducing parasitics but also, lower cost due to increased throughput and reduced labor. Before integration, the active and passive components are investigated and optimized individually. Models based on the DC and microwave characteristics are built for complicated circuit design. The existing fabrication technology is optimized through numerous careful calibration. Single channel photoreceivers with different circuit configurations are designed, fabricated, and characterized. The peaking inductors are analyzed theoretically and experimentally. The simulation suggests that a base peaking inductor is the most efficient way to enhance the overall bandwidth of the photoreceivers. Dual-feedback photoreceivers are demonstrated to show the feasibility of designing more complicated circuits. Three-, Eight- and Sixteen-channel monolithically integrated photoreceiver arrays have been studied. In particular, the serious problem of adjacent channel crosstalk has been investigated experimentally and theoretically. Based on modeling results, a novel monolithic metal shield was incorporated on the individual channels of the arrays. A very large 10 dB reduction of crosstalk was observed. No other scheme has ever yielded such a reduction. The individual channel bandwidths are also $>$11 GHz, the highest obtained in a multi-channel array. Finally, the photoreceiver was successfully incorporated in hybrid OPLLs. The circuit demonstrated a hold-in range of 1.3 GHz and locking frequency from 3-16 GHz. A transistor-based OPLL circuit has been designed for future monolithic integration.
dc.format.extent155 p.
dc.languageEnglish
dc.language.isoEN
dc.subjectEnd
dc.subjectFront
dc.subjectHbt
dc.subjectHigh
dc.subjectIntegrated
dc.subjectMicron
dc.subjectMonolithically
dc.subjectPhotoreceivers
dc.subjectPin
dc.subjectSpeed
dc.subjectWdm
dc.titleHigh speed 1.55 micron PIN-HBT monolithically integrated front-end photoreceivers.
dc.typeThesis
dc.description.thesisdegreenamePhDen_US
dc.description.thesisdegreedisciplineApplied Sciences
dc.description.thesisdegreedisciplineElectrical engineering
dc.description.thesisdegreegrantorUniversity of Michigan, Horace H. Rackham School of Graduate Studies
dc.description.bitstreamurlhttp://deepblue.lib.umich.edu/bitstream/2027.42/130594/2/9732191.pdf
dc.owningcollnameDissertations and Theses (Ph.D. and Master's)


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