Pseudo -vector machine for embedded applications.

Abstract

Recently much attention has been focused on designing low-cost, low-power and high performance processors for mid-to-low end embedded mobile applications. In this work, we will present a new processing paradigm, called the Pseudo-Vector Machine, for processing such applications. In particular, we will focus on how to improve the performance on program loop executions by adding a small amount of hardware to a single issued machine. The characteristics of critical loops in these applications vary greatly, from highly vectorizable, to difficult and costly to vectorize, to impossible to vectorize. For vector arithmetic that can be represented by highly vectorizable loops, the traditional vector processing paradigm typically provides the largest performance gains. For hard to vectorize program loops, the DSP's style of processing paradigm, which focuses on program loop optimizations, is more suitable. The pseudo-vector machine proposed in this dissertation can perform these two types of vector arithmetic on a single, integrated datapath. Depending on the nature of the loops, this machine sometimes behaves like a vector processor; it sometimes behaves like a DSP processor. The compiler, for this machine, decides which processing paradigm is best suited for a given loop. By providing the ability to execute both of these paradigms for program loops, we can achieve performance improvements that are higher than either individual paradigm. The average speedup, in this case, over a set of embedded applications, is 1.731.