Low damage etching of III-V semiconductors for the fabrication of nanoelectronic devices.

Abstract

To meet the needs of nanometer scale device fabrication, dry etch technology has been developed. The dependence of etch profile, etch rate, surface morphology, microloading effects, and etch damage on etch conditions has been studied for III-V materials in high density plasma reactors. High density plasma reactors, such as electron cyclotron resonance (ECR) plasma sources and inductively coupled plasma (ICP) sources, can provide anisotropic etching with high etch rates, high selectivity to masking materials, reduced aspect ratio dependent etching, and low etch induced damage with nearly independent control of plasma density and ion energy. Such high density plasmas will be required for the fabrication of future nanometer scale devices. A high density ICP source has been used for the fabrication of nanostructures in GaAs and via holes in InP. High etch rates, smooth vertical sidewalls, and high selectivity to a Ni mask have been demonstrated with a pure Cl₂ plasma at very low pressure, down to 0.10 mTorr. Horizontal distributed Bragg reflector structures and photonic bandgap lasers in GaAs and via holes in InP were fabricated. The effects of etch time on the damage induced during dry etching with an ECR plasma source have been studied. The etch induced damage propagation in GaAs- and InP-based materials has a strong diffusion component as determined from the relation to sample temperature during etching. Most time dependent damage for GaAs was confined to the top 15 nm of the sample while for InGaAs, the time dependent damage propagated to >25 nm below the surface. The effects of etch induced damage on the electrical and optical properties of InGaAs quantum wells were studied. The In% in the material strongly influenced the susceptibility to etch induced damage. Using low energy Cl₂ species for surface passivation, the effects of etch induced damage on the electrical and optical properties of GaAs and InGaAs were reduced. To demonstrate the low damage, highly anisotropic etching techniques, a new device design of a single electron transistor has been fabricated. In order to successfully fabricate such high performance devices, etch damage will need to be minimized or eliminated.