Circuit and System Designs for Millimeter Scale IoT and Wireless Neural Recording

Abstract

The next generation of computing platforms increases proximity to the source of information rather than to humans, allowing much more aggressive miniaturization. The key technology for miniaturization has been process scaling, which has reduced the silicon area, increased computational capability and lowered power consumption. However, the latest deep-submicron technologies do not fit well with mm-scale computing because of the increased leakage current. Therefore, advances in circuit level techniques are critical to realizing networks of mm-scale IoT computing platforms. Smart sensor nodes have been a popular research topic in recent decades, as the demand for collecting and processing environmental data has grown. Consequently, promising research outcomes have been published in various areas of medical care, environmental monitoring and surveillance. Such wireless sensor nodes (WSNs) require new circuit techniques as they are placed in a very distinct operating environment with specialized purposes compared to conventional applications. Ultra-low power consumption is one of the most challenging constraints resulting from the form factor of the system. In this dissertation, circuit techniques to reduce power consumption of the system is introduced. A 4.7nW wake-up timer with 13.8ppm/℃ temperature coefficient demonstrated in this dissertation lowers system sleep power while minimizing the energy overhead for peer-to-peer communication. A 2.5psrms digital phase-locked loop with noise self-adjustment improves the system stability by making the noise of the clock invariant to the environmental changes. A neural recording amplifier with 1.8 noise efficiency factor enhances the power efficiency of the analog front-end. As a demonstration of the miniaturized sensor system, this dissertation presents a 2.7cm3 stand-alone global navigation satellite system that can acquire 1791 positions.