High‐Performance Zinc Tin Oxide TFTs with Active Layers Deposited by Atomic Layer Deposition
dc.contributor.author | Allemang, Christopher R. | |
dc.contributor.author | Cho, Tae H. | |
dc.contributor.author | Trejo, Orlando | |
dc.contributor.author | Ravan, Shantam | |
dc.contributor.author | Rodríguez, Robin E. | |
dc.contributor.author | Dasgupta, Neil P. | |
dc.contributor.author | Peterson, Rebecca L. | |
dc.date.accessioned | 2020-08-10T20:55:47Z | |
dc.date.available | WITHHELD_12_MONTHS | |
dc.date.available | 2020-08-10T20:55:47Z | |
dc.date.issued | 2020-07 | |
dc.identifier.citation | Allemang, Christopher R.; Cho, Tae H.; Trejo, Orlando; Ravan, Shantam; Rodríguez, Robin E. ; Dasgupta, Neil P.; Peterson, Rebecca L. (2020). "High‐Performance Zinc Tin Oxide TFTs with Active Layers Deposited by Atomic Layer Deposition." Advanced Electronic Materials 6(7): n/a-n/a. | |
dc.identifier.issn | 2199-160X | |
dc.identifier.issn | 2199-160X | |
dc.identifier.uri | https://hdl.handle.net/2027.42/156226 | |
dc.description.abstract | New deposition techniques for amorphous oxide semiconductors compatible with silicon back end of line manufacturing are needed for 3D monolithic integration of thin‐film electronics. Here, three atomic layer deposition (ALD) processes are compared for the fabrication of amorphous zinc tin oxide (ZTO) channels in bottom‐gate, top‐contact n‐channel transistors. As‐deposited ZTO films, made by ALD at 150–200 °C, exhibit semiconducting, enhancement‐mode behavior with electron mobility as high as 13 cm2 V−1 s−1, due to a low density of oxygen‐related defects. ZTO deposited at 200 °C using a hybrid thermal‐plasma ALD process with an optimal tin composition of 21%, post‐annealed at 400 °C, shows excellent performance with a record high mobility of 22.1 cm2 V–1 s–1 and a subthreshold slope of 0.29 V dec–1. Increasing the deposition temperature and performing post‐deposition anneals at 300–500 °C lead to an increased density of the X‐ray amorphous ZTO film, improving its electrical properties. By optimizing the ZTO active layer thickness and using a high‐k gate insulator (ALD Al2O3), the transistor switching voltage is lowered, enabling electrical compatibility with silicon integrated circuits. This work opens the possibility of monolithic integration of ALD ZTO‐based thin‐film electronics with silicon integrated circuits or onto large‐area flexible substrates.Three atomic layer deposition (ALD) processes are investigated for the deposition of zinc tin oxide (ZTO) as the active layer in thin‐film transistors (TFTs). With a low density of oxygen vacancies, as‐deposited films exhibit semiconducting, enhancement‐mode behavior. Post‐deposition anneals result in increased film density and record high electron mobility for ALD ZTO TFTs using process temperatures within the back‐end‐of‐line thermal budget. | |
dc.publisher | IEEE | |
dc.publisher | Wiley Periodicals, Inc. | |
dc.subject.other | amorphous oxide semiconductors | |
dc.subject.other | zinc tin oxide | |
dc.subject.other | thin‐film transistors | |
dc.subject.other | atomic layer deposition | |
dc.title | High‐Performance Zinc Tin Oxide TFTs with Active Layers Deposited by Atomic Layer Deposition | |
dc.type | Article | |
dc.rights.robots | IndexNoFollow | |
dc.subject.hlbsecondlevel | Materials Science and Engineering | |
dc.subject.hlbtoplevel | Engineering | |
dc.description.peerreviewed | Peer Reviewed | |
dc.description.bitstreamurl | http://deepblue.lib.umich.edu/bitstream/2027.42/156226/3/aelm202000195-sup-0001-SuppMat.pdf | en_US |
dc.description.bitstreamurl | http://deepblue.lib.umich.edu/bitstream/2027.42/156226/2/aelm202000195.pdf | en_US |
dc.description.bitstreamurl | http://deepblue.lib.umich.edu/bitstream/2027.42/156226/1/aelm202000195_am.pdf | en_US |
dc.identifier.doi | 10.1002/aelm.202000195 | |
dc.identifier.source | Advanced Electronic Materials | |
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