Automatic Design of Application Specific Instruction Set Extensions Through Dataflow Graph Exploration
dc.contributor.author | Clark, Nathan | en_US |
dc.contributor.author | Zhong, Hongtao | en_US |
dc.contributor.author | Tang, Wilkin | en_US |
dc.contributor.author | Mahlke, Scott | en_US |
dc.date.accessioned | 2006-09-11T14:59:40Z | |
dc.date.available | 2006-09-11T14:59:40Z | |
dc.date.issued | 2003-12 | en_US |
dc.identifier.citation | Clark, Nathan; Zhong, Hongtao; Tang, Wilkin; Mahlke, Scott; (2003). "Automatic Design of Application Specific Instruction Set Extensions Through Dataflow Graph Exploration." International Journal of Parallel Programming 31(6): 429-449. <http://hdl.handle.net/2027.42/44572> | en_US |
dc.identifier.issn | 0885-7458 | en_US |
dc.identifier.issn | 1573-7640 | en_US |
dc.identifier.uri | https://hdl.handle.net/2027.42/44572 | |
dc.description.abstract | General-purpose processors are often incapable of achieving the challenging cost, performance, and power demands of high-performance applications. To meet these demands, most systems employ a number of hardware accelerators to off-load the computationally demanding portions of the application. As an alternative to this strategy, we examine customizing the computation capabilities of a processor for a particular application. The processor is extended with hardware in the form of a set of custom function units and instruction set extensions. To effectively identify opportunities for creating custom hardware, a dataflow graph design space exploration engine heuristically identifies candidate computation subgraphs without artificially constraining their size or shape. The engine combines estimates of performance gain, cost, and inherent limitations of the processor to grow candidate graphs in profitable directions while pruning unprofitable paths. This paper describes the dataflow graph exploration engine and evaluates its effectiveness across a set of embedded applications. | en_US |
dc.format.extent | 281597 bytes | |
dc.format.extent | 3115 bytes | |
dc.format.mimetype | application/pdf | |
dc.format.mimetype | text/plain | |
dc.language.iso | en_US | |
dc.publisher | Kluwer Academic Publishers-Plenum Publishers; Plenum Publishing Corporation ; Springer Science+Business Media | en_US |
dc.subject.other | Application-specific Processor | en_US |
dc.subject.other | Instruction Set | en_US |
dc.subject.other | Embedded System | en_US |
dc.subject.other | Software Engineering/Programming and Operating Systems | en_US |
dc.subject.other | Computer Science | en_US |
dc.subject.other | Processor Architectures | en_US |
dc.subject.other | Theory of Computation | en_US |
dc.subject.other | Dataflow Graph | en_US |
dc.subject.other | Hardware Customization | en_US |
dc.title | Automatic Design of Application Specific Instruction Set Extensions Through Dataflow Graph Exploration | en_US |
dc.type | Article | en_US |
dc.subject.hlbsecondlevel | Philosophy | en_US |
dc.subject.hlbsecondlevel | Computer Science | en_US |
dc.subject.hlbtoplevel | Humanities | en_US |
dc.subject.hlbtoplevel | Engineering | en_US |
dc.description.peerreviewed | Peer Reviewed | en_US |
dc.contributor.affiliationum | Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, Michigan, 48109 | en_US |
dc.contributor.affiliationum | Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, Michigan, 48109 | en_US |
dc.contributor.affiliationum | Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, Michigan, 48109 | en_US |
dc.contributor.affiliationum | Advanced Computer Architecture Laboratory, University of Michigan, Ann Arbor, Michigan, 48109 | en_US |
dc.contributor.affiliationumcampus | Ann Arbor | en_US |
dc.description.bitstreamurl | http://deepblue.lib.umich.edu/bitstream/2027.42/44572/1/10766_2004_Article_476941.pdf | en_US |
dc.identifier.doi | http://dx.doi.org/10.1023/B:IJPP.0000004509.87424.3a | en_US |
dc.identifier.source | International Journal of Parallel Programming | en_US |
dc.owningcollname | Interdisciplinary and Peer-Reviewed |
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